Eine Demo buchen
Eridanus Technologies v. AMD: On-Die LDO Regulation Patent Dispute | PatSnap
Explore in Eureka
Case ID1:23-cv-01036
FiledSep 2023
ClosedFeb 2024
Patentrechtsstreitigkeiten

Eridanus Technologies v. AMD: LDO Regulation Patent Claims Dismissed With Prejudice in 159 Days

Eridanus Technologies, Inc. sued Advanced Micro Devices over on-die LDO voltage regulation patents, targeting AMD’s Ryzen, EPYC, and Threadripper processor lines across more than 15 product families. The case resolved in just 159 days via joint stipulation, with all claims dismissed with prejudice and each side bearing its own legal costs.

Resolution time
159days
Case resolved in 159 days — well below the median district court patent case duration
Patents asserted
2
US7671623B2 and US7372764B2 — on-die LDO voltage regulation for CPUs and APUs
Ergebnis
Mit Vorurteil abgewiesen
With prejudice — Eridanus Technologies cannot refile the same claims against AMD
Cost ruling
Own costs
Each party bears its own costs, expenses, and legal fees — no fee-shifting order issued
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Swift with-prejudice dismissal in on-die CPU voltage regulation IP dispute

On September 1, 2023, Eridanus Technologies, Inc. filed suit against Advanced Micro Devices, Inc. in the Western District of Texas (Case No. 1:23-cv-01036) before Judge David Alan Ezra. The complaint alleged infringement of two patents — US7671623B2 and US7372764B2 — both covering on-die low-dropout (LDO) voltage regulation technology. The accused products spanned more than 15 AMD processor families, including EPYC 7001 Series CPUs, Ryzen 1000–3000 Series CPUs and APUs, Ryzen Embedded variants, Ryzen Threadripper 2000 Series, and any future AMD products employing on-die LDO regulation.

The case closed on February 7, 2024, just 159 days after filing, following a Joint Stipulation of Dismissal jointly filed by both parties on February 6, 2024. Judge Ezra granted the stipulation and ordered all claims dismissed in their entirety with prejudice. Critically, the order also specified that each party would bear its own costs, expenses, and legal fees — a mutual arrangement suggesting a negotiated resolution rather than a one-sided capitulation, though the precise terms of any underlying agreement remain confidential.

A 159-day resolution is notably swift for patent litigation in the Western District of Texas, which typically sees cases run well beyond 12 months before trial. The speed of resolution and the with-prejudice, own-costs structure strongly suggest the parties reached a private settlement or licensing arrangement before meaningful claim construction or discovery concluded. What drove early resolution — whether licensing terms, prior art concerns, or commercial considerations — is not disclosed in the public record. The breadth of the accused product list, including a catch-all for ‘any current and future generations of AMD products employing on-die LDO regulation,’ suggests Eridanus had broad enforcement ambitions that were ultimately resolved privately.

Case at a glance
Case no.1:23-cv-01036
CourtTexas Western
JudgeDavid Alan Ezra
FiledSeptember 1, 2023
ClosedFebruary 7, 2024
Duration159 days
OutcomeDismissed with Prejudice
Verdict causeInfringement Action
BasisDismissed with Prejudice
Prior Art Intelligence
Can the patents in this case be challenged?
When a patent enters litigation, the natural first question is whether it can be invalidated. Check what prior art existed before US7671623B2 was filed.
Check Prior Art
Case data sourced from PACER / Texas Western District Court via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to dismissal in 159 days

Case resolved in 159 days — well below the median district court patent case duration

Case timeline: Complaint filed May 13 2025, NOV–DEC — 159 days total Horizontal timeline showing the three key events in Eridanus Technologies, Inc. v Advanced Micro Devices, Inc. from filing to voluntary dismissal. Source: PACER, Texas Western District Court. SEP 1 2023 Complaint filed NOV–DEC 2023 Pre-trial proceedings FEB 7 2024 Abgewiesen with prejudice 159 DAYS TOTAL
Dismissal terms

All claims dismissed with prejudice — each party bears its own costs

Legal mechanism

Joint Stipulation: both sides agreed to end the case

A Joint Stipulation of Dismissal means both plaintiff and defendant actively agreed to terminate the litigation. Unlike a unilateral voluntary dismissal, a joint stipulation requires mutual consent — signalling that neither side was forced out and that some form of agreement, potentially a licensing deal or covenant not to sue, likely underpins the resolution. The court simply ratified the parties’ joint decision.

Mutual resolution mechanism
Prejudice analysis

With prejudice: Eridanus is permanently barred from refiling these claims

A dismissal with prejudice operates as a final adjudication on the merits. Eridanus Technologies cannot refile suit against AMD on the same infringement claims under US7671623B2 or US7372764B2. This is a meaningful legal protection for AMD — it eliminates the risk of Eridanus reasserting these specific patents against the same accused product lines in future litigation, absent a successful appeal, which is unavailable here given the joint nature of the dismissal.

Permanent bar on re-litigation
Cost ruling

Own-costs order: no fee-shifting, no admitted liability

The order that each party bear its own costs, expenses, and legal fees is consistent with a negotiated exit. It avoids the signal of one party ‘winning’ on fees and is common in cases that resolve through private agreement. It also means AMD did not pursue — or did not prevail on — a motion for attorneys’ fees under 35 U.S.C. § 285, which would have required a finding of an ‘exceptional case.’ No such finding was made here.

No § 285 fee finding
Product scope

Catch-all clause covered all future AMD LDO products

The complaint’s accused product list included a forward-looking catch-all: ‘any current and future generations of AMD products employing on-die LDO regulation.’ This is an aggressive pleading posture that effectively placed AMD’s entire on-die power management roadmap within the litigation’s scope. A with-prejudice dismissal covering all claims suggests the resolution — whether a licence or covenant — likely addressed this forward-looking exposure as well, not just the named legacy product families.

Forward-looking scope resolved
Legal analysis based on PACER docket records for case 1:23-cv-01036 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypDetail
KlägerEridanus Technologies, Inc.UnternehmenPatent assertion entity — holder of US7671623B2 and US7372764B2 (on-die LDO regulation)Search in Eureka ↗
BeklagterAdvanced Micro Devices, Inc.UnternehmenAdvanced Micro Devices, Inc. — global semiconductor company, designer of Ryzen, EPYC, and Threadripper CPUsSearch in Eureka ↗
Plaintiff counselDavid T. DeZernAttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Plaintiff counselEdward Nelson , IIIAttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Plaintiff counselJonathan H. RastegarAttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Plaintiff counselRobert A. Delafield , IIAttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Plaintiff counselRyan GriffinAttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Plaintiff counselT. William Kennedy , Jr.AttorneyCounsel for Eridanus Technologies, Inc.Search in Eureka ↗
Defendant counselAhimsa E. HodariAttorneyCounsel for Advanced Micro Devices, Inc.Search in Eureka ↗
Defendant counselBrian K. EricksonAttorneyCounsel for Advanced Micro Devices, Inc.Search in Eureka ↗
Defendant counselDaniel ValenciaAttorneyCounsel for Advanced Micro Devices, Inc.Search in Eureka ↗
Defendant counselJennifer Librach NallAttorneyCounsel for Advanced Micro Devices, Inc.Search in Eureka ↗
Presiding judgeJudge David Alan EzraOberster RichterTexas Western District Court — Chief JudgeSearch in Eureka ↗
Official verdict

Stipulation of dismissal — official text

“The Court has before it the Joint Stipulation of Dismissal filed by Plaintiff Eridanus Technologies, Inc. (“ETI”) and Defendant Advanced Micro Devices, Inc. (“AMD”) on February 6, 2024. (Dkt. # 17.) The Court is of the opinion thatsuch Stipulation is well taken and should be granted. IT IS, THEREFORE, ORDERED that all claims and causes of action brought by Plaintiff against Defendant in the above-captioned lawsuit are DISMISSED in their entirety WITH prejudice, and that, as between Plaintiff and Defendant, each will bear their own costs, expenses, and legal fees in this case. The Clerk is INSTRUCTED TO CLOSE THE CASE. IT IS SO ORDERED.”
Source: PACER Docket, Case 1:23-cv-01036, Texas Western District Court · Filed February 7, 2024

The court’s order adopts the Joint Stipulation verbatim, dismissing all claims with prejudice and imposing no fee award. The ‘with prejudice’ designation is legally significant: it forecloses any future refiling of these specific claims by Eridanus against AMD. The symmetric own-costs ruling signals a negotiated exit rather than a litigated outcome — no party conceded infringement or validity, and no judicial finding on the merits was made. The order’s brevity reflects the court’s limited role in ratifying a privately agreed resolution.

PACER case 1:23-cv-01036 · Public docket record Explore in Eureka ↗
Patent at issue

US7671623B2 & US7372764B2 — On-Die LDO Voltage Regulation for Processors

Publication No.US7671623B2
Application No.US11/701973
Patent details
AssigneeEridanus Technologies, Inc.
ProductUS7671623B2 — on-die LDO voltage regulation, CPU/APU power management
Publication typeB2 — grant (with prior publication)
Cited in actionSeptember 1, 2023

Publication No.US7372764B2
Application No.US11/200867
Patent details
AssigneeEridanus Technologies, Inc.
ProductUS7372764B2 — on-die LDO regulation, integrated processor power delivery
Publication typeB2 — grant (with prior publication)
Cited in actionSeptember 1, 2023

US7671623B2 (application no. US11/701973) and US7372764B2 (application no. US11/200867) both concern on-die low-dropout (LDO) voltage regulation — a technique for managing power delivery directly within a processor die rather than relying solely on external voltage regulators. On-die LDO regulation enables finer-grained, faster-responding power management across processor cores and subsystems, which is critical for performance and energy efficiency in modern CPUs, APUs, and embedded processors. Both patents were asserted as covering the integrated power management architecture deployed across AMD’s Ryzen, EPYC, Threadripper, and Embedded processor lines.

On-die LDO regulation has become a standard design technique in high-performance semiconductor architectures, making these patents strategically significant across the industry. Any processor designer — including Intel, Qualcomm, Arm licensees, and custom silicon teams — implementing integrated voltage regulation may face exposure to similar patent families. The assertion against more than 15 AMD product families, including a forward-looking catch-all clause, suggests Eridanus viewed these patents as broadly applicable across generations of silicon, not merely legacy designs. Companies with on-die power management in their roadmaps should treat this patent family as a monitoring priority.

Patent data sourced from USPTO via PatSnap Eureka patent database Search patent records in Eureka ↗
Freedom to operate

Should your team run an FTO against US7671623B2 and US7372764B2?

If your organisation designs, manufactures, or licenses processors or SoCs incorporating on-die LDO voltage regulation — including CPUs, APUs, embedded processors, or custom silicon for data centre or edge applications — these two patents warrant direct FTO scrutiny. The Eridanus v. AMD case demonstrates that this technology area is actively asserted, and the broad accused-product list suggests the patents’ claims may be interpreted expansively. R&D teams integrating on-die power management in next-generation designs should not assume that prior AMD case resolution extinguishes risk for other implementers.

PatSnap Eureka’s FTO Search Agent allows you to map the full claim scope of US7671623B2 and US7372764B2 against your specific design architecture in minutes, surfacing relevant prior art and identifying claim elements that may read on your implementation. Eureka’s claim monitoring feature can also alert your team to continuation applications or related family members filed by Eridanus Technologies that may extend coverage beyond the two asserted patents. Proactive FTO analysis before tape-out is substantially less costly than litigation defence after product launch.

PatSnap Eureka FTO Search

Run a freedom-to-operate analysis on US7671623B2 to assess your product’s exposure

Run FTO in Eureka →
Related litigation

Similar patent cases in CPU power management and on-die voltage regulation

PatSnap Eureka tracks related litigation across truck body equipment, vehicle accessories, and comparable infringement actions in the Georgia district system.

🔍
Access 40+ similar cases in PatSnap Eureka
Eridanus Technologies, Inc. patent enforcement history, Texas Western case history, Eridanus Technologies, Inc.’s full IP portfolio, and comparable case analysis
NPE v. Intel: LDO patentsW.D. Tex. CPU IP dismissalsAMD patent litigation historyPower delivery IC assertions
Unlock similar cases in Eureka →
Strategic implications

What this case signals for the CPU power management IP landscape

This swift resolution highlights active patent assertion in on-die voltage regulation — a foundational technology across modern processor architectures.

On-die LDO regulation is an active assertion target — monitor it

US7671623B2 and US7372764B2 cover on-die LDO voltage regulation, a technique embedded in virtually all modern high-performance CPUs and APUs. The breadth of accused products — spanning Ryzen, EPYC, and Threadripper — suggests these patents were asserted as broadly applicable. Any company designing or selling processors with integrated power management should assess exposure to these patent families and their continuations.

Western District of Texas remains a favoured venue for NPE patent assertions against chipmakers

Filing in the Western District of Texas (Waco division) is a deliberate strategic choice for patent asserters. The district has historically shown faster scheduling and plaintiff-friendly procedural norms. The 159-day resolution here may reflect AMD’s incentive to settle quickly rather than engage in prolonged litigation in this venue. Semiconductor defendants should weigh venue transfer strategies early when sued in W.D. Tex.

🔒
Full strategic analysis in PatSnap Eureka
Includes sector IP trends, Judge Treadwell’s case history, and FTO risk assessment for the truck equipment space
Eridanus portfolio mapW.D. Tex. NPE filing trendsLDO regulation prior art landscape
Unlock full analysis →
Analysis powered by PatSnap Eureka Litigation Intelligence Explore in Eureka ↗
Häufig gestellte Fragen

Eridanus v Advanced — key questions answered

Still have questions? PatSnap Eureka can answer them instantly from patent and litigation data. Ask Eureka ↗
PatSnap Eureka

Run your own FTO analysis on on-die LDO regulation patents

Use PatSnap Eureka’s FTO Search Agent to assess your exposure to US7671623B2, US7372764B2, and related family members. Set claim monitoring alerts to track new Eridanus Technologies filings before your next processor design reaches tape-out.

Ask anything about this case.
PatSnap Eureka searches patents and litigation data to answer instantly.
Unterstützt von PatSnap Eureka
Link copied to clipboard

Help us improve this page

Found incorrect or outdated information? Let us know and we'll get it fixed.