Analog Devices v. Xilinx: Federal Circuit Affirms Patent Invalidity in Bootstrapped Switching Circuit Dispute
Que souhaitez-vous faire ensuite ?
Choisissez votre parcours en fonction de vos besoins actuels :
📋 Résumé de l'affaire
| Nom de l'affaire | Analog Devices, Inc. v. Xilinx, Inc., et al. |
| Numéro de dossier | 22-1536 (Fed. Cir.) |
| Tribunal | Federal Circuit, Appeal from D.C. Circuit Region |
| Durée | MAR 2022 – MAR 2024 722 days |
| Résultat | Defendant Win — Patent Invalidated |
| Brevet en cause | |
| Produits incriminés | Bootstrapped switching circuits within Xilinx’s product line |
Aperçu du dossier
Les parties
⚖️ Demandeur
A global semiconductor leader specializing in data conversion, signal processing, and power management integrated circuits.
🛡️ Défendeur
Prominent developer of programmable logic devices, FPGAs, and adaptive computing solutions, now a subsidiary of AMD.
Le brevet en cause
This case centered on U.S. Patent No. 10,250,250 B2, covering bootstrapped switching circuit technology. This patent is a fundamental building block in analog front-end design, critical for achieving low on-resistance and linearity in high-speed sampling applications.
- • US10,250,250 B2 — Bootstrapped switching circuit configurations for enhanced switching performance
Designing a similar circuit?
Check if your circuit design might infringe this or related patents before launch.
Le verdict et l'analyse juridique
Résultat
The Federal Circuit issued a clear, unambiguous ruling: AFFIRMED. The court upheld the finding that U.S. Patent No. 10,250,250 B2 is unpatentable, effectively canceling Analog Devices’ patent rights in the bootstrapped switching circuit claims at issue. No damages award was applicable given the invalidity determination, and injunctive relief was rendered moot by the cancellation finding.
Principales questions juridiques
While the complete written opinion details were not available, the Federal Circuit’s affirmance of unpatentability in this technology context typically turns on one or more of the following grounds: **Obviousness (35 U.S.C. § 103)**, **Anticipation (35 U.S.C. § 102)**, or challenges related to **Claim Construction**. The ruling reinforces that even patents covering commercially significant circuit techniques face rigorous validity review when challenged by well-resourced defendants.
Freedom to Operate (FTO) Analysis for Circuit Design
This case highlights critical IP risks in semiconductor circuit design. Choose your next step:
📋 Comprendre l'impact de cette affaire
Learn about the specific risks and implications from this litigation in semiconductor IP.
- Voir tous les brevets liés à ce domaine technologique
- See which companies are most active in circuit design patents
- Understand claim construction patterns for analog circuits
🔍 Check My Circuit’s Risk
Run a comprehensive FTO analysis for your own technology or circuit design.
- Input your circuit description or technical features
- L'IA identifie les brevets susceptibles de constituer un obstacle
- Obtenir un rapport d'évaluation des risques exploitable
Zone hautement surveillée
Bootstrapped switching circuits face strong prior art
Deep Prior Art
Extensive existing literature and patents
Invalidity Confirmed
Signals wider FTO in this specific area
✅ Points clés à retenir
Federal Circuit affirmance of bootstrapped switching circuit patent invalidity confirms aggressive prior art scrutiny in mature analog technologies.
Rechercher la jurisprudence connexe →Invalidity/cancellation actions via post-grant proceedings represent a high-efficacy defense strategy against semiconductor patent assertions.
Explorer les précédents →Foire aux questions
The case involved U.S. Patent No. 10,250,250 B2 (Application No. US15/689,491), covering bootstrapped switching circuit technology.
The court affirmed the finding that the patent was unpatentable, upholding an invalidity/cancellation determination in an appeal decided March 6, 2024.
The affirmance signals continued Federal Circuit scrutiny of analog circuit patents and strengthens the strategic case for post-grant invalidity challenges in semiconductor IP disputes.
Prêt à renforcer votre stratégie en matière de brevets ?
Rejoignez plus de 18 000 professionnels de la propriété intellectuelle qui utilisent PatSnap Eureka pour effectuer des recherches d'antériorité, rédiger des brevets et analyser le paysage concurrentiel avec une précision optimisée par l'IA.
Références
- United States Court of Appeals for the Federal Circuit — Case 22-1536
- U.S. Patent and Trademark Office — Patent Center (US10250250B2)
- PACER — Accès public aux dossiers judiciaires électroniques
- Cornell Legal Information Institute — 35 U.S.C. § 102 (Anticipation)
- Cornell Legal Information Institute — 35 U.S.C. § 103 (Obviousness)
Cet article est publié à titre purement informatif et ne constitue en aucun cas un avis juridique. Toutes les informations relatives aux affaires sont tirées de dossiers judiciaires accessibles au public. Pour en savoir plus sur les fonctionnalités de la plateforme, rendez-vous sur PatSnap.