Bell Semiconductor v. ASMedia Technology: Semiconductor IP Dispute Closed by Stipulation
Bell Semiconductor asserted two semiconductor process patents — covering interconnect layer fabrication and clock-net dummy metal methods — against ASMedia Technology in the Southern District of New York. The case ran approximately 16 months before closing in January 2024 via a court-directed stipulation of dismissal.
Stipulated dismissal closes SDNY semiconductor process patent dispute
Bell Semiconductor, LLC filed this patent infringement action against ASMedia Technology, Inc. on September 23, 2022 in the Southern District of New York (Case No. 1:22-cv-08166). Bell asserted two patents: US7007259B2, directed to a method for making an interconnect layer and a semiconductor device incorporating it, and US6436807B1, covering a method for providing clock-net aware dummy metal using dummy regions. ASMedia Technology is a semiconductor company known for producing USB and PCIe connectivity chips, making its products plausibly within the technical scope of the asserted process patents.
The case was closed on January 18, 2024, after the court lifted a pre-existing stay specifically to allow filing of a stipulation of dismissal. The Clerk of Court was directed to file the stipulation and close the matter. The basis of termination is recorded as ‘Other,’ and the public record does not specify whether the dismissal was entered with or without prejudice. The stay mechanism that preceded dismissal suggests the parties may have been engaged in parallel proceedings — potentially inter partes review or a co-pending related action — during part of the case’s lifetime.
The approximately 16-month lifespan of this case, ending in a negotiated stipulation rather than a merits ruling, is consistent with a pre-trial resolution — whether through settlement, licensing agreement, or another form of disposition not publicly disclosed. The lifting of the stay solely to file the stipulation suggests the resolution was reached while the stay was still in force, implying external or parallel process drove the outcome. What specific terms were reached, and whether Bell retains the right to refile against ASMedia, remains unknown from the public docket.
Filing to filing in 482 days
Case duration: filed Sep 2022, closed Jan 2024
Case closed by stipulation of dismissal — prejudice terms not publicly confirmed
Stay lifted solely to process the dismissal
The court’s order is notable: the stay on this case was lifted not to resume litigation but exclusively to allow the stipulation of dismissal to be filed and the case to be closed. This procedural sequence suggests the parties reached their resolution while the stay was still operative — meaning external proceedings (such as USPTO review or a parallel district court action) likely ran concurrently and may have shaped the outcome.
Stay → Stipulation → CloseWith or without prejudice? The record is silent
A dismissal ‘with prejudice’ would permanently bar Bell Semiconductor from refiling the same patent claims against ASMedia. A dismissal ‘without prejudice’ preserves that right. The public docket records the basis of termination as ‘Other’ and does not specify which applies here. Practitioners should not assume either outcome — the stipulation’s precise terms would require direct review of the filed document to determine Bell’s future enforcement rights against ASMedia on these patents.
Prejudice terms: undisclosedBell Semiconductor: a focused patent assertion entity
Bell Semiconductor, LLC is a patent assertion entity that holds and enforces semiconductor process patents. Asserting patents covering foundational fabrication methods — interconnect formation and dummy metal placement — against a fabless chip designer like ASMedia suggests Bell’s strategy targets companies whose products are manufactured using these processes, even if ASMedia itself does not fab silicon. This is a common enforcement vector in the semiconductor IP space.
PAE enforcement patternPre-trial closure consistent with licensing or settlement
The case closed without any reported claim construction ruling, summary judgment, or trial. Stipulated dismissals at this stage of litigation — following a stay and before merits engagement — typically signal that the parties reached a private resolution, most commonly a patent licence or settlement agreement. The financial terms, if any, are not part of the public record. Competitors of ASMedia in the USB and PCIe IC space should note this pattern when assessing Bell Semiconductor’s enforcement posture.
Likely private resolutionFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Bell Semiconductor, LLC | Company | Patent assertion entity — holder of US7007259B2 and US6436807B1 (semiconductor process patents)Search in Eureka ↗ |
| Defendant | ASMEDIA Technology, Inc. | Company | ASMedia Technology, Inc. — fabless semiconductor company specialising in USB and PCIe connectivity ICsSearch in Eureka ↗ |
| Plaintiff counsel | Adam Rodriguez | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Defendant counsel | Christopher Schmidt | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Eric A. Buresh | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Richard Straussman | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Presiding judge | Judge Unassigned | Chief Judge | New York Southern District Court — Chief JudgeSearch in Eureka ↗ |
Stipulation of dismissal — official text
The court’s order directing the Clerk to file the stipulation of dismissal and close the case is a procedural termination rather than a merits ruling. No findings on infringement, validity, or damages were made. The order’s explicit reference to lifting the stay ‘for the purposes of’ filing the stipulation confirms the case was resolved entirely outside the merits track. Neither party secured a judicial determination on the patents’ validity or scope — leaving the patents technically intact and potentially available for further assertion.
US7007259B2 & US6436807B1 — Semiconductor Interconnect and Dummy Metal Methods
US7007259B2 (application no. US10/632622) claims a method for making an interconnect layer and a semiconductor device that includes such a layer — a foundational process step in IC fabrication governing how conductive pathways are formed between transistors. US6436807B1 (application no. US09/484310) covers a method for providing clock-net aware dummy metal using dummy regions, a design-for-manufacturability technique used to improve pattern density uniformity during chemical mechanical planarisation. Both patents address back-end-of-line semiconductor manufacturing processes relevant to virtually any advanced IC.
From a competitive standpoint, these patents are strategically significant because the methods they protect are embedded in foundry process flows rather than in chip architecture — meaning exposure can arise regardless of a company’s own design choices, depending on how their foundry implements these steps. For fabless companies like ASMedia, whose USB and PCIe chips are manufactured at third-party foundries, this creates a structural vulnerability. The case suggests Bell Semiconductor views these patents as commercially licensable assets and is prepared to litigate to establish that value.
Should your team run an FTO against US7007259B2 and US6436807B1?
Any fabless semiconductor company whose products are manufactured using advanced CMOS process nodes should consider whether their foundry’s interconnect formation and dummy metal processes fall within the claim scope of US7007259B2 and US6436807B1. This is especially relevant for designers of USB, PCIe, and high-speed interface ICs — the product categories directly implicated by Bell’s action against ASMedia. The risk is not limited to direct competitors of ASMedia; any company using similar foundry processes may face comparable exposure.
PatSnap Eureka’s FTO Search Agent can map the independent claims of US7007259B2 and US6436807B1 against your product and process documentation, flag prior art that may support invalidity arguments, and identify the claim elements most likely to be disputed. Claim monitoring alerts can notify your team if Bell Semiconductor files continuation applications that extend the patent family’s coverage — a common tactic by assertion entities to maintain enforcement leverage beyond the original grant.
Run a freedom-to-operate analysis on US7007259B2 to assess your product’s exposure
Run FTO in Eureka →Related semiconductor process patent infringement cases in US district courts
PatSnap Eureka tracks related litigation across truck body equipment, vehicle accessories, and comparable infringement actions in the Georgia district system.
Related equipment manufacturer v competitor
Similar voluntary dismissal in the specialty truck body space after 112-day proceedings. Patent holder and defendant reached confidential licensing terms.
Settled · 112 daysUtility vehicle equipment patent infringement
Comparable Method for making an interconnect layer and a semiconductor device including the same-adjacent infringement action in the 11th Circuit. Design patent vs utility patent enforcement dynamics analysed in depth.
Active · District CourtLawn truck body system trade dress dispute
Trade dress and utility patent combined action involving lawn and landscaping truck manufacturers. Decided on summary judgment after 9 months.
Decided · Summary judgmentBell Semiconductor, LLC’s broader IP enforcement history
Bell Semiconductor, LLC’s full litigation history covering prior enforcement, licensing activity, and inter partes review proceedings.
Portfolio viewWhat this case signals for the semiconductor IP enforcement landscape
Bell Semiconductor’s assertion of foundational process patents against a fabless IC designer follows a recognisable PAE playbook — and the outcome warrants attention from anyone in the semiconductor supply chain.
Foundational process patents remain potent tools against fabless designers
Even companies that do not operate fabs can face infringement exposure when their products are manufactured using patented process steps. Bell’s assertion of interconnect and dummy metal method patents against ASMedia illustrates how process IP can be wielded against downstream chip designers. R&D and IP teams at fabless companies should audit their foundry partners’ process documentation for potential exposure to asserted method claims.
The stay-then-dismiss pattern suggests parallel proceedings shaped the outcome
The court’s stay prior to dismissal is a procedural flag worth tracking. Stays in patent cases frequently accompany inter partes review petitions at the USPTO. If an IPR was filed on US7007259 or US6436807, its outcome — or the threat of it — may have influenced the settlement posture of both parties. Monitoring USPTO PTAB records for these patent numbers provides additional strategic context not visible from the district court docket alone.
Bell Semiconductor’s broader assertion portfolio signals ongoing risk
Bell Semiconductor has filed multiple patent infringement actions asserting semiconductor process patents across different defendants. The stipulated dismissal here does not signal retreat — it may reflect a licensing deal that validates the patents’ commercial value. Companies in the interconnect and PCIe/USB IC space should map Bell’s full assertion portfolio to assess which patents remain live enforcement threats and whether their own products or foundry processes fall within claim scope.
SDNY venue choice carries specific strategic implications for defendants
Filing in the Southern District of New York rather than WDTX or Delaware is atypical for semiconductor PAE cases and may reflect Bell’s calculation about defendant nexus or litigation economics. SDNY’s docket and judicial assignment patterns can influence case pace and discovery burden. Defendants facing similar assertions should factor venue into their early litigation strategy, including whether transfer motions are viable given the specific connections alleged.
Bell v ASMEDIA — key questions answered
Bell Semiconductor asserted two patents: US7007259B2, covering a method for making an interconnect layer and a semiconductor device including the same, and US6436807B1, covering a method for providing clock-net aware dummy metal using dummy regions. Both are semiconductor fabrication process patents filed via application numbers US10/632622 and US09/484310 respectively.
The public record confirms the case was subject to a stay prior to dismissal but does not specify the precise reason for the stay. In patent litigation, stays commonly accompany inter partes review petitions at the USPTO or parallel proceedings in another forum. The stay was lifted solely to allow the stipulation of dismissal to be filed, suggesting the underlying dispute was resolved while the stay remained in force.
The public docket records the basis of termination as ‘Other’ and does not specify whether the dismissal was entered with or without prejudice. Without reviewing the filed stipulation directly, it is not possible to determine whether Bell Semiconductor retains the right to refile the same claims against ASMedia Technology on the asserted patents.
Bell Semiconductor, LLC is a patent assertion entity that holds and enforces semiconductor process patents. Its strategy — asserting foundational back-end-of-line fabrication method patents against fabless chip designers — is consistent with a licensing-focused enforcement model. By targeting companies whose products are manufactured using patented process steps, Bell can assert infringement without needing to show that the defendant itself operates a fab.
The stipulated dismissal without a merits ruling means US7007259B2 and US6436807B1 were not invalidated or found not infringed by a court. Both patents remain active enforcement assets. Companies in the USB, PCIe, and high-speed interface IC space — particularly fabless designers — should conduct freedom-to-operate analysis against these patents and monitor Bell Semiconductor’s assertion activity and any continuation filings that may extend the patent families.
Run your own semiconductor patent litigation analysis
Use PatSnap Eureka to map claim scope, run FTO searches against US7007259B2 and US6436807B1, and track Bell Semiconductor’s enforcement activity across all active and closed cases.
PatSnap Eureka searches patents and litigation data to answer instantly.