Daedalus Prime vs. Qualcomm: ITC Patent Dispute Settles in Processor Power Management Case
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📋 Résumé de l'affaire
| Nom de l'affaire | Daedalus Prime, LLC v. Qualcomm, Inc. |
| Numéro de dossier | 337-TA-1335 (ITC) |
| Tribunal | USITC, Washington, D.C. |
| Durée | Sep 2022 – Apr 2024 1 year 7 months (576 days) |
| Résultat | Settled — Terms Undisclosed |
| Brevets en cause | |
| Produits incriminés | Qualcomm Snapdragon SoC Products (asymmetric multicore processors, power management systems) |
Aperçu du dossier
Les parties
⚖️ Demandeur
A non-practicing entity (NPE) whose patent portfolio is focused on processor and computing architecture technologies.
🛡️ Défendeur
A San Diego-based multinational semiconductor and telecommunications company, dominant supplier of mobile application processors and modem chipsets globally.
Les brevets en cause
This case involved four U.S. patents covering asymmetric multicore processor architecture and processor power management technologies, foundational IP underpinning modern mobile and embedded computing.
- • US10049080B2 — Asymmetric performance multicore architecture using a shared instruction set architecture
- • US8898494B2 — Dynamic power budget allocation across multiple processor domains
- • US8775833B2 — Enabling a non-core domain to control memory bandwidth within a processor
- • US10705588B2 — Power budgeting among processing core, graphics core, and integrated circuit bus when performance limits are reached
Developing a new processor or SoC?
Check if your chip architecture might infringe these or related patents before launch.
Le verdict et l'analyse juridique
Résultat
The investigation was **terminated by settlement** on April 11, 2024, after 576 days of litigation. Specific financial terms of the settlement were not publicly disclosed, consistent with standard ITC settlement confidentiality practices. No exclusion order or cease-and-desist order was entered, as the case resolved before a final Commission determination.
Principales questions juridiques
The infringement action rested on Qualcomm’s implementation of asymmetric multicore architectures and dynamic power management systems. The ITC venue selection was strategically significant; unlike district court litigation, ITC proceedings do not allow for monetary damages but offer the powerful remedy of **exclusion orders** — effectively barring importation of accused products into the United States. For a company like Qualcomm, whose supply chain is internationally structured, such an order would carry severe commercial consequences, providing Daedalus Prime with strong settlement leverage.
Analyse de la liberté d'exploitation (FTO)
This case highlights critical IP risks in semiconductor design. Choose your next step:
📋 Comprendre l'impact de cette affaire
Découvrez les risques et les implications spécifiques liés à ce litige.
- View all 4 patents at issue in this technology space
- See which companies are most active in processor IP
- Comprendre les modèles d'interprétation des revendications
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Zone à haut risque
Asymmetric Multicore Processors / Dynamic Power Management
4 Brevets en cause
Dans l'espace de l'architecture des processeurs
Options de contournement
Disponible pour la plupart des réclamations
✅ Points clés à retenir
ITC Section 337 remains a high-leverage venue for semiconductor patent assertions.
Rechercher la jurisprudence connexe →Multi-patent complaints covering interrelated technology layers strengthen settlement positions.
Explorer les précédents →Review US10049080B2, US8898494B2, US8775833B2, and US10705588B2 for prosecution and portfolio benchmarking insights.
Analyze this patent family →Foire aux questions
Four U.S. patents: US10049080B2, US8898494B2, US8775833B2, and US10705588B2, covering multicore processor architecture and dynamic power management systems.
Specific terms were not disclosed. However, the exclusion remedy available at the ITC — which could block Qualcomm’s chip imports — typically creates strong commercial incentive for settlement before a final Commission ruling.
It reinforces the ITC as a preferred NPE venue for semiconductor assertions and highlights power management and heterogeneous computing as active areas of IP risk for chip developers.
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Références
- USITC Section 337 Case Database
- Brevets Google
- USPTO Public Patent Application Information Retrieval (PAIR)
- PatSnap — Solutions de veille en matière de propriété intellectuelle pour les cabinets d'avocats
Cet article est publié à titre purement informatif et ne constitue en aucun cas un avis juridique. Toutes les informations relatives aux affaires sont tirées de dossiers judiciaires accessibles au public. Pour en savoir plus sur les fonctionnalités de la plateforme, rendez-vous sur PatSnap.