Material foundations: what separates GaN from SiC

GaN and SiC differ fundamentally in crystal structure, device architecture, and the physical mechanisms that determine switching performance. GaN devices are predominantly lateral structures — specifically high-electron-mobility transistors (HEMTs) — that exploit the two-dimensional electron gas (2DEG) formed at the AlGaN/GaN heterointerface. This 2DEG channel delivers exceptionally high electron mobility, up to approximately 2,000 cm²/V·s at 300K, enabling ultra-fast switching with minimal gate charge and near-zero reverse recovery losses. GaN’s bandgap of 3.4 eV — roughly three times that of silicon — provides superior electron transport, saturation drift velocity, and breakdown field.

SiC devices, by contrast, are primarily vertical structures — MOSFETs and JFETs — that leverage 4H-SiC’s wide bandgap of approximately 3.26 eV, high thermal conductivity, and high critical breakdown field. SiC’s thermal conductivity is approximately 3–5 times higher than that of GaN, enabling reliable operation at elevated junction temperatures. This makes SiC the preferred substrate for applications where sustained high-temperature operation is a design constraint.

SiC MOSFETs suffer from low channel mobility in MOS interfaces — a fundamental processing challenge — and SiC JFETs require bulky gate driver circuits. GaN normally-off operation is achieved through p-GaN gate structures, recessed gate architectures, or cascode arrangements with Si MOSFETs. The key device structures spanning the WBG landscape include GaN HEMTs (lateral, enhancement-mode and depletion-mode), p-GaN gate devices, SiC MOSFETs (vertical, 4H-SiC planar and trench), SiC JFETs (normally-on, high voltage), and GaN/SiC cascode hybrids.

Performance envelope: frequency, voltage, and efficiency compared

GaN technologies are suited for working in high-frequency power electronic systems operating in the MHz range, while SiC JFETs are suitable for relatively high-voltage and lower-frequency applications. This is not a marginal distinction — it defines the entire system architecture around each technology.

Measured performance in the literature demonstrates GaN-based converters achieving efficiencies up to 99.6% in DC-to-DC flyback topologies at frequencies exceeding 1 MHz, and 96.8% peak efficiency in synchronous buck converters operating at 100 kHz to 1 MHz, outperforming silicon counterparts at all tested frequencies. GaN-based converters targeting data centre and consumer applications achieve power densities of 35–80 W/in³ at over 1 MHz operation.

SiC’s distinct advantage is its rated voltage range, spanning from hundreds to thousands of volts, which GaN HEMTs cannot match in lateral device configurations. SiC also provides more predictable zero-voltage-switching (ZVS) behaviour in LLC resonant converter topologies. In the RF and microwave domain, AlGaN/GaN on SiC substrates demonstrates operation up to GHz frequencies with high drain current (0.5 A/mm) and transconductance (150 mS/mm), occupying a distinct performance tier above power conversion applications.

“GaN and SiC will be coexistent — each has its own advantages and neither can replace the other.”

A critical asymmetry concerns output capacitance (Coss) losses: even under zero-voltage switching (ZVS) conditions, GaN HEMT devices exhibit high Coss losses in the high-frequency (HF) and very-high-frequency (VHF) ranges, whereas SiC JFET Coss energy loss per cycle shows little frequency dependence. This characteristic motivates the GaN/SiC cascode combination discussed later in this article — and it is one of the most technically precise arguments for hybridisation rather than a single-material approach, as documented by researchers at IEEE.

Where each technology wins: application domain mapping

GaN dominates the sub-650 V, high-frequency design space above 500 kHz. SiC retains the high-voltage, moderate-frequency segment above 1,200 V and below 200 kHz. These are not competitive overlaps — they are complementary territories defined by physics.

DC-DC power conversion: consumer, data centre, and telecom

GaN devices dominate retrieved patent filings targeting compact, high-frequency DC-DC converters for phone chargers, laptop adapters, server power supplies, and distributed power architectures. The dataset documents GaN-based converters achieving over 1 MHz operation with power densities of 35–80 W/in³. Key commercial filings include high-efficiency isolated DC-DC converters from Zhejiang University and high-density power converters from Innoscience (Suzhou) Technology, demonstrating the breadth of applications served by GaN in this segment.

Motor drives and industrial inverters

GaN HEMT advantages in motor drive systems include reduced filter size, improved torque control bandwidth, and lower system weight — all enabled by higher switching frequency. However, SiC MOSFETs remain the preferred device for traction inverters requiring blocking voltages above 600 V. EV traction inverters, grid-tied converters, and industrial motor drives at voltage levels above 1,200 V fall within SiC’s performance envelope, with Infineon Technologies AG’s 2025 US SiC vertical device filing still asserting broad claims in this segment, as tracked by PatSnap’s IP management platform.

RF, microwave, and defence

AlGaN/GaN on SiC substrates occupies a distinct position in RF and noise performance studies, demonstrating suitability up to GHz frequencies with drain current of 0.5 A/mm and transconductance of 150 mS/mm. A monolithic GaN microwave power switch integrated with Si CMOS driver was filed by the 55th Research Institute of China Electronics Technology Group Corporation, targeting communications and radar systems. As noted by WIPO, defence and communications applications represent a growing driver of wide-bandgap IP activity across multiple jurisdictions.

Space and radiation-hardened applications

GaN’s inherent radiation resistance is highlighted in a patent from the 43rd Research Institute of China Electronics Technology Group Corporation, targeting space-use radiation-hardened DC/DC converters. The filing explicitly notes GaN’s “higher functional conversion efficiency than silicon and inherent radiation resistance” — a differentiation entirely absent from SiC-focused filings in the analysed dataset, indicating an emerging niche where GaN has no direct SiC competitor.

The emerging hybrid frontier: GaN/SiC cascode and monolithic integration

The most active and contested innovation space in wide-bandgap power electronics is no longer “GaN versus SiC” — it is “GaN plus SiC” in a single package or chip. The patent record from 2023 to 2026 documents four distinct directions in this hybridisation trend.

1. GaN/SiC cascode packaging

A GaN/SiC cascode device pairs a normally-on, high-voltage SiC JFET (for blocking capability) with a normally-off, low-voltage GaN HEMT (for gate control and fast switching). This topology combines the fast switching of GaN’s 2DEG channel with SiC’s superior high-voltage blocking. Critically, SiC JFET Coss energy loss per cycle shows little frequency dependence, compensating for GaN’s high Coss losses in the HF and VHF ranges even under ZVS conditions. Hong Kong University of Science and Technology (HKUST) filed GaN/SiC cascode packaging patents in CN in 2026 and TW in 2025, focused on minimising parasitic inductance to unlock the full switching speed potential of the combined device.

2. Monolithic GaN-SiC chip integration

Fudan University’s 2023 CN filing proposes a three-zone SiC substrate hosting GaN power devices, GaN driver circuits, and SiC power devices simultaneously on a single chip — an architecture that consolidates what currently requires multiple discrete components. Xidian University Guangzhou Institute’s 2024–2026 filings on enhancement-mode GaN power electronics on SiC substrates address both the substrate’s thermal advantages and GaN’s switching benefits, targeting next-generation power system miniaturisation.

3. Monolithic GaN driver integration

GlobalFoundries filed a 2025 US patent on a gate bias circuit for a GaN driver monolithically integrated with a GaN power FET — eliminating the external Si driver chip entirely. If commercialised, this approach would consolidate the GaN power stage and control into a single GaN die, removing the heterogeneous integration requirement for Si companion chips that characterises current multi-chip module (MCM) packaging. This signals the long-term trajectory that Cambridge GaN Devices Limited and Xidian University filings also point toward, as noted by EPO in its coverage of power semiconductor patent trends.

4. Cascode EMI management for industrial and automotive entry

Two 2023–2025 filings from Jiangsu Nenghwa Microelectronics address the EMI limitations of cascoded GaN structures. The inability to control GaN switching speed via external gate resistance is being addressed through novel cascode topologies and ferrite-based gate loop oscillation suppression. This reflects growing maturity concerns as GaN enters noise-sensitive industrial and automotive markets where electromagnetic compatibility is a regulatory requirement.

IP landscape and geographic concentration

China produces the largest volume of patent filings in the wide-bandgap semiconductor space — approximately 57% of total records in the analysed dataset — driven by state-affiliated research institutes and universities. The United States is the second-largest jurisdiction, with approximately 34% of records, followed by smaller shares from WO, JP, TW, and IN jurisdictions.

The innovation timeline spans from 2007 to 2026. Infineon Technologies Americas Corp. holds the earliest and most foundational hybrid device patents (2007–2025), covering GaN-Si cascode concepts and SiC vertical MOSFETs. The 2007 Infineon “Hybrid semiconductor device” filing established the intellectual basis for GaN-Si cascode normally-off operation that subsequent generations have refined. Cambridge GaN Devices Limited demonstrates the most geographically distributed recent portfolio, with filings across WO, US, JP, and CN — all in 2024–2025 — signalling commercial expansion. Chinese academic institutions including Xidian University, Fudan University, Nantong University, and Zhejiang University are highly active in integration architectures, while Chinese industrial entities including NaVitas Semiconductor (CN subsidiary) and the 43rd and 55th Research Institutes of CETC focus on packaging, cascode structures, and defence-grade applications, as tracked via PatSnap’s R&D intelligence tools.

Strategic implications for R&D and IP teams

Understanding where GaN and SiC diverge — and where they are converging — is essential for R&D investment allocation, freedom-to-operate analysis, and technology roadmap decisions in power electronics. The patent record from 2007 to 2026 surfaces four actionable strategic signals.

GaN’s high-frequency efficiency leadership is established. R&D teams targeting consumer chargers, data centre power supplies, and LED drivers should prioritise GaN HEMT integration and enhancement-mode normally-off solutions. Switching losses are the dominant efficiency bottleneck in these applications, and GaN’s 2DEG channel mobility advantage over SiC is physics-fundamental and will not be erased by process optimisation alone.

SiC’s high-voltage vertical device portfolio remains active and contested. IP strategists should note that Infineon Technologies AG’s SiC MOSFET vertical device portfolio includes a 2025 US filing still asserting broad claims on interlayer dielectric interface engineering in SiC bodies. Entering this segment without a thorough freedom-to-operate review carries significant risk, particularly given Infineon’s foundational position from 2007 onwards.

The GaN/SiC cascode architecture is the most actively contested emerging IP territory. HKUST, Nantong University, and Fudan University all filed in 2023–2026. Organisations entering this space face significant patent density from Chinese academic institutions, whose filings are predominantly in CN jurisdiction but increasingly extend to TW. Western IP strategists should assess freedom-to-operate exposure in Chinese market entry scenarios, particularly for cascode GaN/SiC topologies and GaN-on-SiC substrate architectures.

Monolithic integration represents the long-term trajectory. GlobalFoundries, Cambridge GaN Devices, and Xidian University filings all point toward consolidating GaN power stage and control into a single die. This represents a potential disruption to the current multi-chip module (MCM) packaging paradigm. IP investors should monitor this cluster closely. According to OECD analysis of semiconductor investment trends, wide-bandgap device integration is among the fastest-growing sub-categories in global clean energy technology patents.

Geographic concentration risk is high. Approximately 57% of patent filings in this dataset are in CN jurisdiction. This concentration — driven by state-affiliated research institutes and universities — creates both market access opportunities and freedom-to-operate exposure that western organisations must evaluate systematically before entering Chinese distribution channels with GaN/SiC hybrid or cascode products.