Why photons are replacing electrons for neural network inference

Optical neural networks (ONNs) implement the core computational primitives of artificial neural networks — matrix-vector multiplication, convolution, and nonlinear activation — using photonic hardware rather than electronic logic, enabling multiply-accumulate operations at the speed of light. The fundamental motivation is structural: electronic neural networks are limited by the von Neumann bottleneck, resistive heating, and serial processing constraints, all of which photonic approaches circumvent, as established in review literature from Nanjing University of Science and Technology (2020) and the Army Research Institute, Beijing (2021).

The field encompasses two principal integration paradigms. Free-space optical systems use spatial light modulators (SLMs), diffractive optical elements, and 4f optical configurations to perform layer-by-layer transformations. Integrated photonic platforms use silicon photonic waveguides, Mach-Zehnder interferometers (MZIs), microring resonators (MRRs), and Kerr optical microcombs — the latter generating a comb of evenly spaced wavelengths that can encode synaptic weights across wavelength channels via wavelength-division multiplexing (WDM).

The conceptual basis for physics-based ONN hardware was articulated as early as 2010 at Missouri State University. The period between 2020 and 2021 marks the critical maturation phase, with the highest density of publications in this dataset and multiple demonstrations of integrated photonic chips from groups at Swinburne University, Peking University, A*STAR Singapore, MIT, and the University of Texas at Austin. As documented by WIPO, photonic computing is now one of the fastest-growing deep technology patent categories globally.

Four architectural clusters driving the ONN patent landscape

The optical neural network patent and literature landscape organises into four distinct architectural clusters, each with a different integration strategy, performance profile, and set of leading institutions. Understanding the boundaries between these clusters is essential for mapping white space and competitive exposure.

Cluster 1: Kerr Microcomb-Based Networks

This is the most heavily represented cluster in the dataset, with at least 8 distinct records from Australian and Hong Kong institutions — Swinburne University, Monash University, and City University of Hong Kong — published between 2020 and 2022. The approach encodes synaptic weights across wavelength channels, and a single-neuron perceptron with 49 wavelength channels achieves 11.9 Giga-OPS at 95.2 Gbps throughput. Scaling to convolutional layers reaches beyond 10 Tera-OPS. Swinburne’s 2022 paper targets the PetaOp regime as the next scaling milestone.

Cluster 2: Silicon Photonic Integrated Circuits (MZI Meshes and MRRs)

Silicon photonics provides a CMOS-compatible integration pathway — directly relevant to foundry-scale manufacturing. MZI meshes enable arbitrary unitary matrix operations via singular-value decomposition; microring resonator banks perform weighted summation. A*STAR Singapore’s 2021 neural chip implements complex-valued arithmetic natively via optical interference. Queen’s University (Canada, 2022) demonstrated on-chip training at sub-picojoule per MAC using direct feedback alignment — a non-backpropagation training algorithm compatible with photonic hardware constraints. According to IEEE, silicon photonic integration for AI accelerators is among the most active emerging device research areas.

Cluster 3: Free-Space and Diffractive ONNs

Free-space systems use SLMs, diffractive optical elements, or phase masks to implement layer-by-layer transformations. Nanjing University of Science and Technology’s 4f-based three-layer ONN achieved 93.66% MNIST accuracy. The Changchun Institute of Optics (Chinese Academy of Sciences, 2022) demonstrated a partitionable multilayer diffractive ONN achieving 89.1% MNIST accuracy. Hong Kong University of Science and Technology (2021) published a scalability analysis of all-optical DNNs using SLMs, identifying alignment stability as a key challenge for this approach.

Cluster 4: Hardware-Efficient and Hybrid Optoelectronic Architectures

A growing sub-cluster addresses hardware compression, noise tolerance, and hybrid designs that combine optical linear computation with electronic nonlinear activation. The University of Texas at Austin’s butterfly-style silicon photonic–electronic neural chip (OSNN) uses up to 7× fewer optical components compared with GEMM-based ONNs. Tsinghua University’s LOEN architecture (2022) uses a passive optical mask to perform convolution in a lensless configuration, achieving 97.21% digit classification accuracy. Southern University of Science and Technology’s OCTOPUS architecture (2022) achieves logarithmically scaling circuit depth for noise robustness.

Performance benchmarks: from Giga-OPS to Tera-FLOPS

The Kerr microcomb cluster from Swinburne University of Technology achieved 11.0 Tera-FLOP/second with a photonic convolutional accelerator in 2020 — the benchmark throughput figure in this dataset. This result, alongside the 11.9 Giga-OPS at 95.2 Gbps for a single-neuron perceptron with 49 wavelength channels, establishes the speed ceiling that other architectural approaches are measured against.

Image classification accuracy on MNIST handwritten digit recognition — the field’s standard benchmark — ranges from 89.1% (Changchun Institute of Optics diffractive ONN) to 97.21% (Tsinghua University LOEN lensless architecture) across 10+ papers in this dataset. Cancer cell detection, used as a biomedical benchmark in all Kerr microcomb perceptron papers from City University of Hong Kong, Monash, and Swinburne (2020–2021), achieves 85%+ accuracy — signalling readiness for biomedical screening applications where real-time throughput is critical.

“Data transmission rates approaching 100 Tb/s have been reported in optical communications applications of microcomb neural networks — a figure that reframes ONNs as infrastructure-scale technology, not just accelerator chips.”

On hardware efficiency, the University of Texas at Austin’s OSNN butterfly chip uses up to 7× fewer optical components compared with GEMM-based ONNs. Colorado State University’s CHAMP magnitude pruning achieves 99.45% parameter reduction with negligible accuracy loss — a result with direct implications for chip-scale deployment where component count drives both cost and noise sensitivity. As noted by Nature in recent photonics coverage, hardware-aware co-design is now considered a prerequisite for practical integrated photonic AI systems.

Geographic and assignee concentration signals

China holds the broadest academic base in this dataset, with 12+ distinct institutional assignees including Nanjing University of Science and Technology, Peking University, Tsinghua University, Huazhong University of Science and Technology, Nankai University, the Chinese Academy of Sciences Changchun Institute of Optics, Southern University of Science and Technology, and Beijing Jiaotong University. This breadth spans free-space, integrated, and hybrid ONN architectures — and spans both review literature and experimental demonstrations.

Australia’s Swinburne University of Technology and Monash University together account for 7–8 papers in this dataset — the largest single-group cluster — all centred on the Kerr microcomb approach. These institutions hold the current throughput benchmark. The United States contributes from a diverse set of institutions: MIT (scalable coherent detection architecture, 2020), Caltech (all-optical ReLU, 2022), University of Texas at Austin (OSNN butterfly chip and on-chip learning, 2021–2022), Colorado State University (pruning and optimisation, 2021–2022), Rice University (O-HAS accelerator search framework, 2021), Princeton University (prospects and applications review, 2021), and University of Southern California (parity-time symmetric ONNs, 2021).

Singapore’s A*STAR Institute of Microelectronics provides a notable CMOS-foundry-compatible chip demonstration (2021). Canada’s Queen’s University contributes the key result on photonic on-chip training via direct feedback alignment (2022). France’s FEMTO-ST / Université Bourgogne Franche-Comté advances 3D photonic integration strategies. Patent filings retrieved across IT, JP, KR, and US jurisdictions are sparse relative to literature volume, confirming the field remains largely pre-commercial and R&D-intensive — consistent with the innovation maturity framework published by the OECD for deep technology sectors.

Innovation is distributed across many academic players with no dominant single commercial assignee in this dataset — indicating the field remains largely pre-commercial and R&D-intensive. IP strategists should monitor Chinese university filings, particularly from Tsinghua, Peking University, and CAS affiliates, for integrated photonic chip patents, while Swinburne and Monash microcomb IP represents the current benchmark for throughput claims. The EPO‘s emerging technology patent monitoring programmes cover silicon photonics as a priority category.

Five emerging directions reshaping the ONN commercialisation window

The most recent filings in this dataset (2022–2023) converge on five directions that collectively define the path from Tera-FLOP/s demonstrations to commercially deployable photonic AI systems. Each addresses a different barrier that has historically separated ONN research from production-scale use.

1. All-optical nonlinear activation functions

The long-standing bottleneck of implementing nonlinearity optically — without converting back to electronics — is approaching resolution at the device level. Caltech’s 2022 demonstration of an all-optical ultrafast ReLU function using thin-film lithium niobate operates at femtojoule-regime energy per activation. This enables truly all-optical inference pipelines without electronic intermediaries and removes the last major barrier to fully integrated all-optical inference. R&D teams should prioritise integration of such nonlinear elements with existing MZI or MRR linear layers.

2. On-chip training via non-backpropagation algorithms

Queen’s University’s direct feedback alignment architecture (2022) and the University of Texas at Austin’s sparse zeroth-order optimisation approach (2021) both demonstrate on-chip training that does not require standard backpropagation — a critical constraint for photonic hardware where gradient computation through optical elements is non-trivial. This signals a move toward complete photonic learning systems, not just inference accelerators. On-chip training is the next commercialisation gate: the field can currently deploy pre-trained models on photonic hardware, but fully autonomous photonic learning systems would dramatically expand the addressable market.

3. Noise robustness and hardware-aware pruning

A cluster of Colorado State University papers (2021–2022) on coherent photonic neural network pruning — using the lottery ticket hypothesis and CHAMP magnitude pruning — achieves 99.45% parameter reduction with negligible accuracy loss. A separate paper from the same group optimises coherent photonic networks under random uncertainties. Southern University of Science and Technology’s OCTOPUS architecture achieves logarithmically scaling circuit depth specifically for noise robustness. Naively porting digital neural network architectures to photonic substrates yields poor efficiency; purpose-built photonic-native architectures with hardware-aware training are the competitive frontier.

4. Multichannel and multi-task optical computing

Tsinghua University’s multichannel optical computing architecture for advanced machine vision (2022) and the University of Chinese Academy of Sciences’ invited review on optical convolutional neural networks (2023) both indicate expansion from single-channel digit recognition benchmarks to multi-input, complex vision pipelines. Early movers defining ONN application stacks in these verticals — rather than just the hardware layer — will capture disproportionate value in the 2025–2030 commercialisation window.

5. Novel physical principles — parity-time symmetry and complex-valued arithmetic

University of Southern California’s parity-time symmetric optical neural networks (2021) and A*STAR Singapore’s complex-valued neural chip (2021) represent exploratory architectures exploiting uniquely photonic physics — gain-loss modulation and complex-amplitude encoding — unavailable to electronic systems. These approaches are at lower technology readiness but represent the longest-horizon IP opportunity for assignees willing to stake claims in foundational photonic computing principles.