How Light Replaces Electrons in Neural Network Computation

Optical neural network computing replaces the electronic multiplication-and-accumulation operations that dominate deep learning workloads with equivalent computations performed on photons. The foundational mechanism, articulated across the MIT patent family, is that matrix multiplication can be implemented using optical interference units (OIUs) that apply an arbitrary weighted matrix multiplication to arrays of input optical signals — all executed at the speed of light with inherently low power dissipation.

The physical substrate is the photonic integrated circuit (PIC). Once network weights are trained and programmed onto the nanophotonic processor, forward propagation runs as a passive optical process. Each phase modulator in the chip consumes only approximately 10 mW to maintain its phase setting — a figure documented in MIT’s Device and Method for Optical Neural Network (2021, CN jurisdiction). This compares favourably to the kilowatt-scale power draw of GPU clusters running equivalent workloads. Certain linear transforms, including Fourier transforms, can in some configurations be executed with zero additional power consumption, arising from the passive propagation physics of light through optical elements rather than from active switching.

A fully optical alternative exploits spatial light modulators and optical lenses for the linear layer, with electromagnetic induction transparency (EIT)-based nonlinear optical media providing the activation function without any electronic conversion step — as disclosed by the Hong Kong University of Science and Technology (2020). In this architecture, an optical lens performs a Fourier transform on a beam set, summing beams with similar propagation directions: a computation with no direct electronic analog. Volkswagen’s research branch has explored encoding both neurons and weights directly in the spectral and temporal phase properties of optical signals — such as laser pulse dispersion in materials — enabling information processing at the speed of light.

The Structural Energy Problem Optics Solves

The energy problem in conventional deep learning is structural, not incidental. GPUs implement neural network operations using general-purpose SIMD instruction sets that require extensive front-end decode overhead. More critically, GPU on-chip cache is small, forcing model weights to be transferred repeatedly from off-chip DRAM — a bandwidth bottleneck that incurs enormous power costs at every inference pass, as identified in Cambricon’s Computing Device patent (2020). The number of neural network weights scales as the square of the number of neurons, making the energy and bandwidth cost of distributing weights in an electronic architecture scale poorly with network size.

Optical architectures directly address both problems. In the electro-optic approach documented by Dirk Englund’s group at MIT, weights are encoded on optical pulse amplitudes and distributed optically at terabits per second at a power cost of picojoules per bit. The bandwidth and power advantages are amplified further when the same weights are broadcast to many optical neural networks running in parallel. According to WIPO filing records, Englund’s WO application on serialized electro-optic neural networks (2020) and its US continuation (2021) represent the most advanced scalable ONN accelerator architectures published in the dataset.

“Optical weight encoding achieves terabits per second at picojoules per bit — versus gigabits per second and femtojoules per bit for electronic architectures — fundamentally improving energy scaling with network size.”

In the homodyne-detection architecture, a homodyne detector computes the vector product of inputs and weights using optical interference, with the nonlinear activation performed electronically only on the scalar output of this step — minimising electronic energy use to the irreducible minimum. ARM Limited has reduced this concept to a commercial accelerator design: their Optical Hardware Accelerator (OHA) for artificial neural networks includes a digital-to-optical converter, an ONN processing stage with optical multiply-and-accumulate (OMAC) modules, and an optical-to-digital converter at the output. Each ANN weight is encoded as a quantised phase shift value, as disclosed in ARM’s filings from 2021 and 2022.

The Chinese Academy of Sciences’ Institute of Computing Technology solved a critical early obstacle: sign handling. Their ONN processor architecture (2019) maps both positive and negative neural network weights to integer domains representable by optical neurons, routes them through separate positive-value and negative-value optical computation paths, and combines results with a subtractor after photoelectric conversion — a design that made bidirectional weight representation tractable in the optical domain. The Institute of Semiconductors extended this further by implementing wavelength-division multiplexing (WDM) to represent different data channels at different wavelengths simultaneously, increasing computation parallelism without proportionally increasing power draw.

Training Optical Networks On-Chip: Backpropagation in the Photonic Domain

Training — rather than inference — is where the energy challenge is most acute, and where recent patent activity has concentrated. The dominant ONN application focus has been inference acceleration: once weights are trained and loaded onto the nanophotonic processor, inference runs as a passive optical process with minimal sustained power draw. MIT’s foundational patent family (priority date June 2, 2016) explicitly targets data centre inference, noting that the majority of data centre power and processor cycles are consumed by forward propagation, and that low forward-propagation speed limits deployment in time-critical applications such as autonomous vehicles requiring high-speed parallel image recognition.

Stanford University researchers have disclosed an in-situ backpropagation technique for photonic neural networks that addresses training energy directly. Rather than performing gradient computation off-chip and then reprogramming the photonic device, this method uses adjoint inputs that interfere with forward-pass inputs inside the OIU phase shifters to measure gradients directly from light intensity — avoiding the energy cost of round-tripping data to a digital processor for every training step. Research published by institutions including Nature has tracked the broader photonic computing field’s progress toward on-chip learning as a key milestone for practical deployment.

Tsinghua University extends on-chip training to large-scale networks through a dual-neuron abstraction. Optical neurons are modelled as artificial neurons, global end-to-end gradient descent is applied to optimise all network parameters simultaneously, and then the result is mapped back to the physical optical parameters — enabling networks previously considered too complex to train, as described in Tsinghua’s Method and System for Dual-Neuron Large-Scale Intelligent Optical Computing (US and EP, 2025). A complementary Tsinghua patent addresses logic operations in ONN training by replacing the standard mean-squared-error loss function with a hybrid loss incorporating a logical contrast function that penalises incorrect bit outputs — achieving correct logic operation in the optical domain without increasing energy cost.

A distinct manufacturing challenge complicates ONN training at scale: fabrication imperfections in photonic chips cause the physical chip to deviate from the trained model — a form of hardware noise unique to optical systems. Tsinghua’s robust ONN training method (2023) addresses this by targeting stationary loss extrema, making the loss function flat near the minimum so that small physical errors do not collapse inference accuracy. This eliminates the need for per-chip post-fabrication calibration, which would be prohibitively energy-intensive at scale and represents a critical step toward manufacturable ONN chips. Standards bodies including IEEE have recognised photonic computing fabrication tolerance as an open research challenge in their roadmap publications.

Who Holds the Patents: Key Assignees and Innovation Trends

MIT is the dominant global assignee in core ONN patents. The foundational US application carries a priority date of June 2, 2016, and has generated a continuous stream of continuation and international equivalents in Australia, Canada, China (multiple filings), and the US through at least 2024 — covering the photonic integrated circuit ONN architecture with OIUs and optical nonlinearity units. The breadth of this family means that any commercial photonic neural network using optical interference units for matrix multiplication will likely need to engage with MIT’s IP position.

Tsinghua University is the most active Chinese filer in advanced ONN architecture and training, with patents covering dual-neuron large-scale optical computing (US and EP, 2025), robust ONN training, logic-operation ONN training, and in-memory computing parameter optimisation. This positions Tsinghua as a comprehensive ONN R&D centre spanning architecture, training methodology, and chip-level optimisation — a profile that reflects China’s strategic prioritisation of photonic AI hardware, consistent with OECD analysis of national AI hardware investment patterns.

ARM Limited represents the commercialisation track. Three filings — WO, US 2021, and US 2022 — disclose a complete OHA chip design with OMAC modules, targeting integration into standard SoC environments. This signals industry-grade product development rather than academic research: ARM’s OHA includes digital-to-optical conversion, ONN processing, and optical-to-digital conversion as a coherent pipeline, with each ANN weight encoded as a quantised phase shift value. The University of Pennsylvania’s optoelectronic deep neural network approach extends ONNs to handle diverse input modalities — audio, video, voice, analog, and digital — processed directly in the optical domain and integrated into 3D imagers, optical phased arrays, and photonic-assisted microwave imagers.

Cognifeeber’s network of optical neuron units communicates between layers via multi-core and multi-mode optical fiber waveguides with predetermined coupling, providing cross-layer connectivity in a purely photonic medium (2022). The Korea Electronics and Telecommunications Research Institute has also filed in this space (2023, CN), reflecting the broad geographic spread of ONN research activity documented across the US, China, South Korea, Europe, and Australia in the dataset.

Electronic Complements and the Broader IP Landscape

Optical neural network computing does not exist in isolation. A parallel ecosystem of electronic energy-reduction techniques attacks the same AI power bottleneck from the hardware-acceleration angle — and the patent landscape reflects both competition and complementarity between these approaches. Cambricon (中科寒武纪), Microsoft, Google, Intel, and the Peng Cheng Laboratory all appear as active filers in supplementary electronic energy-reduction approaches, including in-memory computing, analog multiply-accumulate (MAC) circuits, and spiking neural networks.

Cambricon’s Computing Device patent (2020) identifies the DRAM bandwidth bottleneck as the primary energy inefficiency in GPU-based neural network computation — the same structural problem that ONN architectures address optically. Microsoft’s Analog or Mixed MAC Neural Network for Reduced Power (2024, CN) targets the same bottleneck through analog computation rather than photonics. The Peng Cheng Laboratory’s Energy Consumption Calculation patent for deep spiking neural network training architectures (2025, CN) represents yet another angle: spike-based computation that reduces the number of active multiply-accumulate operations per inference pass. Patent offices including the EPO have seen significant growth in filings across all three of these complementary categories since 2020.

These electronic approaches are not displaced by ONN technology — they coexist with it. An ONN accelerator still requires digital control logic, memory interfaces, and bus integration; ARM’s OHA design explicitly incorporates these electronic elements. The practical near-term architecture for energy-efficient AI hardware is likely to be optoelectronic hybrid: optical linear computation for the energy-dominant matrix-multiplication layers, with electronic circuits handling control, nonlinear activation, and memory management. The dataset of over 60 patents spanning 2017 to 2025 captures this hybrid trajectory across five jurisdictions — a breadth that reflects the genuinely global race to solve AI’s power crisis through photonic means.