How Light Replaces Electrons in Neural Network Computation
Optical neural network computing replaces the electronic multiply-and-accumulate (MAC) operations that dominate deep learning workloads with equivalent computations performed on photons. The foundational mechanism, articulated across the MIT patent family, is that matrix multiplication can be implemented using optical interference units (OIUs) that apply an arbitrary weighted matrix multiplication to arrays of input optical signals — all executed at the speed of light with inherently low power dissipation.
The physical substrate is the photonic integrated circuit (PIC). Once network weights are trained and programmed onto the nanophotonic processor, forward propagation runs as a passive optical process. Each phase modulator in the chip consumes only approximately 10 mW to maintain its phase setting — a figure documented in MIT’s 2021 Chinese patent on Device and Method for Optical Neural Network. This compares favourably to the kilowatt-scale power draw of GPU clusters running equivalent workloads.
In photonic integrated circuit–based optical neural networks, each phase modulator consumes approximately 10 mW to maintain its phase setting, compared to the kilowatt-scale power draw of GPU clusters running equivalent deep learning workloads (MIT, 2021).
Linear transforms such as Fourier transforms can, in some photonic ONN configurations, be executed with zero additional power consumption — they arise from the passive propagation physics of light through optical elements, as explained in MIT’s 2024 Chinese patent filings. This is a qualitative advantage with no electronic analog: there is no equivalent “free” Fourier transform in silicon.
An OIU is the photonic equivalent of a matrix-multiplication layer in a conventional neural network. It applies a weighted matrix transformation to an array of input optical signals using interference between light beams. The weighting is set by phase modulators — tunable components that shift the phase of individual optical paths, encoding neural network weights as physical phase values.
A fully optical alternative, disclosed by the Hong Kong University of Science and Technology in 2020, exploits spatial light modulators and optical lenses for the linear layer, with electromagnetic induction transparency (EIT)-based nonlinear optical media providing the activation function — eliminating any electronic conversion step entirely. In this architecture, an optical lens performs a Fourier transform on the beam set by summing beams with similar propagation directions: a computation with no electronic analog equivalent.
Volkswagen’s research branch has explored a further dimension: encoding both neurons and weights directly in the spectral and temporal phase properties of optical signals — such as laser pulse dispersion in materials — enabling information processing at the speed of light, as outlined in their 2023 US patent application.
Why Optics Outperforms Electronics on AI Energy Efficiency
The energy problem in conventional deep learning is structural. GPUs implement neural network operations using general-purpose SIMD instruction sets, which require extensive front-end decode overhead. More critically, GPU on-chip cache is small, forcing model weights to be transferred repeatedly from off-chip DRAM — a bandwidth bottleneck that also incurs enormous power costs. The number of neural network weights scales as the square of the number of neurons, making the energy and bandwidth cost of distributing weights in an electronic architecture scale poorly with network size.
Electronic architectures distribute neural network weights at gigabits per second at femtojoules per bit; optical weight encoding, as demonstrated by Dirk Englund’s group at MIT, achieves terabits per second at picojoules per bit — a fundamental improvement in energy scaling with network size (Englund, 2020, WO patent).
“Optical weight encoding achieves terabits per second at picojoules per bit — versus gigabits per second and femtojoules per bit for electronic architectures — with advantages amplified further when the same weights are broadcast to many optical neural networks running in parallel.”
In the homodyne-detection architecture developed by Dirk Englund’s group, a homodyne detector computes the vector product of inputs and weights using optical interference, with nonlinear activation performed electronically only on the scalar output of this step — minimising electronic energy use to the irreducible minimum. This approach, disclosed in Englund’s 2021 US patent, scales efficiently because the optical weight distribution cost does not grow proportionally with network size.
ARM Limited has reduced this concept to a commercial accelerator design. Their Optical Hardware Accelerator (OHA) for artificial neural networks includes a digital-to-optical converter that encodes input data as optical signals, an optical neural network that processes them through optical multiply-and-accumulate (OMAC) modules, and an optical-to-digital converter at the output. Each ANN weight is encoded as a quantized phase shift value. Three ARM filings — WO (2021), US (2021), and US (2022) — disclose this complete OHA chip design, signalling industry-grade product development rather than academic research. According to WIPO, patent families with multiple international equivalents are a reliable indicator of commercial intent and investment.
The number of neural network weights scales as the square of the number of neurons. In electronic architectures, distributing these weights from off-chip DRAM consumes enormous power at every inference step. Optical weight encoding eliminates this bottleneck by broadcasting weights at terabits per second to multiple ONN engines simultaneously — a scaling advantage that grows with model size.
The Chinese Academy of Sciences’ Institute of Computing Technology addressed a fundamental obstacle in early ONN designs: the inability to represent negative weights in an optical system. Their 2019 Chinese patent maps both positive and negative neural network weights to integer domains representable by optical neurons, routes them through separate positive-value and negative-value optical computation paths, and combines results with a subtractor after photoelectric conversion — solving the sign-handling problem that plagued early optical approaches.
The Chinese Academy of Sciences’ Institute of Semiconductors implemented wavelength-division multiplexing (WDM) in an optical neural network chip to represent different data channels at different wavelengths simultaneously, increasing computation parallelism without proportionally increasing power draw. Their photonic weight module modulates the amplitude of multi-wavelength input signals to perform multiply-accumulate operations, while a photonic bias module encodes biases separately before photodetector summation.
Explore the full ONN patent landscape — assignees, filing trends, and claim analysis — in PatSnap Eureka.
Explore ONN Patent Data in PatSnap Eureka →Training-Specific Implementations: Solving the On-Chip Gradient Problem
Training photonic neural networks presents challenges that do not exist for inference: gradients must be computed and weights updated, fabrication imperfections cause physical chips to deviate from trained models, and the energy cost of round-tripping data to digital processors for each update can negate the efficiency gains of optical inference. The patent literature reveals three distinct solutions to these problems.
Stanford University’s in-situ backpropagation technique for photonic neural networks uses adjoint inputs that interfere with forward-pass inputs inside OIU phase shifters to measure gradients directly from light intensity — avoiding the energy cost of round-tripping gradient data to a digital processor for every training step (Stanford, 2021, KR patent).
Stanford University’s in-situ backpropagation technique, disclosed in a 2021 Korean patent, uses adjoint inputs that interfere with forward-pass inputs inside the OIU phase shifters to measure gradients directly from light intensity. This avoids the energy cost of round-tripping gradient data to a digital processor for every training step — a critical efficiency gain for training workloads where gradient computation dominates total energy consumption. Research published by Nature has highlighted in-situ training as one of the most promising paths toward energy-efficient on-chip learning.
Tsinghua University extends trainability to large-scale networks through a dual-neuron abstraction: optical neurons are modelled as artificial neurons, global end-to-end gradient descent is applied to optimise all network parameters simultaneously, and the result is mapped back to physical optical parameters. This approach, disclosed in Tsinghua’s 2025 US and EP patents, enables networks previously considered too complex to train in the optical domain to become tractable — a significant advance for the field.
A separate problem unique to photonic hardware is fabrication noise. Imperfections in manufactured chips cause the physical device to deviate from the trained model. Tsinghua’s robust ONN training method, disclosed in a 2023 Chinese patent, addresses this by targeting a stationary loss extremum — making the loss function flat near the minimum so that small physical errors do not collapse inference accuracy. This eliminates the need for per-chip post-fabrication calibration, which would be prohibitively energy-intensive at production scale. Standards bodies such as IEEE have recognised hardware-aware training as an essential discipline for photonic computing manufacturability.
Tsinghua also addresses logic operations in ONN training by replacing the standard mean-squared-error loss function with a hybrid loss incorporating a logical contrast function that penalises incorrect bit outputs — achieving correct logic operation in the optical domain without increasing energy cost, as described in their 2025 Chinese patent.
PatSnap Eureka lets you map the full training-method patent landscape for photonic AI — assignees, claim scope, and citation networks.
Analyse Photonic AI Patents in PatSnap Eureka →Application Domains: Inference First, Training Catching Up
The MIT ONN patent family explicitly targets data centre inference, noting that the majority of data centre power and processor cycles are consumed by forward propagation, and that low forward-propagation speed limits neural network deployment in time-critical applications such as autonomous vehicles requiring high-speed parallel image recognition. This shapes the dominant ONN application focus: once weights are trained and loaded onto the nanophotonic processor, inference runs as a passive optical process with minimal sustained power draw.
The University of Pennsylvania’s optoelectronic deep neural network approach, disclosed in a 2023 Korean patent, extends ONNs to handle diverse input modalities — audio, video, voice, analog, and digital — processed directly in the optical domain and passed through convolutional cells, training layers, and classification layers, with integration into 3D imagers, optical phased arrays, and photonic-assisted microwave imagers. Cognifeeber’s network of optical neuron units communicates between layers via multi-core and multi-mode optical fibre waveguides with predetermined coupling, providing cross-layer connectivity in a purely photonic medium.
Tsinghua University’s robust ONN training method targets a stationary loss extremum — making the loss function flat near its minimum — so that fabrication imperfections in photonic chips do not collapse inference accuracy, eliminating the need for per-chip post-fabrication calibration (Tsinghua University, 2023, CN patent).
Key Players and the Global ONN Patent Landscape (2017–2025)
The ONN patent dataset encompasses over 60 patents and filings spanning the United States, China, South Korea, Europe, and Australia, with publication dates ranging from 2017 to 2025. The competitive landscape divides into three tiers: foundational academic IP (MIT, Stanford, Tsinghua), commercialisation-track industry filings (ARM, Volkswagen), and a broad Chinese domestic IP position (Chinese Academy of Sciences, Cambricon, Peng Cheng Laboratory). According to EPO patent trend data, photonic computing is among the fastest-growing technology categories in AI hardware filings.
MIT: Foundational IP Across Five Jurisdictions
MIT is the dominant global assignee in core ONN patents. The foundational US application (priority date June 2, 2016) has generated a continuous stream of continuation and international equivalents in Australia, Canada, China (multiple filings), and the US through at least 2024, covering the photonic integrated circuit ONN architecture with OIUs and optical nonlinearity units. The breadth of this family — spanning commercial, academic, and government-adjacent jurisdictions — reflects a deliberate IP strategy consistent with technology licensing rather than direct product development.
Tsinghua University: Comprehensive R&D Across Architecture and Training
Tsinghua University is the most active Chinese filer in advanced ONN architecture and training, with patents covering dual-neuron large-scale optical computing (US and EP, 2025), robust ONN training, logic-operation ONN training, and in-memory computing parameter optimisation. This positions Tsinghua as a comprehensive ONN R&D centre spanning architecture, training methodology, and chip-level optimisation — a profile consistent with a national strategic investment in photonic AI hardware.
ARM Limited: Commercialisation Track
ARM Limited represents the clearest commercialisation signal in the dataset. Three filings — WO (2021), US (2021), and US (2022) — disclose a complete Optical Hardware Accelerator chip design with OMAC modules, targeting integration into standard SoC environments. The progression from WO to two successive US filings indicates active prosecution and refinement of the commercial design. This is a path from research prototype to deployable silicon-photonic chip, and it mirrors the commercialisation trajectory that PatSnap’s innovation intelligence research identifies as a leading indicator of near-term product launches.
Electronic Complements: A Parallel Ecosystem
Supplementary electronic energy-reduction patent activity is distributed across Cambricon, Intel, Microsoft, Google, Peng Cheng Laboratory, and multiple Korean universities. Cambricon’s 2020 Chinese patent explicitly identifies the GPU DRAM bandwidth bottleneck as the primary energy problem in neural network inference. Microsoft’s 2024 Chinese patent covers analog or mixed multiply-accumulate neural networks for reduced power. The Peng Cheng Laboratory’s 2025 Chinese patent addresses energy consumption calculation for deep spiking neural network training architectures. These approaches compete with and complement ONN approaches by optimising conventional electronic hardware for lower power consumption — and their continued active filing suggests the market expects both optical and electronic solutions to coexist for the foreseeable future. The PatSnap technology landscape reports track both tracks in real time.