Analog hardware circuits: the fastest path to sub-10 ms thermal runaway detection

The most direct route to sub-10 ms thermal runaway detection bypasses the software polling loop entirely through dedicated analog hardware circuits. Temperature-sensitive cables wired in series with a voltage-dividing resistor network — connected between a power supply rail and ground — generate a continuous analog signal the moment a localized thermal event shifts the cable’s resistance. Because no processor scheduling is required, detection latency is bounded only by the RC time constant of the sensing network and the comparator response time, making single-digit millisecond detection readily achievable. This architecture, described in CATL’s 2020 patent, represents the foundational approach in the field.

CATL’s 2021 refinement of this approach introduces a terminating resistor connected to the temperature-sensitive cable so that both the cable’s resistance and its physical integrity are simultaneously monitored. Two voltage-dividing resistor sets — a first set on the supply side and a second on the ground side, bridged by the cable and terminating resistor — allow the circuit to distinguish a genuine thermal event from a cable-open fault. This reduces false positives without adding any latency to the detection path. A further variant from CATL (also 2021) demonstrates the scalability of this architecture to full battery pack coverage by placing portions of the sensing cable along each cell row and multiplexing detection outputs through a shared processing module.

Volvo Truck Corporation takes an orthogonal hardware approach by placing two independent conductive conduits along the over-pressure relief path of the battery device. The processing circuit acquires first and second data streams from these conduits simultaneously and generates a thermal runaway indication based on their combined state. By positioning the conduits at the vent path — the earliest physical signature of internal cell pressure buildup — rather than relying on external surface temperature, this design targets the thermal precursor event rather than the peak temperature, further compressing effective detection latency. This 2024 patent illustrates a broader industry recognition that sensing location matters as much as sensing speed.

Hierarchical controller architectures and wake-up latency reduction

A fundamental bottleneck in conventional BMS designs is the time required to transition the master processor from a low-power sleep state into full computational operation before any detection logic can execute. Two-level hierarchical architectures solve this by placing an always-on, resource-constrained controller as the first-pass detector — reserving the master processor for computationally intensive validation only after a credible anomaly is confirmed. GM Global Technology Operations established this principle across two US patent filings in 2021 and 2023, and a Chinese counterpart in 2024.

In GM’s architecture, a network of RESS-embedded Cell Monitoring Units (CMUs) continuously acquires cell-level voltage and temperature data and communicates wirelessly with a Battery Control Module (BCM). The BCM executes lightweight Level-1 (L-1) logic — comprising under-voltage detection, maximum inter-cell temperature differential monitoring, and thermal runaway sensor threshold comparison — without involving the master controller. The Chinese counterpart clarifies that the BCM’s L-1 logic selectively computes the maximum temperature difference across measurement cycles and triggers the wake-up if this differential exceeds a calibrated threshold. This is a lightweight arithmetic operation executable in well under 10 ms. Only when L-1 flags an anomaly does the BCM issue a wake-up signal to the master controller, which then executes the full Level-2 thermal runaway detection algorithm.

“The BCM’s Level-1 logic selectively computes the maximum temperature difference across measurement cycles and triggers a wake-up signal if this differential exceeds a calibrated threshold — a lightweight arithmetic operation executable in well under 10 ms.”

Denso Corporation takes a complementary approach at the cell monitoring unit level. The measurement unit continuously monitors the zero-crossing real part of the cell’s impedance spectrum, and the rate of change of this parameter increases sharply in the pre-runaway stage. The measurement unit evaluates this parameter autonomously — even while the battery control unit is in a sleep state — and outputs a start-up signal only when the computed metric crosses threshold. The battery control unit then wakes up, receives the measurement values, and executes arithmetic processing to confirm the thermal runaway sign. This asymmetric architecture avoids the boot-time overhead of a full processor for first-pass detection.

Mercedes-Benz Group AG contributes a related idle-mode monitoring paradigm in its 2023 patent, where an ASIC sensor device monitors measurements against setpoints while the BMS master is inactive. When a measurement deviates from a setpoint, the ASIC issues a wake-up signal to activate the full BMS. This confirms the industry trend toward always-on, minimal-silicon front-end detectors that decouple first-pass anomaly detection from master BMS latency — a pattern consistent with broader developments in low-power embedded systems design as tracked by bodies such as IEEE.

EIS and multi-sensor fusion: detecting thermal runaway before it starts

Electrochemical impedance spectroscopy (EIS) and multi-physical signal fusion approaches detect thermal runaway precursors before temperatures or pressures become critical — effectively buying additional response time margin for the hardware-speed circuits described above. Hunate Co., Ltd.’s 2026 patent describes a “quick diagnosis mode” in which, upon detection of a thermal runaway prediction event, the EIS subsystem switches from its normal multi-frequency impedance sweep to a single preset frequency measurement. In this mode, all cells in the battery module are measured simultaneously at the selected frequency, and the fluctuation deviation of impedance across cells is computed to infer runaway probability. The reduction from a multi-frequency sequential sweep — which may require hundreds of milliseconds — to a single-frequency simultaneous measurement makes this approach compatible with sub-10 ms detection windows once trigger latency is minimized.

Algolion Ltd. provides a foundational framework for impedance-based safety monitoring where a DC electrical stimulus is applied and removed to generate a time-varying response. Primary response parameters are extracted from the functional form of this response, and secondary and composite parameters are derived to determine the likelihood of a short-circuit precursor condition. The technique is notable because it identifies hazardous internal states days or hours before catastrophic thermal runaway — extending the effective detection window far beyond what any millisecond-scale circuit can achieve alone. This pre-warning function complements hardware-speed detection by enabling the system to enter a heightened monitoring state before a crisis begins, as documented in Algolion’s 2020 patent and consistent with battery safety research published by institutions such as Nature and NREL.

EVE Energy Co., Ltd. extends the predictive approach through electrochemical modeling in its 2026 patent, deriving activation energy data from internal resistance and voltage measurements under preset conditions, then using a preset activation energy model to estimate thermal runaway probability. This probabilistic pre-warning system can trigger hardware-speed detection circuits before a thermal event is imminent, synergistically shortening the total system response time. EVE Energy Storage Co., Ltd. describes a complementary hierarchical architecture in its 2025 patent in which a BMS slave board collects cell-level battery data while a separate high-temperature detection module collects temperature data independently and in parallel — eliminating the serialization latency that would otherwise accumulate if temperature data were routed through the same sampling bus as electrical parameters.

Key assignees, patent activity, and the emerging NV quantum sensor frontier

The thermal runaway detection patent landscape is concentrated among a small number of highly active assignees, each with a distinct technical strategy. Understanding their approaches — and the gaps between them — is essential for R&D teams benchmarking their own BMS architectures against the state of the art, as tracked by global patent offices including WIPO and the EPO.

CATL: analog circuit simplicity at scale

Contemporary Amperex Technology Co., Limited (CATL) is the dominant patent holder for hardware thermal runaway detection circuits, with multiple active filings covering temperature-sensitive cable architectures, voltage-dividing detection modules, and cooling-medium parameter-based detection across EP and other jurisdictions. CATL’s strategy is to achieve speed through analog circuit simplicity rather than algorithmic complexity — a design philosophy that minimizes the risk of software-introduced latency at the expense of requiring careful physical placement of sensing cables relative to individual cells.

GM Global Technology Operations: the two-level paradigm

GM has pioneered the two-level hierarchical detection architecture across two US patent filings (2021, 2023) and a Chinese counterpart (2024), establishing the principle that a lightweight always-on controller should gatekeep the wake-up of a computationally capable master processor. This architectural pattern has since been adopted implicitly by Mercedes-Benz Group AG in its ASIC-based idle-mode monitoring approach.

Samsung SDI: fault-tolerant multi-modal switching

Samsung SDI Co., Ltd. addresses multi-modal sensor validation in its 2022 patent by implementing a controller that assesses communication validity of the temperature sensor before switching between temperature-based and voltage-based detection modalities. This fault-tolerant switching reduces the risk of detection failure due to sensor degradation without adding latency under normal conditions — a reliability-focused complement to the speed-focused approaches of CATL and GM.

NV quantum sensors: the emerging internal sensing frontier

An emerging trend visible in the patent data is the use of nitrogen-vacancy (NV) quantum sensors for internal battery temperature and pressure sensing, as described by A-Route Co., Ltd. in a 2025 patent. This approach addresses the physical limitation of surface temperature sensors — which inherently lag internal thermal events due to thermal conduction delay — by deploying NV quantum sensor modules configured to sense temperature and pressure within the internal space of the battery. If realized at sufficient sensitivity and bandwidth, this could provide the earliest-possible detection onset with no reliance on thermal conduction lag from cell interior to surface.

The convergence of these approaches — analog hardware speed, hierarchical architecture efficiency, EIS-based pre-warning, and internal quantum sensing — suggests that next-generation BMS platforms will combine all four modalities in a layered detection stack. Each layer addresses a different time horizon: quantum and impedance sensing provide days-to-hours advance warning; pressure sensing provides minutes-to-seconds warning; and analog hardware circuits provide the millisecond-scale trigger that activates safety responses. This multi-layer strategy is consistent with safety system design principles documented by standards bodies such as the ISO in functional safety standards for road vehicles.