Bell Semiconductor v. ASMedia Technology: IC Patent Suit Dismissed With Prejudice
Bell Semiconductor, LLC asserted two integrated circuit design patents against ASMedia Technology, Inc. in the Southern District of New York. The parties jointly stipulated to dismiss all claims with prejudice after 445 days, with each side bearing its own legal costs.
Bilateral IC patent dispute resolved by stipulated dismissal with prejudice
On 28 October 2022, Bell Semiconductor, LLC filed a patent infringement action against ASMedia Technology, Inc. in the United States District Court for the Southern District of New York before Judge Valerie E. Caproni. The complaint asserted two patents — US7231626B2, covering a method and system for reducing inter-layer capacitance in integrated circuits, and US7396760B2, covering a method of implementing engineering change orders in integrated circuit design — against ASMedia’s semiconductor products and processes.
The case closed on 16 January 2024, when the parties filed a joint stipulation of dismissal with prejudice under Federal Rule of Civil Procedure 41(a)(1)(A)(ii). All claims, counterclaims, and defenses were dismissed in their entirety. Critically, the dismissal was with prejudice, meaning Bell Semiconductor is permanently barred from reasserting the same patent claims against ASMedia in future litigation. Each party was directed to bear its own costs, expenses, and attorneys’ fees, suggesting neither side extracted a public cost-shifting concession.
At 445 days, the case resolved well before any trial date, suggesting the parties likely reached a private accommodation — potentially a licence, cross-licence, or covenant not to sue — though the public record is silent on financial terms. The mutual cost-bearing arrangement is consistent with a negotiated resolution rather than a capitulation by either side. What drove resolution at this particular juncture — whether claim construction, inter partes review pressure, or commercial negotiation — is not disclosed in the docket.
Filing to dismissal in 445 days
445 days — resolved before reaching trial, consistent with early settlement or licensing resolution
Stipulated dismissal with prejudice — what the FRCP 41 filing means for both parties
FRCP 41(a)(1)(A)(ii) stipulated dismissal — both parties signed
A Rule 41(a)(1)(A)(ii) dismissal requires the written consent of all parties who have appeared. Unlike a unilateral voluntary dismissal, a stipulated dismissal signals bilateral agreement. Here, both Bell Semiconductor and ASMedia signed, suggesting a negotiated resolution underpinned the procedural step rather than a unilateral withdrawal.
Bilateral stipulationWith prejudice: Bell Semiconductor’s claims are permanently extinguished
A dismissal with prejudice operates as a final adjudication on the merits, preventing the plaintiff from refiling the same claims against the same defendant. Bell Semiconductor is permanently barred from reasserting US7231626B2 and US7396760B2 against ASMedia. This provides ASMedia with finality on these two patents — a meaningful freedom-to-operate outcome regardless of what private terms may exist.
Permanent bar on refilingEach party bears its own costs — no prevailing party declared
The stipulation explicitly directs each party to bear its own costs, expenses, and attorneys’ fees. This arrangement is commercially neutral on its face and is commonly seen in negotiated patent resolutions. It avoids the need for either side to argue prevailing-party status under 35 U.S.C. § 285, and is consistent with a settlement or licence agreement reached in parallel with the dismissal.
No § 285 fee awardCourt directed to un-stay then close — suggests earlier litigation pause
The stipulation language instructs the Clerk to ‘un-stay and then close the case and any open motions,’ indicating the case had been stayed at some point prior to dismissal. A litigation stay in this context often reflects parallel USPTO proceedings (such as inter partes review) or active settlement negotiations, though the specific basis for the stay is not identified in the public record.
Prior stay on recordFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Bell Semiconductor, LLC | Company | IP licensing entity — holder of US7231626B2 and US7396760B2 (IC design patents)Search in Eureka ↗ |
| Defendant | ASMEDIA Technology, Inc. | Company | ASMedia Technology, Inc. — Taiwan-based fabless semiconductor company, USB and PCIe IC designerSearch in Eureka ↗ |
| Plaintiff counsel | Adam Rodriguez | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Christopher Reed Clayton | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Kathryn Elizabeth Yukevich | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Paul Max Richter , Jr. | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Susan Elizabeth Galvao | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Defendant counsel | Christopher Schmidt | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Eric A. Buresh | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Richard Straussman | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Presiding judge | Judge Valerie E. Caproni | Chief Judge | New York Southern District Court — Chief JudgeSearch in Eureka ↗ |
Stipulation of dismissal — official text
The stipulation invokes FRCP 41(a)(1)(A)(ii), requiring bilateral consent — distinguishing this from a unilateral plaintiff withdrawal. The with-prejudice designation extinguishes Bell Semiconductor’s right to relitigate these specific claims against ASMedia, functioning as a final judgment on the merits without a trial. The mutual cost-bearing clause and the instruction to un-stay the case together suggest a negotiated resolution was concluded privately before the procedural dismissal was filed.
US7231626B2 & US7396760B2 — Integrated Circuit Design Method Patents
US7231626B2 (application no. US11/015123) protects a method and system for reducing inter-layer capacitance in integrated circuits — a fundamental concern in high-density chip design where parasitic capacitance between metal layers degrades signal integrity and power efficiency. US7396760B2 (application no. US10/991107) covers a method of implementing engineering change orders within IC design workflows, addressing late-stage design modification processes critical to reducing tape-out costs. Both patents originate from legacy Bell semiconductor R&D and sit in the broader domain of IC physical design and design-for-manufacturability.
For fabless semiconductor companies — particularly those designing USB controllers, PCIe bridge chips, and similar high-speed interface ICs as ASMedia does — both patents touch workflow and physical design techniques that are widely used across the industry. The inter-layer capacitance patent is especially relevant given the continued scaling of process nodes where parasitic effects become more pronounced. Bell Semiconductor’s willingness to assert these patents in federal court signals that it views them as commercially viable licensing assets, creating enforcement risk for any IC design house that has not mapped its design flows against the claims.
Should your IC design team run an FTO against US7231626B2 and US7396760B2?
Any fabless semiconductor company, EDA tool vendor, or IC design services firm whose workflows involve inter-layer capacitance optimisation or engineering change order processes should assess exposure to these two patents. Bell Semiconductor’s active enforcement posture — demonstrated by this New York filing — suggests that a demand letter, rather than a lawsuit, may be the first contact point. Running a freedom-to-operate analysis before receiving that letter is materially cheaper than litigating after.
PatSnap Eureka’s FTO Search Agent can map the claims of US7231626B2 and US7396760B2 against your design methodology documentation, flagging potential overlap and identifying prior art that may support invalidity arguments. Claim-level monitoring alerts you if Bell Semiconductor — or an assignee — files continuation applications that extend coverage into adjacent areas. Given that the SDNY case included a prior stay, monitoring PTAB proceedings against these patents is equally important for third parties evaluating their risk.
Run a freedom-to-operate analysis on US7231626B2 to assess your product’s exposure
Run FTO in Eureka →Similar IC design patent infringement cases in US federal courts
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What this case signals for the semiconductor IP licensing landscape
Bell Semiconductor’s enforcement pattern and ASMedia’s response carry implications for fabless IC companies operating in similar technology spaces.
Bell Semiconductor is an active patent asserter in the IC design space
Bell Semiconductor holds a portfolio of legacy semiconductor design patents and has pursued enforcement actions in federal courts. Companies operating in integrated circuit design — particularly fabless firms using similar inter-layer capacitance reduction or ECO methodologies — should treat this case as a signal to audit exposure to Bell’s broader portfolio before receiving a demand letter.
Dismissal with prejudice gives ASMedia clean freedom to operate on these two patents
The with-prejudice dismissal means ASMedia has effectively neutralised the risk from US7231626B2 and US7396760B2. Whether achieved through licence, settlement, or invalidity pressure, the outcome is commercially equivalent to a win on scope. Other defendants facing similar Bell Semiconductor assertions may find ASMedia’s resolution path instructive when evaluating their own negotiating position.
Bell v ASMEDIA — key questions answered
The case was dismissed with prejudice by joint stipulation under FRCP 41(a)(1)(A)(ii) on 16 January 2024, after 445 days. All claims and counterclaims were dismissed, with each party bearing its own costs. The with-prejudice designation permanently bars Bell Semiconductor from refiling the same claims against ASMedia.
Bell Semiconductor asserted two patents: US7231626B2, covering a method and system for reducing inter-layer capacitance in integrated circuits, and US7396760B2, covering a method of implementing engineering change orders in an integrated circuit design. Both relate to IC physical design and design-for-manufacturability processes.
A dismissal with prejudice operates as a final adjudication on the merits. It permanently bars Bell Semiconductor from reasserting US7231626B2 and US7396760B2 against ASMedia in any future litigation. ASMedia effectively has freedom to operate against these two patents from Bell Semiconductor’s assertion, regardless of whether a private licence was also agreed.
The dismissal stipulation directed the court to ‘un-stay and then close’ the case, confirming a prior stay existed. The specific basis for the stay is not disclosed in the public record. Stays in patent cases commonly arise from parallel USPTO inter partes review proceedings or active settlement negotiations, but no public filing confirms which applied here.
The case was filed in the United States District Court for the Southern District of New York (case no. 1:22-cv-09260) and presided over by Judge Valerie E. Caproni. It was a first-instance district court proceeding. The case was filed on 28 October 2022 and closed on 16 January 2024.
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