Bell Semiconductor v. ASMedia Technology: Dismissed With Prejudice After 508 Days
Bell Semiconductor asserted two semiconductor design-flow patents against ASMedia Technology over USB, PCIe, and SATA controller chips. The New York action was dismissed with prejudice in January 2024 — part of a broader EDA tool patent campaign that also drew in Siemens, Cadence, and Synopsys in parallel Delaware proceedings.
Multi-front EDA patent campaign ends in coordinated dismissals
On August 26, 2022, Bell Semiconductor, LLC filed suit against ASMedia Technology, Inc. in the Southern District of New York before Judge Lorna G. Schofield, asserting infringement of US7149989B2 and US7260803B2. Bell Semiconductor alleged that ASMedia infringed those patents by designing a range of semiconductor devices — including USB, PCIe packet switch, and SATA controller chips — using EDA design tools supplied by Siemens, Cadence, and Synopsys.
The case was resolved by a stipulated dismissal with prejudice entered on January 16, 2024, pursuant to Federal Rule of Civil Procedure 41(a)(1)(A)(ii). Each party agreed to bear its own costs. The dismissal with prejudice is final and on the merits: Bell Semiconductor is permanently barred from re-asserting the same patent claims against ASMedia in any future action based on the same conduct.
The resolution followed a cascade of related settlements in the District of Delaware, where Siemens settled in May 2023, Cadence in August 2023, and Synopsys in December 2023 — all involving the same asserted patents. The rapid resolution of the ASMedia action once the EDA tool suppliers had settled is consistent with the theory that licensing the upstream tool vendors effectively resolved the downstream chip-designer exposure, though the precise terms of any Bell Semiconductor–ASMedia arrangement are not disclosed in the public record.
Filing to dismissal in 508 days
508 days from filing to dismissal — resolved before trial
Dismissed with prejudice: what the January 2024 order means for both parties
FRCP 41(a)(1)(A)(ii) — Stipulated dismissal by both parties
The dismissal was entered under Federal Rule of Civil Procedure 41(a)(1)(A)(ii), which allows parties to dismiss an action by filing a signed stipulation. This mechanism requires the agreement of all parties who have appeared, making it a mutual, negotiated exit. It carries the full finality of a court judgment when entered with prejudice.
Mutual stipulationWith prejudice: Bell Semiconductor cannot refile against ASMedia
A dismissal with prejudice operates as a final adjudication on the merits. Bell Semiconductor is permanently barred from reasserting US7149989 or US7260803 against ASMedia on the same accused products and conduct. For ASMedia, this provides clean IP closure — though the public record does not disclose whether any licence fee or royalty payment accompanied the settlement.
Permanent bar on refilingNo prevailing party — each side bears its own fees
The stipulation specifies that each party bears its own costs, expenses, and attorneys’ fees. This is the standard cost term in patent settlements and does not signal any finding of exceptional case conduct under 35 U.S.C. § 285. It also avoids the risk of a fee-shifting motion that a defendant might otherwise pursue post-dismissal if bad-faith litigation conduct were alleged.
No fee-shiftingUpstream EDA vendor settlements appear to have resolved downstream risk
Bell Semiconductor’s theory implicated ASMedia’s use of Siemens, Cadence, and Synopsys design tools. Once all three EDA suppliers had settled the parallel Delaware declaratory judgment actions by December 2023, ASMedia’s own liability exposure likely diminished substantially. The timing of this dismissal — within weeks of the final Delaware settlement — is consistent with that dynamic, though the exact settlement mechanics are not public.
Upstream licence theoryFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Bell Semiconductor, LLC | Company | Patent licensing entity — holder of US7149989B2 and US7260803B2Search in Eureka ↗ |
| Defendant | ASMEDIA Technology, Inc. | Company | ASMedia Technology, Inc. — Taiwan-based fabless semiconductor company designing USB, PCIe, and SATA controller ICsSearch in Eureka ↗ |
| Plaintiff counsel | Adam Rodriguez | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Alexandra Figari Easley | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Ashley N. Moore | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Christopher Reed Clayton | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | David Sochia | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Kathryn Elizabeth Yukevich | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Paul Max Richter , Jr. | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Richard A. Kamprath | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Susan Elizabeth Galvao | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Defendant counsel | Christopher Schmidt | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Richard Straussman | Attorney | Counsel for ASMEDIA Technology, Inc.Search in Eureka ↗ |
| Presiding judge | Judge Lorna G. Schofield | Chief Judge | New York Southern District Court — Chief JudgeSearch in Eureka ↗ |
Stipulation of dismissal — official text
The stipulation dismisses all claims, counterclaims, and defenses between Bell Semiconductor and ASMedia with prejudice, mirroring the exact language used in the three parallel Delaware settlements. The mutual scope — covering claims in both directions — suggests ASMedia may have asserted counterclaims or defenses that are also being released. The ‘own costs’ term is neutral and does not indicate a prevailing party under 35 U.S.C. § 285. No liability finding or damages figure appears in the public record.
US7149989B2 & US7260803B2 — semiconductor EDA design-flow method patents
US7149989B2 (application no. 10/947,498) and US7260803B2 (application no. 10/683,369) are United States patents held by Bell Semiconductor, LLC covering methods relating to semiconductor integrated circuit design workflows — specifically processes implemented using or in conjunction with EDA (Electronic Design Automation) tools. Both patents emerged from application filings in the early 2000s, a period of intensive patenting activity around computer-aided IC design methodologies.
The strategic significance of these patents lies in their breadth: by targeting design-tool-assisted workflows rather than specific circuit architectures, they potentially reach any fabless semiconductor company using commercial EDA platforms from major suppliers such as Siemens EDA, Cadence, or Synopsys. This positions the patent portfolio as a systemic licensing lever across the fabless semiconductor industry, particularly affecting companies designing USB, PCIe, and storage interface controllers — a high-volume, commercially competitive segment.
Should your IC design team run an FTO against US7149989 and US7260803?
If your organisation designs semiconductor devices using commercial EDA tools — particularly for USB, PCIe, or SATA/NVMe interface applications — these two Bell Semiconductor patents are directly relevant to your freedom-to-operate position. The claims, as asserted, reached beyond the EDA tool vendors to the chip-designer end-users. Any fabless company or IC design team using Siemens, Cadence, or Synopsys tooling in covered design flows should confirm whether existing upstream licence agreements provide pass-through coverage.
PatSnap Eureka’s FTO Search Agent can map the claim scope of US7149989 and US7260803 against your specific design workflows and product lines, surfacing related patents in Bell Semiconductor’s portfolio that may not yet have been asserted. Claim monitoring alerts can flag any continuation, reissue, or related filing that could extend the assertion risk — giving your legal and engineering teams the lead time needed to respond before litigation is filed.
Run a freedom-to-operate analysis on US7149989B2 to assess your product’s exposure
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What this case signals for the semiconductor IP licensing landscape
Bell Semiconductor’s coordinated multi-defendant campaign reveals how EDA tool patents can be used to reach chip designers through their upstream tool vendors.
EDA-linked patent assertions create systemic risk for fabless chip designers
Bell Semiconductor’s strategy of asserting design-tool-method patents against both EDA vendors and their downstream chip-designer customers creates a two-front exposure. Fabless companies like ASMedia that rely on commercial EDA tools should audit whether any third-party patents extend to tool-assisted design workflows — not just to finished product features.
Upstream EDA settlements can effectively discharge downstream licensee exposure
The sequential settlement of Siemens, Cadence, and Synopsys in Delaware — each covering the same two patents — appears to have resolved the legal foundation for the ASMedia claims. Companies facing downstream infringement actions tied to upstream supplier tooling should monitor supplier-level IP disputes closely, as settlement at the vendor level may extinguish or significantly weaken claims against customers.
Bell v ASMEDIA — key questions answered
Bell Semiconductor asserted US7149989B2 and US7260803B2 against ASMedia Technology. Both patents relate to semiconductor IC design workflows using EDA tools. The complaint alleged that ASMedia infringed by designing devices including USB, PCIe, and SATA controller chips using tools from Siemens, Cadence, and Synopsys.
The case was dismissed with prejudice by stipulation under FRCP 41(a)(1)(A)(ii), entered January 16, 2024 by Judge Lorna G. Schofield. Each party bears its own costs. The dismissal with prejudice is final — Bell Semiconductor cannot refile the same claims against ASMedia.
Siemens, Cadence, and Synopsys filed declaratory judgment actions in the District of Delaware (Case Nos. 22-1569-CFC and 22-1512-CFC) involving US7149989 and US7260803. Siemens settled in May 2023, Cadence in August 2023, and Synopsys in December 2023 — all dismissed with prejudice, each party bearing its own costs.
The accused products included the ASM1092 Port Multiplier, ASM1652 USB 3.1 retimer, ASM1142 USB 3.1 Host Controller, ASM2362 USB3.2-to-PCIe NVMe, ASM2812 and ASM2824 PCIe Gen3 Packet Switches, ASM3142 and ASM3242 USB3.2 Host controllers, and the ASM1166 PCIe-to-SATA Controller.
The ‘own costs’ provision means neither party is required to reimburse the other’s legal fees, costs, or expenses. It does not constitute a finding of exceptionality under 35 U.S.C. § 285 and is standard in patent settlement stipulations. It does not indicate whether any licence payment or royalty was exchanged — those terms, if any, remain confidential.
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