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Bell Semiconductor v. Phison Electronics — IC Design Patent Consent Judgment | PatSnap
Patent Litigation

Bell Semiconductor v. Phison Electronics: Consent Judgment After 236 Days

Bell Semiconductor filed suit against Phison Electronics in Colorado federal court asserting two integrated circuit design patents. The case resolved by consent judgment — a court-entered agreed disposition — in under eight months, with each party bearing its own fees and costs.

Resolution time
236days
236 days from filing to consent judgment — faster than the median patent case disposition
Patents asserted
2
US7149989B2 and US7260803B2 — IC dummy metal insertion and design validation methods
Outcome
Consent Judgment
Agreed by the parties, entered by the court — binding and final disposition of all claims
Cost ruling
Each Party Bears Own Costs
No fee or cost award to either side — expressly stated in the court's dismissal order
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

IC Design Patent Dispute Resolved by Consent Judgment in Colorado

Bell Semiconductor, LLC filed this patent infringement action on 26 August 2022 in the U.S. District Court for the District of Colorado against Phison Electronics, Inc. The suit asserted two patents — US7149989B2, directed to incremental dummy metal insertions in integrated circuit layouts, and US7260803B2, covering a method of early physical design validation and identification of texted metal short circuits in IC design. Phison Electronics is a prominent controller chip and flash storage solutions manufacturer, making it a commercially significant target for IC design method patents.

The recorded basis of termination is Consent Judgment. The docket order states: 'ORDER GRANTING 57 Joint Motion to Dismiss with Prejudice… all claims asserted in this action are DISMISSED WITH PREJUDICE, with each party to bear its own fees and costs.' The court also denied as moot Phison's pending Motion to Dismiss the First Amended Complaint. A consent judgment is a binding, court-entered judgment on terms agreed by the parties, bringing the litigation to a final conclusion. The specific terms underlying the parties' agreement are not disclosed in the available record.

The case closed in 236 days — a notably swift resolution for a multi-patent infringement action at the district court level, suggesting the parties reached agreement well before any claim construction or trial proceedings. What drove the resolution — whether licensing, cross-licensing, or other commercial terms — is not disclosed in the public record. The with-prejudice character of the disposition and the mutual cost-bearing arrangement are the only terms visible on the docket.

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Case at a glance
CourtColorado District Court
JudgeN/A
FiledAugust 26, 2022
ClosedApril 19, 2023
Duration236 days
OutcomeConsent Judgment
Verdict causeInfringement Action
BasisConsent Judgment
Prior Art Intelligence
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Case data sourced from PACER / Colorado District Court via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to Consent Judgment in 236 days

236 days from filing to consent judgment — faster than the median patent case disposition

Case timeline: Complaint filed AUG 26 2022 — 236 days total Horizontal timeline showing the three key events in Bell Semiconductor, LLC v Phison Electronics, Inc. from filing to resolution. Source: PACER, Colorado District Court. AUG 26 2022 Complaint filed Pre-trial proceedings APR 19 2023 Consent Judgment 236 DAYS TOTAL
Patent at issue

US7149989B2 & US7260803B2 — IC Dummy Metal Insertion and Design Validation

Publication No.US7149989B2
Application No.US10/947498
Patent details
ProductIncremental dummy metal insertion in integrated circuit layout design
Cited in actionAugust 26, 2022

Publication No.US7260803B2
Application No.US10/683369
Patent details
ProductEarly physical design validation and metal short circuit identification in IC design
Cited in actionAugust 26, 2022
Technical brief · sourced from PatSnap patent database
US7149989B2Primary patent
Patent figurePatent figure
Technology summary
The method addresses the inefficiencies in late design fault detection by generating a specific rule deck for early physical design validation, focusing on texted metal short circuits and power distribution, which reduces processing time and improves the integrated circuit design flow by enabling earlier error correction.
Representative claim (1 of 2 independent)
1. A method comprising steps of: (a) receiving as input a representation of an integrated circuit design; (b) receiving as input a physical design rule deck that specifies rule checks to be performed on the integrated circuit design; (c) generating a specific rule deck from the physical design rule deck wherein the specific rule deck includes only physical design rules that are specific to texted metal short circuits between different signal sources in addition to power and ground in the integrated circuit design; and (d) performing a physical design validation on the integrated circuit design from the specific r…
Technical background
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to the design of integrated circuits. More specifically, but without limitation thereto, the present invention relates to methods of verifying an integrated circuit design to ensure adherence to process rules and overall manufacturability of the integrated circuit design for a specific technology. 2. Description of Related Art Physical design validation of an integrated circuit design is an important aspect of the overall…
Patent family
2 family members across 1 jurisdiction (US)
PatSnap Eureka · FTO Search Agent
Should you run an FTO against US7149989B2 and US7260803B2?

Any company involved in IC physical layout, backend design flows, or NAND controller development should treat these patents as live FTO priorities. US7149989B2's dummy metal insertion claims and US7260803B2's design validation method claims are broad enough to implicate both EDA toolchain implementations and the IC products designed using those tools. Bell Semiconductor's successful enforcement against Phison, resolved pre-claim-construction, raises the likelihood of further assertions across the same technology segment.

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Official verdict

Official order — verbatim text

ORDER GRANTING 57 Joint Motion to Dismiss with Prejudice. Phison's Motion to Dismiss Plaintiff's First Amended Complaint, Doc. 43 , is DENIED AS MOOT,and all claims asserted in this action are DISMISSED WITH PREJUDICE, with each party to bear its own fees and costs.
Source: PACER Docket, Case 1:22-cv-02197, Colorado District Court

The court's order granted the parties' joint motion and dismissed all claims with prejudice, simultaneously denying as moot Phison's pending Rule 12 motion. The with-prejudice character of the dismissal is legally significant: it bars Bell Semiconductor from refiling the same claims against Phison in any future action. The mutual cost-bearing provision reflects an agreed allocation, not a judicial assessment of litigation conduct. No claim construction, validity, or infringement findings appear on the record.

PACER case 1:22-cv-02197 · Public docket record Explore in Eureka ↗
Judgment terms

Consent judgment: what the agreed resolution means for both parties

Legal mechanism

What a consent judgment means in patent litigation

A consent judgment is a formal court-entered judgment reflecting terms agreed by both parties. Unlike a unilateral settlement, it carries the full legal force of a judicial order, enabling either party to seek enforcement directly from the court. Here, the court entered judgment dismissing all claims with prejudice on a joint motion, meaning neither party can re-litigate these specific claims. The court expressly retained no disclosed ongoing obligations — though the underlying agreed terms are not public.

Court-entered, binding and final
Patent holder outcome

Bell Semiconductor: patents remain valid, no public admission of non-infringement

The consent judgment does not include any court finding of invalidity or non-infringement of US7149989B2 or US7260803B2. Both patents remain in force and enforceable against other potential infringers. Bell Semiconductor retains the ability to assert these patents in future actions. The with-prejudice dismissal applies only to claims against Phison — it does not constitute a general release or invalidation. The specific terms of any licence or other arrangement with Phison are not disclosed in the available record.

Patents remain enforceable
Defendant outcome

Phison Electronics: exposure resolved, no adverse merits ruling on record

Phison secured a with-prejudice dismissal of all claims in this action without any court finding of infringement. Its pending Motion to Dismiss the First Amended Complaint was denied as moot, meaning the merits of that motion were never adjudicated. Phison bears its own fees and costs. Whether Phison obtained any licence, covenant not to sue, or other protection in connection with the consent judgment is not disclosed in the available record.

No adverse merits finding
Commercial implications

IC design method patents: swift consent resolutions signal licensing leverage

The rapid resolution — 236 days, before any claim construction hearing — is consistent with a commercially negotiated outcome rather than a litigated merits determination. Companies operating in the NAND flash controller and IC design space should treat US7149989B2 and US7260803B2 as active licensing risks. Bell Semiconductor's willingness to file and resolve quickly suggests an assertion strategy that may target additional players in the same technology segment. Freedom-to-operate analysis against these patents remains relevant for IC layout and design validation toolchain vendors.

Active licensing risk in IC design
Legal analysis based on PACER docket records for case 1:22-cv-02197 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffBell Semiconductor, LLCCompanyIC design patent licensing entity — holder of US7149989B2 and US7260803B2Search in Eureka ↗
DefendantPhison Electronics, Inc.CompanyPhison Electronics, Inc. — NAND flash controller and storage solutions manufacturerSearch in Eureka ↗
Plaintiff counselChristopher Reed ClaytonAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff counselJohn C. HeutonAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff counselKathryn Elizabeth YukevichAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff counselMitchell Reed SibleyAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff counselPaul M. RichterAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff counselRobyn Teresa WilliamsAttorneyCounsel for Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff law firmCharhon Callahan Robson & Garza, PLLCLaw FirmRepresenting Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff law firmDevlin Law Firm LLCLaw FirmRepresenting Bell Semiconductor, LLCSearch in Eureka ↗
Plaintiff law firmMcKool Smith PCLaw FirmRepresenting Bell Semiconductor, LLCSearch in Eureka ↗
Defendant counselDouglas Eric ChinAttorneyCounsel for Phison Electronics, Inc.Search in Eureka ↗
Defendant counselHsuan-Yeh ChangAttorneyCounsel for Phison Electronics, Inc.Search in Eureka ↗
Defendant counselPeter YiAttorneyCounsel for Phison Electronics, Inc.Search in Eureka ↗
Defendant law firmHsuanyeh Law Group, PCLaw FirmRepresenting Phison Electronics, Inc.Search in Eureka ↗
Presiding judgeJudge N/AJudgeColorado District CourtSearch in Eureka ↗
R&D signals

R&D signals in the IC physical design and NAND controller IP space

Forward-looking patent intelligence on Bell Semiconductor's IC design portfolio, Phison's controller IP, and filing trends in dummy metal insertion and physical design validation.

Patent portfolio

Bell Semiconductor's IC physical design patent filing activity

Bell Semiconductor holds patents spanning IC physical design methods beyond US7149989B2 and US7260803B2. Tracking Bell's broader portfolio — including continuation filings, reissues, and related applications — reveals the scope of potential assertion risk for IC layout and NAND product teams. Active monitoring of Bell's prosecution activity can surface new claims before they become enforcement targets.

Bell Semiconductor IC design portfolio
Technology landscape

Filing trends in dummy metal insertion and IC design rule compliance

Patent filings in dummy metal insertion, metal density fill, and IC physical design validation have grown alongside advanced node requirements from 28nm onward. Mapping the current filing landscape reveals who is actively innovating — and patenting — in methods that overlap with US7149989B2 and US7260803B2. This signals both competitive risk and white space for design-around strategies.

IC design rule compliance IP trends
Competitor IP posture

Phison Electronics' patent portfolio in NAND controller and IC design

Phison Electronics maintains an IP portfolio across NAND flash controller architecture, firmware, and interface technologies. Assessing Phison's own patenting activity in IC design and physical layout methods provides context for how it positions defensively — and may reveal cross-licensing leverage in future disputes with assertion entities operating in the same space.

Phison NAND controller IP portfolio
White space opportunity

Design-around and adjacent innovation near US7149989B2 claim scope

The specific claim language of US7149989B2 — covering incremental dummy metal insertion methods — leaves potential white space in alternative fill algorithms, machine-learning-driven density optimisation, and post-route verification approaches. R&D teams developing next-generation EDA tools or IC backend automation can use claim mapping to identify innovation vectors that avoid the asserted patent's scope.

IC design FTO white space
Related litigation

Similar IC Design Patent Infringement Cases in Federal District Courts

Explore comparable IC physical design and NAND controller patent infringement cases litigated in U.S. district courts, including Colorado and related venues.

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Strategic implications

What this case signals for the IC design and flash storage IP landscape

A swift consent judgment in an IC design patent case points to licensing leverage — and ongoing exposure for others in the NAND ecosystem.

Bell Semiconductor's portfolio signals continued assertion activity in IC design

Bell Semiconductor's assertion of IC physical design method patents in a fast-closing case is consistent with a structured licensing programme. Companies developing IC layout tools, EDA software, or NAND controller products should audit their design pipelines against US7149989B2 and US7260803B2 before any Bell Semiconductor approach.

Each-party-bears-costs provision eliminates fee risk but not licensing exposure

The mutual cost-bearing term reduces the deterrent effect of an adverse fee award for future defendants. However, it also signals that Bell Semiconductor is not seeking litigation costs as a primary lever — the IP licensing position, not cost recovery, appears to be the commercial goal. This lowers the bar for future filings against other companies.

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Unlock full IC design patent enforcement analysis and Phison/Bell Semiconductor IP risk signals for the Colorado District Court docket.
Bell Semiconductor portfolio depthComparable NAND IP disputesEDA method patent risks
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Frequently asked questions

Bell v Phison — key questions answered

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Track IC design patent enforcement — before you receive a demand letter

Run FTO analysis on US7149989B2 and US7260803B2 in PatSnap Eureka. Monitor Bell Semiconductor's assertion activity and benchmark your IC physical design workflows against live patent risk before filing season.

Disclaimer

This page is compiled from public court dockets and third-party patent and litigation data via PatSnap Eureka, and is provided for general informational purposes only. The information shown — including party names, patent and application numbers, dates, case status, outcomes, and any analysis — may be incomplete, may not reflect the most recent filings or legal status, and may contain errors or omissions. Verify all details against official court records (for example, PACER) and the relevant patent office before relying on them.

Nothing on this page constitutes legal advice or a legal opinion on the validity, infringement, enforceability, or scope of any patent or case, and no attorney‑client relationship is created by its use. Any description of an outcome (such as a dismissal, settlement, or consent judgment) is a general summary, not a legal determination. All patents, trademarks, and company or law‑firm names are the property of their respective owners. PatSnap makes no warranty as to the accuracy or completeness of this content and disclaims, to the fullest extent permitted by law, all liability for reliance on it. For advice on a specific matter, consult qualified legal counsel.

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