Bell Semiconductor v. Socionext America: Case Transferred to N.D. California
Bell Semiconductor filed a patent infringement action against Socionext America in the Eastern District of Michigan asserting two semiconductor process patents. After 422 days, the court granted Socionext's motion to transfer all three related cases to the Northern District of California, finding that most transfer factors favored the move.
Semiconductor process patent suit shifts venue to Silicon Valley
Bell Semiconductor, LLC filed suit against Socionext America, Inc. in the Eastern District of Michigan on April 27, 2022, asserting infringement of US7007259B2, which covers a method for making an interconnect layer in a semiconductor device, and US6436807B1, which covers a method for providing clock-net aware dummy metal using dummy regions. The complaint was one of at least three related actions filed by Bell Semiconductor in the same court around the same period (case nos. 22-cv-10906, 22-cv-12018, and 22-cv-12749).
The recorded Basis of Termination for this case is 'Case Transferred.' The court's order states that Defendant's Motion to Transfer was GRANTED after the court concluded that most factors either favored transfer or were neutral, and directed the Clerk to transfer all three related cases to the U.S. District Court for the Northern District of California. No merits ruling was issued in the Eastern District of Michigan; the remaining motions were explicitly left pending at the time of transfer.
The transfer order was entered on June 23, 2023, approximately 422 days after filing — a timeline consistent with typical venue motion practice in patent cases. The Northern District of California is a preferred venue for semiconductor IP disputes given its proximity to Silicon Valley's technology ecosystem. The specific terms of any ongoing proceedings, scheduling, or substantive rulings in N.D. California are not available in the present record.
See Complete Case & Patent Analysis →Filing to Case Transferred in 422 days
422 days in E.D. Michigan before transfer order — litigation now continues in N.D. California
US7007259B2 & US6436807B1 — semiconductor fabrication process patents


Semiconductor design teams, EDA software vendors, and foundry customers whose products or tool outputs involve interconnect layer formation or clock-net aware dummy metal fill should assess their exposure to these two Bell Semiconductor patents. Given the patents' broad process-method framing and Bell Semiconductor's active multi-defendant assertion strategy, an FTO analysis is prudent before tape-out or product launch in affected technology nodes.
Official order — verbatim text
The court's transfer order is a procedural disposition, not a merits ruling. The court found that most § 1404(a) convenience factors — which typically encompass witness location, evidence access, and the interest of justice — favored the Northern District of California. All three related Bell Semiconductor actions were transferred simultaneously, and all remaining substantive motions were expressly left pending, meaning infringement and validity issues remain fully unresolved.
No merits ruling — the case moves, not ends
A transfer under 28 U.S.C. § 1404(a) relocates the entire action to a more convenient forum. The Eastern District of Michigan issued no judgment on infringement, validity, or damages. Every substantive motion left pending at the time of transfer travels with the case to the Northern District of California, where proceedings continue under a new docket.
Venue change, not dismissalBell Semiconductor must re-litigate in a new forum
Bell Semiconductor retains all its infringement claims but must now pursue them in the Northern District of California. N.D. California's Patent Local Rules impose structured claim-construction and discovery schedules. The transfer resets scheduling and may affect litigation cost and strategy, though the merits of the asserted patents remain fully alive.
Claims survive transferSocionext secures its preferred home-court forum
Socionext America successfully argued that most convenience factors favored California. Litigating in N.D. California — proximate to semiconductor industry witnesses, evidence, and expertise — is generally more favorable for technology defendants. Substantive defenses on infringement and validity remain to be litigated in the new forum.
Venue win for defendantThree related Bell Semiconductor cases now consolidated in N.D. Cal.
The simultaneous transfer of three related Bell Semiconductor actions to N.D. California concentrates the patent risk in a single, technically sophisticated court. Companies operating in semiconductor interconnect and clock-net design should monitor the N.D. California docket, as claim-construction rulings there will determine the practical scope of both asserted patents.
Monitor N.D. Cal. docketFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Bell Semiconductor, LLC | Company | Patent assertion entity — holder of US7007259B2 and US6436807B1, semiconductor process patentsSearch in Eureka ↗ |
| Defendant | Socionext America, Inc. | Company | Socionext America, Inc. — U.S. subsidiary of semiconductor SoC design company Socionext Inc.Search in Eureka ↗ |
| Plaintiff counsel | Casey Lynne Shomaker | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Christopher Reed Clayton | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Eric A. Bean | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Jason Michael Wejnert | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Kristin Leveille | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Patrick G. Seyferth | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Robyn T. Williams | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Susan M. McKeever | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff counsel | William Ellerman | Attorney | Counsel for Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff law firm | Bush Seyferth & Paige PLLC | Law Firm | Representing Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff law firm | Devlin Law Firm LLC | Law Firm | Representing Bell Semiconductor, LLCSearch in Eureka ↗ |
| Plaintiff law firm | McKool Smith PC | Law Firm | Representing Bell Semiconductor, LLCSearch in Eureka ↗ |
| Defendant counsel | A. Max Olson | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Akira Irie | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Daniel D. Quick | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Hui Zhao | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Jeffrey Miller | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | John S. Artz | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Krista S. Schwartz | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Mark L. Whitaker | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Matthew Freimuth | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant counsel | Teresa Truong Pham | Attorney | Counsel for Socionext America, Inc.Search in Eureka ↗ |
| Defendant law firm | Arnold & Porter Kaye Scholer LLP | Law Firm | Representing Socionext America, Inc.Search in Eureka ↗ |
| Defendant law firm | Dickinson Wright PLLC | Law Firm | Representing Socionext America, Inc.Search in Eureka ↗ |
| Defendant law firm | Morrison & Foerster LLP | Law Firm | Representing Socionext America, Inc.Search in Eureka ↗ |
| Defendant law firm | Willkie Farr & Gallagher LLP | Law Firm | Representing Socionext America, Inc.Search in Eureka ↗ |
| Presiding judge | Judge N/A | Judge | Michigan Eastern District CourtSearch in Eureka ↗ |
R&D signals in semiconductor interconnect and dummy-fill IP
Forward-looking patent intelligence on Bell Semiconductor's portfolio, Socionext's IP posture, and innovation trends in semiconductor interconnect and clock-net dummy metal technology.
Bell Semiconductor's broader semiconductor process assertion portfolio
Bell Semiconductor holds patents spanning multiple semiconductor fabrication process domains beyond these two asserted patents. Tracking its filing activity and assignment history — particularly patents originating from legacy semiconductor IP transfers — can reveal which additional process methods may be next in its enforcement campaign against fabless SoC designers.
Assertion portfolio watchFiling trends in clock-net aware dummy metal fill technology
Clock-net aware dummy fill is an active area of EDA and physical design innovation. Patent filings from EDA vendors and foundries covering automated dummy insertion, signal-integrity-aware fill algorithms, and advanced-node planarity methods are growing. Understanding where the claim space is crowded — and where white space exists — is essential for R&D teams developing next-generation layout tools.
EDA dummy fill filing trendsSocionext's patent portfolio in SoC interconnect design
Socionext Inc. — the parent of defendant Socionext America — is an active filer in SoC architecture and advanced interconnect design. Mapping Socionext's own patent portfolio in back-end-of-line processes and interconnect methods reveals both defensive assets relevant to this litigation and offensive IP that could be relevant in cross-licensing or future disputes in this technology space.
Socionext IP positionAdjacent innovation opportunities near interconnect layer methods
The interconnect layer formation space covered by US7007259B2 involves multi-layer metallisation techniques that intersect with emerging 3D IC and chiplet integration research. Patent white space analysis around advanced packaging interconnect, through-silicon via formation, and hybrid bonding processes may reveal filing opportunities adjacent to — but outside — Bell Semiconductor's asserted claim scope.
3D IC interconnect white spaceSimilar semiconductor process patent infringement cases in N.D. California
Explore patent infringement actions involving semiconductor interconnect and dummy-fill process patents litigated in N.D. California and E.D. Michigan federal district courts.
Related patent case — similar technology
Comparable case in the same technology domain. Patent holder and defendant reached resolution after proceedings.
SettledRelated infringement action — same court
Comparable Method for making an interconnect layer and a semiconductor device including the same-adjacent infringement action. Patent enforcement dynamics analysed in depth.
Active · District CourtRelated invalidity challenge — appellate outcome
Combined invalidity and infringement action in the same technology space. Decided after substantive proceedings.
DecidedBell Semiconductor, LLC's broader IP enforcement history
Bell Semiconductor, LLC's full litigation history covering prior enforcement, licensing activity, and inter partes review proceedings.
Portfolio viewWhat this transfer signals for semiconductor IP strategy
A successful venue transfer to N.D. California reshapes the cost, timeline, and witness calculus for both parties in this semiconductor process dispute.
Venue selection is a first-order strategic decision in semiconductor patent suits
Socionext's successful transfer motion demonstrates that challenging venue at the outset can materially shift the litigation landscape. For semiconductor companies served with infringement complaints in remote districts, a § 1404(a) transfer motion — filed promptly and supported by witness and evidence location data — is a powerful defensive tool worth prioritising above early merits motions.
Bell Semiconductor's multi-case filing pattern warrants portfolio monitoring
Bell Semiconductor filed at least three related cases in E.D. Michigan simultaneously, suggesting a coordinated assertion campaign around its semiconductor process patent portfolio. Companies in the interconnect and clock-net design space should audit their products against US7007259B2 and US6436807B1 and track Bell Semiconductor's broader filing activity for additional assertion risk.
N.D. California claim construction will set scope for both asserted patents
The Markman hearing in N.D. California will be the pivotal event determining how broadly 'interconnect layer' and 'clock-net aware dummy metal' claims read on Socionext's products. Competitors and licensees should track the claim-construction order closely — it will define the infringement perimeter for the entire semiconductor industry operating in these process domains.
Legacy semiconductor process patents present ongoing FTO risk post-transfer
Both asserted patents derive from early-2000s application filings and cover foundational semiconductor fabrication methods still in widespread use. The transfer to N.D. California — rather than dismissal — confirms these patents remain in active enforcement. Foundry customers and fabless chip designers using similar interconnect or dummy-fill processes should assess current FTO exposure before the N.D. Cal. case progresses.
Bell v Socionext — key questions answered
Bell Semiconductor filed a patent infringement action against Socionext America in the Eastern District of Michigan asserting US7007259B2 and US6436807B1. The court granted Socionext's motion to transfer and directed all three related cases (22-cv-10906, 22-cv-12018, 22-cv-12749) to the Northern District of California. No merits ruling was issued in E.D. Michigan.
Bell Semiconductor asserted two patents: US7007259B2, covering a method for making an interconnect layer and a semiconductor device including the same, and US6436807B1, covering a method for providing clock-net aware dummy metal using dummy regions. Both derive from early-2000s application filings.
The Eastern District of Michigan granted Socionext's § 1404(a) motion to transfer after finding that most convenience factors either favored the Northern District of California or were neutral. The transfer covered all three related Bell Semiconductor cases filed in E.D. Michigan simultaneously.
No. A transfer under § 1404(a) is a venue change, not a merits disposition. Bell Semiconductor's infringement claims under both asserted patents survived the transfer and continue to be litigated in the Northern District of California. All remaining motions were expressly left pending at the time of transfer.
The case signals that Bell Semiconductor is actively enforcing its semiconductor process patent portfolio against fabless SoC designers. Companies whose products or design methodologies involve interconnect layer formation or clock-net aware dummy fill should assess their FTO position against US7007259B2 and US6436807B1 and monitor proceedings in N.D. California for claim-construction developments.
Monitor Bell Semiconductor's N.D. California campaign with Eureka
Track claim-construction rulings and docket developments across all three transferred Bell Semiconductor cases in N.D. California. Run an FTO screen against US7007259B2 and US6436807B1 before your next semiconductor product tape-out.
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