Book a demo

Cut patent&paper research from weeks to hours with PatSnap Eureka AI!

Try now
Cedar Lane Technologies v. STMicroelectronics — Patent Dismissal | PatSnap
Patent Litigation

Cedar Lane Technologies v. STMicroelectronics: Voluntarily Dismissed After 204 Days

Cedar Lane Technologies filed suit against STMicroelectronics in the Western District of Texas asserting two patents covering host interfaces for imaging arrays. The action was voluntarily dismissed with prejudice after 204 days, with each party bearing its own fees and costs.

Resolution time
204days
204 days — resolved well before trial, consistent with early pre-answer resolution
Patents asserted
2
US6972790B2 and 1 further patent asserted — host interface for imaging arrays
Outcome
Voluntary dismissal
Plaintiff filed Rule 41(a)(1)(A)(i) notice; each party to bear its own fees and costs
Cost ruling
Own costs
Each party bears its own attorneys' fees and costs per the dismissal notice
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Imaging array patent suit ends pre-answer in W.D. Texas

On October 26, 2022, Cedar Lane Technologies, Inc. filed an infringement action against STMicroelectronics, Inc. in the Western District of Texas (Case No. 6:22-cv-01120) before Judge Alan D. Albright. The complaint asserted two patents — US6972790B2 and US8537242B2 — covering host interface technology for imaging arrays, a foundational interface layer used in image sensor and camera system architectures.

The recorded basis of termination is Voluntary dismissal. The docket order states that plaintiff Cedar Lane Technologies filed a notice of voluntary dismissal with prejudice pursuant to Federal Rule of Civil Procedure 41(a)(1)(A)(i), with each party to bear its own fees and costs. The notice was filed before STMicroelectronics had served an answer or motion for summary judgment, satisfying the procedural threshold for a unilateral Rule 41(a)(1)(A)(i) dismissal.

The case resolved in 204 days without substantive merits litigation on the record. The specific circumstances or negotiations — if any — that preceded the dismissal are not disclosed in the available public record. The with-prejudice designation means Cedar Lane Technologies is barred from refiling these specific claims against STMicroelectronics on the same patents.

See Complete Case & Patent Analysis →
Case at a glance
CourtTexas Western District Court
JudgeAlan D Albright
FiledOctober 26, 2022
ClosedMay 18, 2023
Duration204 days
OutcomeVoluntary dismissal
Verdict causeInfringement Action
BasisVoluntary dismissal
Prior Art Intelligence
See what prior art exists on this patent.
Eureka scans millions of patents and papers to surface prior art that may have invalidated these claims before costly litigation begins.
Check Prior Art
Case data sourced from PACER / Texas Western District Court via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to Voluntary dismissal in 204 days

204 days — resolved well before trial, consistent with early pre-answer resolution

Case timeline: Complaint filed OCT 26 2022 — 204 days total Horizontal timeline showing the three key events in Cedar Lane Technologies, Inc. v STMicroelectronics, Inc. from filing to resolution. Source: PACER, Texas Western District Court. OCT 26 2022 Complaint filed Pre-trial proceedings MAY 18 2023 Voluntary dismissal 204 DAYS TOTAL
Patent at issue

US6972790B2 & US8537242B2 — Host Interface for Imaging Arrays

Publication No.US6972790B2
Application No.US09/742723
Patent details
Producthost interface circuitry and architecture for imaging arrays
Cited in actionOctober 26, 2022

Publication No.US8537242B2
Application No.US11/259791
Patent details
Productimaging array interface systems and related methods
Cited in actionOctober 26, 2022
Technical brief · sourced from PatSnap patent database
US6972790B2Primary patent
Patent figurePatent figure
Technology summary
The integration of a memory and control circuit within the CMOS imaging array allows direct data access to a processor system, addressing the interface incompatibility issue and optimizing CMOS technology's cost benefits by streamlining data transfer.
Representative claim (1 of 2 independent)
1. An interface for receiving data from an image sensor having an imaging array and a clock generator for transfer to a processor system comprising: a memory for storing imaging array data and clocking signals at a rate determined by the clocking signals; a signal generator for generating a signal for transmission to the processor system in response to the quantity of data in the memory; and a circuit for controlling the transfer of the data from the memory at a rate determined by the processor system.
Technical background
This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/177,496 filed on Jan. 21, 2000. FIELD OF THE INVENTION The invention relates generally to integrated electronic image sensing circuitry and more particularly to CMOS imaging circuitry. BACKGROUND OF THE INVENTION Integrated circuit (IC) technology, applied to imaging, is revolutionizing that field. Semiconductors can be used to represent an image as an electrical signal. Charge coupled devices (CCDs) are the most significant comm…
Patent family
16 family members across 4 jurisdictions (JP, EP, US, CA)
PatSnap Eureka · FTO Search Agent
Should your product team run an FTO against US6972790B2 and US8537242B2?

Any R&D or product team developing host interface circuitry for CMOS image sensors, camera-on-chip modules, or imaging SoC architectures should consider an FTO review against these two patents. The dismissal with prejudice binds only STMicroelectronics — all other market participants remain potential enforcement targets. This is particularly relevant for teams working on automotive camera modules, machine vision systems, or edge-AI imaging platforms.

Run FTO in Eureka
Patent data sourced from USPTO via PatSnap Eureka patent database Search patent records in Eureka ↗
Official verdict

Official order — verbatim text

Pursuant to Federal Rule of Civil Procedure 41(a)(1)(A)(i), Plaintiff Cedar Lane Technologies Inc. voluntarily dismisses the action against Defendant STMicroelectronics, Inc. with prejudice. According to Rule 41(a)(1)(A)(i), an action may be dismissed by the plaintiff without order of court by filing a notice of dismissal at any time before service by the adverse party of an answer or motion for summary judgment. Defendant STMicroelectronics, Inc. has not served an answer or a motion for summary judgment in this action. Accordingly, Plaintiff Cedar Lane Technologies Inc. hereby voluntarily dismisses this action against Defendant STMicroelectronics, Inc. with prejudice, pursuant to Rule 41(a)(1)(A)(i) with each party to bear its own fees and costs.
Source: PACER Docket, Case 6:22-cv-01120, Texas Western District Court

The dismissal notice invokes Rule 41(a)(1)(A)(i) and expressly includes a with-prejudice designation — an unusual election under a provision that defaults to without-prejudice effect. The notice further specifies that each party bears its own fees and costs. No merits ruling, claim construction, or validity finding appears on the record; the case ended on procedural grounds before any substantive judicial engagement.

PACER case 6:22-cv-01120 · Public docket record Explore in Eureka ↗
Dismissal terms

Voluntarily dismissed: what the Rule 41 notice means for both parties

Legal mechanism

Rule 41(a)(1)(A)(i): unilateral pre-answer dismissal

Under FRCP 41(a)(1)(A)(i), a plaintiff may dismiss an action without a court order by filing a notice at any time before the defendant serves an answer or motion for summary judgment. Because STMicroelectronics had not yet answered, Cedar Lane could file unilaterally. The dismissal is self-executing upon filing — no judicial approval was required.

Pre-answer, no court order needed
Prejudice designation

With prejudice: Cedar Lane cannot refile these claims

Although Rule 41(a)(1)(A)(i) dismissals are ordinarily without prejudice by default, Cedar Lane expressly designated this dismissal as with prejudice. That election bars Cedar Lane from asserting the same claims under US6972790B2 and US8537242B2 against STMicroelectronics in any future action. The specific terms beyond the prejudice designation are not disclosed in the available record.

Bars re-filing against same defendant
Defendant outcome

STMicroelectronics exits without admissions or adverse finding

STMicroelectronics never served an answer or dispositive motion, so no validity, infringement, or claim construction rulings entered against it. The with-prejudice dismissal provides permanent protection from Cedar Lane on these two patents. No fee award was ordered — each party bears its own costs.

No liability finding; permanent protection
Commercial implications

Patents remain live; third parties unaffected by this dismissal

The with-prejudice dismissal resolves only the dispute between Cedar Lane and STMicroelectronics. US6972790B2 and US8537242B2 remain in force and Cedar Lane retains the right to assert them against other parties in the imaging array and image sensor interface space. Companies in that sector should monitor Cedar Lane's enforcement posture independently.

Patents enforceable against third parties
Legal analysis based on PACER docket records for case 6:22-cv-01120 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffCedar Lane Technologies, Inc.Company/Search in Eureka ↗
DefendantSTMicroelectronics, Inc.Company/Search in Eureka ↗
Plaintiff counselIsaac RabicoffAttorneyCounsel for Cedar Lane Technologies, Inc.Search in Eureka ↗
Plaintiff law firmRabicoff Law LLCLaw FirmRepresenting Cedar Lane Technologies, Inc.Search in Eureka ↗
Defendant counselKarlee Nicole WroblewskiAttorneyCounsel for STMicroelectronics, Inc.Search in Eureka ↗
Defendant counselMatthew Scott StevensAttorneyCounsel for STMicroelectronics, Inc.Search in Eureka ↗
Defendant law firmAlston & Bird, LLPLaw FirmRepresenting STMicroelectronics, Inc.Search in Eureka ↗
Presiding judgeJudge Alan D AlbrightJudgeTexas Western District CourtSearch in Eureka ↗
R&D signals

R&D signals in the imaging array host interface space

Forward-looking patent and innovation intelligence derived from the Cedar Lane v. STMicroelectronics dispute — mapped to filing trends, portfolio gaps, and competitive positioning in the image sensor interface domain.

Patent portfolio

Cedar Lane's imaging interface portfolio beyond the two asserted patents

Cedar Lane holds at least two patents in the imaging array host interface space. Understanding whether the entity holds continuations, divisionals, or adjacent claims covering protocol handling, data bus architecture, or sensor control signalling is critical for any company active in this technology area. Portfolio mapping can reveal assertion risk before it materialises in litigation.

PAE portfolio risk
Technology landscape

Filing trends in image sensor host interface and readout architecture

Patent filings in image sensor interface architecture — covering MIPI CSI, parallel bus, and SPI-based readout protocols — have grown alongside the expansion of automotive and edge-AI imaging. Identifying which assignees hold the densest claim coverage in host interface protocols can inform both FTO strategy and R&D prioritisation for next-generation sensor SoC designs.

Sensor interface filing trends
Competitor IP posture

STMicroelectronics' defensive IP position in imaging and sensor ICs

STMicroelectronics is a significant filer in the image sensor and microelectronics domain. Analysing its patent portfolio around imaging interface, readout circuitry, and sensor SoC architecture can reveal how well-defended its product lines are against assertion campaigns and where gaps in its defensive coverage may exist relative to Cedar Lane's claimed scope.

STMicro defensive portfolio
White-space opportunity

Adjacent innovation gaps in imaging array interface design

As imaging systems migrate toward AI-accelerated edge processing, novel host interface architectures — including high-bandwidth, low-latency interfaces for multi-sensor fusion — may represent under-claimed white space. Mapping existing patent density around claimed interface topologies in US6972790B2 and US8537242B2 against emerging sensor-to-processor link designs could surface patentable differentiation opportunities.

Interface white-space mapping
Related litigation

Similar imaging array and sensor interface patent cases in W.D. Texas

Explore related patent infringement actions involving imaging sensor and host interface technology filed in the Western District of Texas, including cases before Judge Albright.

🔍
Access 40+ similar cases in PatSnap Eureka
Cedar Lane Technologies, Inc. patent enforcement history, Texas Western District Court case history, Cedar Lane Technologies, Inc.'s full IP portfolio, and comparable case analysis
PAE imaging sensor casesW.D. Texas — early dismissalsSTMicro prior litigationCedar Lane other actions
Unlock similar cases in Eureka →
Strategic implications

What this case signals for the imaging array IP landscape

An early with-prejudice exit in W.D. Texas suggests a calculated enforcement posture — and leaves open questions for others in the image sensor sector.

With-prejudice election signals deliberate finality, not abandonment

Cedar Lane's choice to dismiss with prejudice — rather than defaulting to the without-prejudice outcome a Rule 41(a)(1)(A)(i) notice ordinarily produces — suggests an intentional decision. Whether driven by a side agreement or a strategic pivot, the public record does not say. Other imaging array IP stakeholders should treat this as a resolved, not withdrawn, enforcement attempt.

Both patents remain enforceable against the broader imaging sensor market

US6972790B2 and US8537242B2 are unaffected by this dismissal beyond the Cedar Lane–STMicroelectronics relationship. Companies developing or commercialising host interface technology for imaging arrays — particularly in automotive, industrial, and consumer camera segments — face continued exposure and should conduct independent FTO analysis against these patents.

🔒
Full strategic analysis in PatSnap Eureka
Unlock deeper intelligence on Cedar Lane's imaging portfolio and PAE enforcement trends in the Western District of Texas district court.
Cedar Lane portfolio mapSimilar imaging IP casesW.D. Texas timing benchmarks
Unlock full analysis →
Analysis powered by PatSnap Eureka Litigation Intelligence Explore in Eureka ↗
Frequently asked questions

Cedar v STMicroelectronics — key questions answered

Still have questions? PatSnap Eureka can answer them instantly from patent and litigation data. Ask Eureka ↗
PatSnap Eureka

Run an FTO before the next imaging array assertion finds your product

Cedar Lane's patents remain active against third parties. Use PatSnap Eureka to map US6972790B2 and US8537242B2 against your imaging interface architecture and identify risk before litigation reaches your door.

Disclaimer

This page is compiled from public court dockets and third-party patent and litigation data via PatSnap Eureka, and is provided for general informational purposes only. The information shown — including party names, patent and application numbers, dates, case status, outcomes, and any analysis — may be incomplete, may not reflect the most recent filings or legal status, and may contain errors or omissions. Verify all details against official court records (for example, PACER) and the relevant patent office before relying on them.

Nothing on this page constitutes legal advice or a legal opinion on the validity, infringement, enforceability, or scope of any patent or case, and no attorney‑client relationship is created by its use. Any description of an outcome (such as a dismissal, settlement, or consent judgment) is a general summary, not a legal determination. All patents, trademarks, and company or law‑firm names are the property of their respective owners. PatSnap makes no warranty as to the accuracy or completeness of this content and disclaims, to the fullest extent permitted by law, all liability for reliance on it. For advice on a specific matter, consult qualified legal counsel.

Ask anything about this case.
PatSnap Eureka searches patents and litigation data to answer instantly.
Powered by PatSnap Eureka
Link copied to clipboard

Related Litigation Cases

Help us improve this page

Found incorrect or outdated information? Let us know and we'll get it fixed.