Daedalus Prime v. Marvell: Microprocessor Patent Case Dismissed
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📋 Case Summary
| Case Name | Daedalus Prime, LLC v. Marvell Technology, Inc. |
| Case Number | 7:25-cv-00413 |
| Court | Western District of Texas |
| Duration | Sep 2025 – Jan 2026 128 days |
| Outcome | Defendant Win — Complaint Dismissed |
| Patents at Issue | |
| Accused Products | Marvell Octeon 10 Microprocessor Products |
Case Overview
In a decisive ruling from the Western District of Texas, Judge Alan D. Albright dismissed Daedalus Prime, LLC’s patent infringement complaint against Marvell Technology, Inc., closing Case No. 7:25-cv-00413 just 128 days after filing. The court found that Daedalus Prime failed to adequately plead how the accused Octeon 10 microprocessor products satisfied key claim limitations — a pleading deficiency that proved fatal to at least one central infringement count and ultimately to the entire complaint.
The case centered on six U.S. patents spanning memory management, processing architecture, and power optimization technologies, all asserted against Marvell’s commercially significant Octeon 10 processor family. For patent litigators and in-house IP counsel tracking **microprocessor patent infringement** trends in Texas federal courts, this outcome underscores a critical and recurring lesson: asserting patent infringement without sufficiently addressing *how* each functional limitation is met invites early dismissal, regardless of the underlying technology’s merit.
The Parties
⚖️ Plaintiff
A patent assertion entity (PAE) that holds and licenses intellectual property portfolios in computing and semiconductor technologies.
🛡️ Defendant
A leading semiconductor company and major supplier of data infrastructure solutions, including its Octeon series of multicore processors.
Patents at Issue
This case involved six U.S. patents covering fundamental microprocessor technologies, all asserted against Marvell’s Octeon 10 family of products. These patents collectively cover technical areas including cache memory architecture, processor power states, and data processing optimization.
- • US10705960B2 — Cache memory architecture
- • US8984228B2 — Data processing optimization
- • US8769316B2 — Processor power states
- • US10725919B2 — Cache management
- • US10372197B2 — Multiprocessor systems
- • US8775833B2 — Memory access control
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The Verdict & Legal Analysis
Outcome
The court **dismissed Daedalus Prime’s complaint in its entirety**, with specific reasoning articulated around Count 6 — the direct infringement claim concerning the **’228 Patent (US8984228B2)**. No damages were awarded, and no injunctive relief was granted. The basis of termination was a failure to adequately plead direct infringement.
Key Legal Issues
The court’s dismissal language is instructive and worth examining closely:
“Because Plaintiff fails to address how the limitation’s functionality is met, the Court should dismiss Plaintiff’s claim for direct infringement of the ‘228 Patent (Count 6).”
This ruling turns on a fundamental pleading requirement in patent cases: a complaint must do more than identify an accused product and cite a patent. It must plausibly allege *how* each claim element — particularly functional limitations — is satisfied by the accused product. The court cited two key precedents, ***CPC*, 2022 WL 118955, at *2** and ***De La Vega*, 2020 WL 3528411, at *6**, reinforcing the requirement for functional limitation mapping and addressing the sufficiency threshold for direct infringement pleading.
The failure was not merely technical. Functional limitations in microprocessor patents require careful, element-by-element analysis tying the patent claim language to specific operational features of the accused product. Daedalus Prime’s complaint apparently did not supply this mapping with sufficient specificity for at least one claim — and the deficiency was broad enough to support dismissal of the full complaint.
Freedom to Operate (FTO) Analysis
This case highlights critical IP risks in microprocessor design. Choose your next step:
📋 Understand This Case’s Impact
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- View all 6 asserted patents in detail
- Analyze Marvell’s patent portfolio and litigation history
- Understand W.D. Texas pleading standards
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High Risk Area
Vague pleading of functional limitations
6 Patents Asserted
In computing & semiconductor tech
Strong Defense
Against poorly supported claims
✅ Key Takeaways
Functional limitation mapping in the complaint is not optional — it is a threshold pleading requirement in W.D. Texas patent cases.
Search related case law →Early Rule 12(b)(6) motions remain potent tools against PAE plaintiffs with thin technical pleadings.
Explore motion strategies →Judge Albright’s court will test pleading sufficiency even in a plaintiff-friendly venue.
Review W.D. Texas precedents →Detailed architecture documentation accelerates FTO analysis and strengthens litigation defense against broad assertions.
Start FTO analysis for my product →Proactive IP landscape monitoring is advisable for commercially significant chip architectures like Octeon 10.
Explore IP landscape tools →Frequently Asked Questions
Six U.S. patents were asserted: US10705960B2, US8984228B2, US8769316B2, US10725919B2, US10372197B2, and US8775833B2, covering microprocessor memory and processing architectures.
The court dismissed the complaint because Daedalus Prime failed to adequately allege how the functional limitations of the ‘228 Patent were met by Marvell’s Octeon 10 products, citing insufficient pleading under applicable W.D. Texas standards.
It reinforces that functional claim limitations require explicit, product-specific pleading — a drafting discipline that patent holders must prioritize before filing to survive early dismissal motions.
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PatSnap IP Intelligence Team
Patent Research & Competitive Intelligence · PatSnap
This analysis was produced by the PatSnap IP Intelligence Team — a group of patent analysts, IP strategists, and data scientists who work daily with PatSnap’s global patent database of over 2 billion structured data points across patents, litigation records, scientific literature, and regulatory filings.
The team specialises in tracking landmark litigation outcomes, translating complex court rulings into actionable IP strategy, and identifying the competitive intelligence implications for R&D and legal teams. All case analysis is grounded in primary sources: official court records, USPTO filings, and Federal Circuit opinions.
References
- PACER — Case No. 7:25-cv-00413
- USPTO Patent Full-Text and Image Database
- Cornell Legal Information Institute — Federal Rules of Civil Procedure
- PatSnap — IP Intelligence Solutions for Law Firms
This article is for informational purposes only and does not constitute legal advice. All case information is drawn from publicly available court records. For platform capabilities, visit PatSnap.
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