Daedalus Prime vs. Qualcomm: ITC Patent Dispute Settles in Processor Power Management Case
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📋 Case Summary
| Case Name | Daedalus Prime, LLC v. Qualcomm, Inc. |
| Case Number | 337-TA-1335 (ITC) |
| Court | USITC, Washington, D.C. |
| Duration | Sep 2022 – Apr 2024 1 year 7 months (576 days) |
| Outcome | Settled — Terms Undisclosed |
| Patents at Issue | |
| Accused Products | Qualcomm Snapdragon SoC Products (asymmetric multicore processors, power management systems) |
Case Overview
The Parties
⚖️ Plaintiff
A non-practicing entity (NPE) whose patent portfolio is focused on processor and computing architecture technologies.
🛡️ Defendant
A San Diego-based multinational semiconductor and telecommunications company, dominant supplier of mobile application processors and modem chipsets globally.
The Patents at Issue
This case involved four U.S. patents covering asymmetric multicore processor architecture and processor power management technologies, foundational IP underpinning modern mobile and embedded computing.
- • US10049080B2 — Asymmetric performance multicore architecture using a shared instruction set architecture
- • US8898494B2 — Dynamic power budget allocation across multiple processor domains
- • US8775833B2 — Enabling a non-core domain to control memory bandwidth within a processor
- • US10705588B2 — Power budgeting among processing core, graphics core, and integrated circuit bus when performance limits are reached
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The Verdict & Legal Analysis
Outcome
The investigation was **terminated by settlement** on April 11, 2024, after 576 days of litigation. Specific financial terms of the settlement were not publicly disclosed, consistent with standard ITC settlement confidentiality practices. No exclusion order or cease-and-desist order was entered, as the case resolved before a final Commission determination.
Key Legal Issues
The infringement action rested on Qualcomm’s implementation of asymmetric multicore architectures and dynamic power management systems. The ITC venue selection was strategically significant; unlike district court litigation, ITC proceedings do not allow for monetary damages but offer the powerful remedy of **exclusion orders** — effectively barring importation of accused products into the United States. For a company like Qualcomm, whose supply chain is internationally structured, such an order would carry severe commercial consequences, providing Daedalus Prime with strong settlement leverage.
Freedom to Operate (FTO) Analysis
This case highlights critical IP risks in semiconductor design. Choose your next step:
📋 Understand This Case’s Impact
Learn about the specific risks and implications from this litigation.
- View all 4 patents at issue in this technology space
- See which companies are most active in processor IP
- Understand claim construction patterns
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High Risk Area
Asymmetric Multicore Processors / Dynamic Power Management
4 Patents at Issue
In processor architecture space
Design-Around Options
Available for most claims
✅ Key Takeaways
ITC Section 337 remains a high-leverage venue for semiconductor patent assertions.
Search related case law →Multi-patent complaints covering interrelated technology layers strengthen settlement positions.
Explore precedents →Review US10049080B2, US8898494B2, US8775833B2, and US10705588B2 for prosecution and portfolio benchmarking insights.
Analyze this patent family →Document design evolution thoroughly and conduct FTO analysis against foundational processor IP.
Start FTO analysis for my product →Implement design-around strategies for high-risk design elements in multicore and power management architectures.
Explore design-around tools →File patents early to protect your own innovations in processor efficiency architectures.
Try AI patent drafting →Frequently Asked Questions
Four U.S. patents: US10049080B2, US8898494B2, US8775833B2, and US10705588B2, covering multicore processor architecture and dynamic power management systems.
Specific terms were not disclosed. However, the exclusion remedy available at the ITC — which could block Qualcomm’s chip imports — typically creates strong commercial incentive for settlement before a final Commission ruling.
It reinforces the ITC as a preferred NPE venue for semiconductor assertions and highlights power management and heterogeneous computing as active areas of IP risk for chip developers.
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PatSnap IP Intelligence Team
Patent Research & Competitive Intelligence · PatSnap
This analysis was produced by the PatSnap IP Intelligence Team — a group of patent analysts, IP strategists, and data scientists who work daily with PatSnap’s global patent database of over 2 billion structured data points across patents, litigation records, scientific literature, and regulatory filings.
The team specialises in tracking landmark litigation outcomes, translating complex court rulings into actionable IP strategy, and identifying the competitive intelligence implications for R&D and legal teams. All case analysis is grounded in primary sources: official court records, USPTO filings, and Federal Circuit opinions.
References
- USITC Section 337 Case Database
- Google Patents
- USPTO Public Patent Application Information Retrieval (PAIR)
- PatSnap — IP Intelligence Solutions for Law Firms
This article is for informational purposes only and does not constitute legal advice. All case information is drawn from publicly available court records. For platform capabilities, visit PatSnap.
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