HD Silicon Solutions v. Microchip Technology: 7-Patent FPGA & Processor Dispute Dismissed With Prejudice
HD Silicon Solutions asserted seven US patents against Microchip Technology spanning programmable logic architecture, processor sleep states, JTAG scan security, and cache error correction. After 1,265 days of litigation in the Northern District of California, the parties reached a stipulated dismissal with prejudice — each side bearing its own costs and attorneys’ fees.
Seven-Patent Semiconductor Assertion Ends in Stipulated Dismissal With Prejudice
HD Silicon Solutions, LLC filed suit against Microchip Technology, Inc. in the Northern District of California on 27 October 2021, asserting infringement of seven US patents: US7260731B1, US7810002B2, US7302619B1, US6774033B1, US6748577B2, US7154299B2, and US7870404B2. The patents collectively cover programmable logic device architecture, cache memory error correction, processor power-state transitions, JTAG scan interface security, and a metal stack for local interconnect layers — core building blocks of embedded microcontroller and FPGA products that sit at the heart of Microchip Technology’s commercial portfolio.
On 14 April 2025 — 1,265 days after filing — the court entered a dismissal with prejudice pursuant to the parties’ joint stipulation. All remaining claims and counterclaims across all seven patents were terminated simultaneously, with each party ordered to bear its own litigation costs, expenses, and attorneys’ fees. Dismissal with prejudice means HD Silicon Solutions cannot re-file these specific infringement claims against Microchip Technology on the same patents, and Microchip’s counterclaims — which typically include invalidity challenges — are likewise foreclosed.
The duration of over three years, combined with the breadth of the patent portfolio asserted, suggests the case progressed well into claim construction and potentially discovery before the parties reached a resolution. The mutual cost-bearing arrangement is consistent with a negotiated settlement rather than a litigated outcome, though the public record does not confirm the existence or terms of any underlying agreement. What drove the parties to resolve at this stage — and whether a licence or other commercial arrangement underpins the stipulation — remains undisclosed.
Filing to Dismissed with Prejudice in 1265 days
1,265 days — roughly 3.5 years, above the median for N.D. Cal. multi-patent infringement cases
Dismissed with prejudice by stipulation: what the order means for both parties
Stipulated dismissal with prejudice extinguishes all claims permanently
A dismissal with prejudice entered on the parties’ joint stipulation carries the same preclusive effect as a final judgment on the merits. HD Silicon Solutions cannot re-assert any of the seven patents against Microchip Technology on the same accused products or conduct. Microchip’s invalidity counterclaims are equally terminated, meaning no court finding of invalidity was recorded — the patents remain nominally enforceable against third parties.
Res judicata applies between these partiesHD Silicon Solutions surrenders re-filing rights against Microchip
By agreeing to dismissal with prejudice, HD Silicon Solutions permanently waives the right to sue Microchip Technology on these seven patents for the same accused conduct. However, because no invalidity finding was issued, the patents survive for enforcement against other parties. If an undisclosed licence was negotiated, HD Silicon Solutions may have secured commercial value without litigating to verdict — but the public record is silent on any such arrangement.
Patents valid but unenforceable vs. MicrochipMicrochip escapes infringement finding but receives no invalidity shield
Microchip Technology avoids any court-ordered infringement finding or damages award on all seven patents. Crucially, however, Microchip’s own invalidity counterclaims were also dismissed with prejudice, meaning it secured no formal ruling that the patents are invalid — a result that limits Microchip’s ability to rely on this litigation defensively if sued by another party holding rights to these patents. Each party bearing its own fees signals a negotiated resolution rather than a clear win for either side.
No invalidity finding recordedSeven patents remain live threat to other players in the FPGA and MCU market
The with-prejudice dismissal clears the docket without adjudicating infringement or validity, leaving all seven patents in force against the broader semiconductor industry. Competitors in programmable logic, embedded microcontrollers, and processor power-management IP should note that HD Silicon Solutions’ portfolio has not been invalidated and may be asserted in fresh actions. The mutual cost-bearing order and the case’s length suggest the parties likely resolved the dispute commercially — a pattern consistent with licensing-focused NPE strategies.
Portfolio remains enforceable vs. third partiesFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | HD Silicon Solutions, LLC | Company | Non-practising semiconductor IP entity — holder of US7260731B1 and 6 further FPGA/processor patentsSearch in Eureka ↗ |
| Defendant | Microchip Technology, Inc. | Company | Microchip Technology, Inc. — leading embedded control semiconductor manufacturer (NASDAQ: MCHP)Search in Eureka ↗ |
| Plaintiff counsel | Daniel J. Shih | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Daniel Jeffrey Shih | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Joseph S. Grinstein | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Kalpana Srinivasan | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Larry Y. Liu | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Max L. Tribble , Jr. | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | P. Ryan Burningham | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Paul Ryan Burningham | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff law firm | Susman Godfrey | Law Firm | Representing HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Defendant counsel | Brett M. Schuman | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Brett Michael Schuman | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Brian Christopher Banner | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Darryl Adams | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | David A Serati | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | David Rapp-Kirshner | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Jesse Y. Cheng | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Rachel M. Walsh | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Rachel Melissa Walsh | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant law firm | Goodwin Procter LLP | Law Firm | Representing Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant law firm | Slayden Grubert Beard PLLC | Law Firm | Representing Microchip Technology, Inc.Search in Eureka ↗ |
| Presiding judge | Judge Sallie Kim | Judge | California Northern District CourtSearch in Eureka ↗ |
Official order — verbatim text
The court’s order adopts the parties’ stipulation verbatim, dismissing all claims and counterclaims across all six named patents with prejudice. The explicit listing of each patent number — the ‘731, ‘404, ‘002, ‘299, ‘619, and ‘033 — confirms a comprehensive, coordinated resolution rather than a partial settlement. The mutual cost-bearing clause is significant: it departs from the default that a prevailing party may seek costs, suggesting neither side achieved a litigated outcome strong enough to justify a fee motion, or that cost neutrality was itself a negotiated term. No damages, royalty rate, or licensing figure appears in the public record.
US7260731B1 — Programmable logic and processor architecture patents in focus
The seven patents in suit span application dates ranging from the early 2000s, covering foundational aspects of programmable logic and embedded processor design. US7260731B1 (application no. 09/694433) addresses processor power-state management — specifically transitioning to and from sleep states — a capability central to energy-efficient microcontroller operation. US6774033B1 covers FPGA programmable logic device architecture, while US7870404B2 targets simplification of the programmable memory-to-logic interface in FPGAs. US7810002B2 addresses cache memory error correction, US7302619B1 covers trusted JTAG scan-interface access, and US7154299B2 claims processor static-mode power saving. US6748577B2 covers a metal stack for local interconnect layers.
Collectively, this portfolio targets semiconductor IP that is deeply embedded in commercial MCU and FPGA product stacks — precisely the kind of technology Microchip Technology ships at scale across automotive, industrial, and consumer electronics markets. The combination of architectural, security, and power-management claims creates a broad assertion surface: a defendant would need to design around or invalidate across multiple distinct technical domains simultaneously. For competitors developing next-generation FPGA or MCU products, the survival of this portfolio without any invalidity ruling represents a non-trivial ongoing IP risk that warrants proactive freedom-to-operate assessment.
Should your team run an FTO against the HD Silicon Solutions FPGA and processor portfolio?
Any company designing, manufacturing, or selling programmable logic devices, embedded microcontrollers, or processors with power-state management or JTAG debug interfaces should treat this portfolio as a live risk. The seven patents — covering FPGA architecture, cache ECC, JTAG trusted access, sleep-state transitions, and local interconnect metal stacks — were asserted against one of the industry’s largest MCU vendors and survived over three years of litigation without invalidation. That outcome suggests the claims may have sufficient resilience to support further assertions, particularly against companies that did not participate in this litigation and are therefore not bound by any resolution reached here.
PatSnap Eureka’s FTO Search Agent can map your product’s technical features against each of the seven patents in this portfolio, flag claim elements that overlap with your architecture, and surface prior art that may support IPR petitions before a demand letter arrives. Running an FTO now — before a notice of infringement is received — preserves design-around options and strengthens your negotiating position. Search the full HD Silicon Solutions portfolio in Eureka to generate a claim-by-claim risk heatmap across your product line.
Run a freedom-to-operate analysis on US6774033B1 to assess your product’s exposure
Run FTO in Eureka →Similar FPGA and MCU patent infringement cases in N.D. California
Cases involving FPGA architecture, processor power-state, and JTAG patents litigated in the Northern District of California against semiconductor defendants.
What this case signals for the semiconductor and FPGA IP landscape
A seven-patent assertion resolved after 3.5 years carries specific lessons for FPGA designers, MCU vendors, and embedded systems IP teams.
Breadth of assertion signals portfolio-level licensing strategy
Asserting seven patents spanning FPGA architecture, processor power states, JTAG security, and cache error correction simultaneously is consistent with a licensing-focused strategy designed to create settlement pressure across multiple product lines. Defendants facing similar multi-patent assertions should prioritise early claim mapping to identify which patents pose the greatest infringement risk and concentrate invalidity resources accordingly.
No invalidity finding leaves the portfolio exposed to re-use against competitors
Because the case ended with no court ruling on validity, all seven HD Silicon Solutions patents remain presumptively valid under 35 U.S.C. § 282. Any company shipping FPGA devices, embedded MCUs, or processors with sleep/power-state transitions should assess FTO exposure against this portfolio before entering or expanding in segments overlapping Microchip Technology’s product lines.
HD v Microchip — key questions answered
HD Silicon Solutions asserted seven US patents: US7260731B1 (processor sleep states), US7810002B2 (cache error correction), US7302619B1 (JTAG trusted access), US6774033B1 (FPGA architecture), US6748577B2 (metal stack/local interconnect), US7154299B2 (processor static-mode power saving), and US7870404B2 (FPGA programmable memory-to-logic interface). All were dismissed with prejudice by stipulation on 14 April 2025.
Dismissal with prejudice means HD Silicon Solutions cannot re-assert any of the seven patents against Microchip Technology on the same accused conduct — the claims are permanently extinguished between these two parties. However, because no court issued a finding of invalidity, all seven patents remain nominally valid and enforceable against other companies in the FPGA and MCU market that were not party to this litigation.
The case ran for 1,265 days — approximately 3.5 years — from filing on 27 October 2021 to dismissal on 14 April 2025. That duration, combined with the breadth of the seven-patent portfolio, suggests the case progressed through significant pre-trial activity including claim construction before the parties reached their stipulated resolution. The length is consistent with a contested dispute that eventually settled commercially rather than proceeding to trial.
The court’s order, adopting the parties’ stipulation, directed each side to bear its own costs, expenses, and attorneys’ fees. This arrangement departs from the default cost-shifting rule and typically signals a negotiated resolution where neither party achieved a clear litigation victory sufficient to justify a fee award. It is consistent with a settlement in which both parties made concessions, though no settlement terms are disclosed in the public record.
Yes. The dismissal with prejudice only bars HD Silicon Solutions from re-asserting these seven patents against Microchip Technology specifically. The patents remain in force and HD Silicon Solutions retains the right to assert them against other companies — including other FPGA vendors, MCU manufacturers, or electronics makers — whose products may practice the claimed inventions. The absence of any invalidity ruling means the patents carry their full presumption of validity under 35 U.S.C. § 282.
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