HD Silicon Solutions v. Microchip Technology: Federal Circuit Affirms JTAG Patent Unpatentable
HD Silicon Solutions, LLC asserted US7810002B2 — covering trusted access to a JTAG scan interface in a microprocessor — against Microchip Technology, Inc. The Federal Circuit affirmed the finding of unpatentability in a per curiam ruling, closing a 603-day appellate proceeding and extinguishing the patent’s enforceability.
Federal Circuit extinguishes JTAG interface patent in microprocessor security dispute
HD Silicon Solutions, LLC, the holder of US7810002B2 — a patent directed at providing trusted access to a JTAG scan interface in a microprocessor — brought an appeal before the United States Court of Appeals for the Federal Circuit, Case No. 23-1943, filed 23 May 2023. The opposing party, Microchip Technology, Inc., a major semiconductor and microcontroller manufacturer, had successfully challenged the patent’s validity at the tribunal below on grounds of unpatentability.
The Federal Circuit, in a per curiam opinion authored by Chief Judge Moore, Judge Lourie, and Judge Stark, affirmed the lower unpatentability determination on 15 January 2025. Affirmance at this level means the appellate court found no reversible legal error in the underlying cancellation ruling. For HD Silicon Solutions, the patent is now effectively cancelled and unenforceable. For Microchip Technology, the threat of infringement liability under US7810002B2 is conclusively resolved.
The 603-day duration from filing to disposition is consistent with a moderately contested Federal Circuit appeal. The per curiam format — without a named authoring judge — suggests the panel viewed the outcome as sufficiently clear that extended individual analysis was unwarranted, though the public record does not disclose the specific invalidity grounds affirmed. What drove the unpatentability finding at the tribunal below, and whether prior art or eligibility formed the basis, remains undisclosed from the available public record.
Filing to Unpatentable in 603 days
603 days from filing to Federal Circuit decision — consistent with typical appellate timelines of 18–24 months
Federal Circuit affirms: what the unpatentability ruling means for both parties
Affirmance: the Federal Circuit found no reversible error below
When the Federal Circuit affirms, it is holding that the tribunal below committed no reversible legal or factual error sufficient to disturb the outcome. The panel — Moore, Lourie, and Stark — issued a per curiam order, indicating consensus and no need for extended analysis. The underlying unpatentability determination survives in full force. No remand was ordered, meaning the proceeding is concluded at the merits level.
Appellate standard: no reversible errorUS7810002B2 is cancelled — HD Silicon Solutions loses enforcement rights
Affirmance of an unpatentability finding is terminal for the patent holder. US7810002B2 is no longer a valid, enforceable patent. HD Silicon Solutions cannot assert it against Microchip Technology or any other party. Further appeal would require a petition for certiorari to the US Supreme Court — a rarely granted and high-bar route, particularly on factual patentability questions.
Patent cancelled — no enforcement pathMicrochip Technology fully insulated from JTAG patent liability
Microchip Technology prevailed at the lower level and has now secured Federal Circuit affirmance. The company faces no residual infringement exposure under US7810002B2. The per curiam affirmance also raises the practical bar for any similar JTAG interface patent assertion against Microchip’s product lines — the underlying invalidity record now constitutes a strong defensive reference for future proceedings.
Full appellate vindicationJTAG security patents face elevated scrutiny post-affirmance
The cancellation of a JTAG scan interface security patent — a foundational element in microprocessor debug and security architecture — signals heightened invalidity risk for similar patent claims in this space. Semiconductor companies and IP holders in embedded security and JTAG-adjacent technologies should assess portfolio exposure. The affirmance strengthens Microchip’s freedom to operate and may deter related assertion campaigns targeting similar JTAG access control architectures.
Semiconductor IP risk elevatedFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | HD Silicon Solutions, LLC | Company | Patent assertion entity — holder of US7810002B2 covering JTAG scan interface securitySearch in Eureka ↗ |
| Defendant | Microchip Technology, Inc. | Company | Microchip Technology, Inc. — semiconductor and microcontroller manufacturer and IP challengerSearch in Eureka ↗ |
| Plaintiff counsel | Justin J. Oliver | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff counsel | Sarah S. Brooks | Attorney | Counsel for HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Plaintiff law firm | Venable LLP | Law Firm | Representing HD Silicon Solutions, LLCSearch in Eureka ↗ |
| Defendant counsel | Brett M. Schuman Esq. | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Gabriel Ferrante | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Rachel M. Walsh | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant counsel | Sanjeet Dutta | Attorney | Counsel for Microchip Technology, Inc.Search in Eureka ↗ |
| Defendant law firm | Goodwin Procter LLP | Law Firm | Representing Microchip Technology, Inc.Search in Eureka ↗ |
| Presiding judge | Judge N/A | Judge | Court of Appeals for the Federal CircuitSearch in Eureka ↗ |
Official order — verbatim text
The per curiam order — ‘AFFIRMED’ — is the Federal Circuit’s most conclusive appellate disposition. Issued by Chief Judge Moore, Judge Lourie, and Judge Stark without attribution to a single author, it signals panel unanimity and a view that the unpatentability determination below was legally sound. The terse format does not diminish its precedential weight: the lower cancellation record stands intact, and US7810002B2 is extinguished. The Federal Circuit applies a deferential standard to underlying factual patentability findings, requiring clear error to reverse — a high bar the appellant did not clear.
US7810002B2 — Trusted access to a JTAG scan interface in a microprocessor
US7810002B2 (application no. US12/544145) is directed at a method or system for providing trusted access to a JTAG (Joint Test Action Group) scan interface within a microprocessor. JTAG interfaces are IEEE 1149.1-standardised debug and test pathways built into semiconductors; controlling who can access them is a foundational concern in hardware security. The application’s 2009 filing date places it at the early edge of commercial interest in securing JTAG ports against unauthorised exploitation.
From a competitive standpoint, patents covering JTAG access control occupy a strategically sensitive position: virtually every modern microcontroller, FPGA, and SoC incorporates a JTAG interface, making such patents potentially broad in licensing reach. Microchip Technology’s successful challenge — now affirmed — removes this particular claim from the enforcement landscape. Competitors and licensees in embedded security, IoT device security, and hardware debug architecture should treat the cancellation as a signal to audit exposure under related JTAG security patents still in force.
Should you run an FTO analysis against US7810002B2 and related JTAG patents?
Any company designing or manufacturing microprocessors, microcontrollers, FPGAs, or SoCs with JTAG debug interfaces — or building security layers around such interfaces — should assess their freedom to operate in this space. While US7810002B2 is now cancelled, related continuation patents, divisionals, or family members with overlapping claim scope may still be in force. The underlying technology area remains actively patented.
PatSnap Eureka’s FTO Search Agent allows R&D and IP teams to map patent families related to JTAG trusted-access architectures, identify active claims that may read on new product designs, and flag continuation or related applications stemming from the same priority chain as US7810002B2. A structured FTO review now — before product launch — is significantly less costly than post-assertion defence.
Run a freedom-to-operate analysis on US7810002B2 to assess your product’s exposure
Run FTO in Eureka →Similar Federal Circuit appeals involving semiconductor and JTAG interface patents
Cases where the Federal Circuit reviewed patentability challenges to semiconductor interface and embedded security patents, including JTAG and microprocessor debug access technologies.
What this case signals for the semiconductor and embedded security IP landscape
A Federal Circuit affirmance of unpatentability carries durable consequences for JTAG interface patent strategy across the microprocessor sector.
JTAG security patents are now a higher-risk assertion vehicle
The Federal Circuit’s affirmance confirms that at least one JTAG trusted-access patent could not survive inter partes review or cancellation proceedings. Patent holders in the embedded security and debug interface space should audit claim structures against this outcome before filing or asserting similar patents. The per curiam nature of the ruling suggests the invalidity arguments were compelling.
Microchip Technology’s IP defence playbook merits attention
Goodwin Procter’s successful defence — securing both the lower cancellation and Federal Circuit affirmance — demonstrates an effective strategy for semiconductor defendants facing JTAG-related assertions. Companies receiving demand letters or complaints referencing JTAG scan interface patents should evaluate cancellation proceedings as a primary response, supported by this precedent.
HD v Microchip — key questions answered
The Federal Circuit affirmed the unpatentability of US7810002B2 in a per curiam order issued 15 January 2025. Chief Judge Moore, Judge Lourie, and Judge Stark found no reversible error in the lower cancellation determination. The patent — covering trusted access to a JTAG scan interface in a microprocessor — is now cancelled and unenforceable.
US7810002B2 (application no. US12/544145) covers providing trusted access to a JTAG scan interface in a microprocessor. JTAG interfaces are standardised debug and test pathways (IEEE 1149.1) embedded in semiconductors. The patent addressed securing those access points against unauthorised use — a foundational concern in hardware and embedded system security.
An affirmance means the Federal Circuit found no reversible legal or factual error in the lower tribunal’s decision. The lower ruling — here, an unpatentability finding — stands intact. For patentability questions, the Federal Circuit applies a deferential standard to factual findings, requiring demonstration of clear error to reverse. A per curiam affirmance additionally signals panel unanimity.
The only remaining option after a Federal Circuit affirmance is a petition for writ of certiorari to the US Supreme Court. The Supreme Court grants certiorari in a very small fraction of patent cases, particularly those turning on factual patentability determinations rather than novel legal questions. The practical likelihood of further successful appeal is very low.
The cancellation removes US7810002B2 from the enforcement landscape, meaning no party can be sued for infringement under that specific patent. However, related patents in the same family or covering similar JTAG trusted-access architectures may remain in force. Companies in the semiconductor, embedded security, and IoT sectors should verify whether continuation or related applications with overlapping claim scope are still active.
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