The court’s order adopts the precise language of the parties’ joint announcement: all claims for relief are dismissed with prejudice, with fee allocation explicitly symmetric — each party bears its own costs. The with-prejudice formulation is legally significant: it operates as a final adjudication, triggering res judicata and preventing Imberatek from relitigating the same patent claims against Apple. The absence of fee-shifting indicates neither party sought nor obtained an ‘exceptional case’ designation under 35 U.S.C. § 285. No royalty rate, license term, or monetary consideration appears in the public record.

Any company designing, manufacturing, or importing products incorporating stacked SoC packaging — including 3D-integrated chiplets, package-on-package (PoP) designs, or heterogeneous integration modules — should treat Imberatek’s nine-patent portfolio as an active enforcement risk. The claims cover semiconductor components arranged on top of each other with insulating materials between them and conductive connections, language broad enough to implicate widely used advanced packaging formats across mobile, PC, and datacenter chip categories.

PatSnap Eureka’s FTO Search Agent can map each of the nine Imberatek patents against your product’s packaging architecture, identify claim elements most likely to read on your specific implementation, and surface prior art or design-around pathways. Given that Imberatek has already demonstrated willingness to assert these patents against the world’s largest chipmaker — and resolved that action with apparent commercial success — proactive FTO analysis is the lower-cost alternative to reactive litigation defence.