InnoMemory v. CitiGroup: Memory Patent Case Ends in Voluntary Dismissal
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Introduction
In a case that closed almost as quickly as it opened, InnoMemory, LLC v. CitiGroup, Inc. (Case No. 1:24-cv-00231) concluded with a voluntary dismissal with prejudice just 42 days after filing — raising immediate questions about litigation strategy, pre-suit due diligence, and the growing trend of rapid resolution in patent infringement disputes targeting financial sector defendants.
Filed on March 4, 2024, in the Western District of Texas before Chief Judge Robert Pitman, InnoMemory’s infringement action centered on two U.S. patents covering integrated circuit memory architecture — technologies central to high-performance computing environments. The defendant, CitiGroup, Inc., one of the world’s largest financial institutions, never filed an answer before InnoMemory pulled the plug on April 13, 2024.
For patent attorneys, IP professionals, and R&D teams, this case offers instructive lessons in memory IC patent infringement strategy, Rule 41 voluntary dismissal mechanics, and the practical realities of asserting semiconductor patents against non-practicing entity defendants in technology-adjacent industries.
📋 Case Summary
| Case Name | InnoMemory, LLC v. CitiGroup, Inc. |
| Case Number | 1:24-cv-00231 |
| Court | Western District of Texas |
| Duration | Mar 4, 2024 – Apr 15, 2024 42 days |
| Outcome | Case Dismissed – Voluntary Dismissal with Prejudice |
| Patents at Issue | |
| Accused Products | Memory systems implementing variable read-width architectures and low-power refresh methodologies |
Case Overview
The Parties
⚖️ Plaintiff
A patent assertion entity holding intellectual property related to memory circuit architecture and low-power memory design.
🛡️ Defendant
A global financial services corporation that operates massive computing infrastructure relying on integrated circuit memory systems.
The Patents at Issue
Two U.S. patents were asserted in this action, covering integrated circuit memory architecture — technologies central to high-performance computing environments. These are registered with the U.S. Patent and Trademark Office (USPTO).
- • U.S. Patent No. 7,057,960 B1 — Covers an integrated circuit random access memory capable of reading either one or more than one data word in a single clock cycle.
- • U.S. Patent No. 6,240,046 B1 — Covers a method and architecture for reducing power consumption in memory devices during refresh operations.
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Litigation Timeline & Procedural History
| March 4, 2024 | Complaint filed, Western District of Texas |
| April 13, 2024 | Plaintiff filed voluntary dismissal with prejudice |
| April 15, 2024 | Court formally closed the case |
Venue
The Western District of Texas has been a premier destination for patent infringement filings due to its historically plaintiff-friendly reputation, experienced patent dockets, and procedural efficiency. Chief Judge Robert Pitman presided, though the case never advanced to substantive judicial engagement.
Duration Analysis
At 42 days from filing to closure, this case represents an extraordinarily compressed lifecycle. No answer, no motion practice, no claim construction — the defendant was never formally drawn into the litigation before InnoMemory exercised its right to exit under Federal Rule of Civil Procedure 41(a)(1)(A)(i). The speed of resolution suggests that pre-litigation negotiation, licensing discussions, or strategic reassessment occurred entirely outside the public docket — a pattern increasingly common in NPE-led patent litigation.
The Verdict & Legal Analysis
Outcome
On April 13, 2024, InnoMemory filed a notice of voluntary dismissal with prejudice pursuant to Fed. R. Civ. P. 41(a)(1)(A)(i). The court confirmed on April 15, 2024, that because CitiGroup had not served an answer or motion for summary judgment, InnoMemory’s notice was self-effectuating — no court order was required to terminate the case. No damages were awarded. No injunctive relief was sought or granted. The dismissal with prejudice means InnoMemory cannot re-file the same claims against CitiGroup based on the same patents.
Procedural & Legal Mechanics
Rule 41(a)(1)(A)(i) is a powerful but often underappreciated procedural tool. It permits unilateral plaintiff exit — without court involvement — provided the defendant has not yet answered or moved for summary judgment. The Fifth Circuit confirmed in In re Amerijet Int’l, Inc., 785 F.3d 967, 973 (5th Cir. 2015) that such a notice is “self-effectuating and terminates the case in and of itself.” Critically, the with prejudice designation distinguishes this dismissal from a tactical retreat. A dismissal without prejudice would preserve InnoMemory’s ability to re-file; by choosing prejudice, InnoMemory permanently foreclosed reassertion of these specific claims against CitiGroup. This distinction carries significant strategic weight.
Why Dismissal With Prejudice?
Several scenarios commonly produce this outcome in NPE patent litigation:
- Pre-Suit Settlement or License Agreement: The parties may have reached a confidential licensing arrangement before CitiGroup formally appeared. Dismissal with prejudice following a paid license is standard practice — it resolves the dispute while protecting settlement confidentiality.
- Strategic Reassessment: InnoMemory may have identified claim construction vulnerabilities, potential invalidity exposure, or prior art risks that made continued litigation imprudent against a well-resourced defendant like CitiGroup.
- Inter Partes Review Threat: Financial defendants with deep litigation budgets frequently leverage IPR petitions at the USPTO as a defensive tool. The threat of IPR — which can invalidate asserted patents — may have factored into InnoMemory’s calculus.
- Jurisdictional or Standing Concerns: Internal evaluation may have surfaced questions about patent ownership chain of title or licensing authority.
Legal Significance
While this case produced no substantive rulings on validity or infringement, it contributes to a visible pattern: memory architecture patents — particularly those covering DRAM refresh optimization and variable read-width designs — are being asserted against downstream technology users, not just semiconductor manufacturers. This downstream assertion strategy carries inherent legal risk. End-user defendants frequently lack the technical sophistication of chip manufacturers but may have greater financial resources to fund IPR campaigns or extended litigation.
Strategic Takeaways
For Patent Holders: Early case assessment must include realistic evaluation of defendant litigation posture. Large financial institutions maintain sophisticated IP legal teams and litigation reserves. The economics of assertion must be modeled against full-cycle defense costs.
For Accused Infringers: Even pre-answer, defendants should evaluate IPR petitioning timelines. A credible IPR threat can reshape plaintiff calculus without a single district court filing. Early engagement of patent counsel — even before formal appearance — is advisable.
For R&D Teams: Patents covering memory refresh power reduction and multi-word read architectures remain active assertion vehicles. Engineering teams deploying memory-intensive systems should conduct Freedom-to-Operate (FTO) analysis covering both U.S. 7,057,960 and U.S. 6,240,046 claim families.
Industry & Competitive Implications
The assertion of memory circuit patents against a major financial institution reflects the expanding geography of semiconductor IP enforcement. As financial services firms build out AI-driven infrastructure, high-frequency trading systems, and cloud-based data platforms, their exposure to upstream technology patents grows proportionally.
InnoMemory’s choice to target CitiGroup — rather than a memory chip OEM — signals a maturation of downstream assertion strategies in the memory patent space. Financial firms are now firmly within the target perimeter of semiconductor IP holders.
For the broader memory technology sector, U.S. Patent Nos. 7,057,960 and 6,240,046 remain enforceable assets. Their rapid dismissal against CitiGroup does not diminish their assertion potential against other defendants — unless similar with-prejudice dismissals accumulate across multiple defendants, which could reflect deeper validity concerns.
Licensing trends in this space suggest that early-stage settlements — before answer, before discovery cost escalation — remain the economically rational outcome for both NPE plaintiffs and well-resourced defendants. This case appears consistent with that trend.
Freedom to Operate (FTO) Analysis
This case highlights critical IP risks in memory IC design. Choose your next step:
📋 Understand This Case’s Impact
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- View all related memory IC patents in this space
- See which companies are most active in memory architecture IP
- Understand claim construction patterns for IC memory
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High Risk Area
Memory devices with variable read-width or low-power refresh
2 Patents at Issue
Foundational memory IC designs
Complex FTO
Requires detailed technical and legal review
✅ Key Takeaways
Rule 41(a)(1)(A)(i) dismissals with prejudice before defendant answer are increasingly used to close confidential licensing arrangements without public disclosure.
Search related case law →Downstream assertion of semiconductor patents against financial sector defendants is an active and evolving strategy.
Explore precedents →IPR threat credibility significantly influences early-stage plaintiff settlement decisions.
Understand IPR strategies →Memory architecture patent families covering power reduction and read-width optimization warrant active monitoring in portfolio landscaping.
Monitor patent families →Pre-suit licensing negotiations may drive case outcomes more than in-court proceedings — public dockets may underrepresent actual resolution activity.
View licensing trends →FTO analysis for memory system deployments should address variable read-width and refresh-power-reduction claim families.
Start FTO analysis for my product →U.S. 6,240,046 and U.S. 7,057,960 remain live patents with enforcement history — include in IP risk assessments.
Assess IP risk with AI →Frequently Asked Questions
U.S. Patent No. 7,057,960 B1 (variable read-width RAM architecture) and U.S. Patent No. 6,240,046 B1 (memory refresh power reduction method), both asserted for infringement.
InnoMemory filed a voluntary dismissal under Fed. R. Civ. P. 41(a)(1)(A)(i) before CitiGroup filed an answer. The with-prejudice designation bars re-filing the same claims against CitiGroup — commonly associated with confidential settlement or strategic withdrawal.
The case reinforces the trend of asserting semiconductor IP against downstream financial sector users. Companies deploying memory-intensive infrastructure should proactively assess exposure to this patent family.
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PatSnap IP Intelligence Team
Patent Research & Competitive Intelligence · PatSnap
This analysis was produced by the PatSnap IP Intelligence Team — a group of patent analysts, IP strategists, and data scientists who work daily with PatSnap’s global patent database of over 2 billion structured data points across patents, litigation records, scientific literature, and regulatory filings.
The team specialises in tracking landmark litigation outcomes, translating complex court rulings into actionable IP strategy, and identifying the competitive intelligence implications for R&D and legal teams. All case analysis is grounded in primary sources: official court records, USPTO filings, and Federal Circuit opinions.
References
- USPTO Patent Full-Text Database
- PACER Case Lookup (1:24-cv-00231)
- U.S. Patent and Trademark Office — Patent Resources
- Cornell Legal Information Institute — Fed. R. Civ. P. 41(a)
- PatSnap — IP Intelligence Solutions for Law Firms
This article is for informational purposes only and does not constitute legal advice. All case information is drawn from publicly available court records. For platform capabilities, visit PatSnap.
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