Intel v. VLSI Technology: Federal Circuit Splits Decision Across Three Semiconductor Patents
Intel challenged a patent infringement judgment held by VLSI Technology LLC covering memory voltage, clock speed management, and voltage-based memory scaling technologies. The Federal Circuit issued a mixed ruling — affirming, reversing, and vacating portions — and remanded the case, leaving the dispute unresolved across 537 days of appellate proceedings.
Federal Circuit Issues Split Decision in High-Stakes Intel–VLSI Semiconductor IP Battle
Intel Corp. filed this appeal at the U.S. Court of Appeals for the Federal Circuit on 15 June 2022, challenging a patent infringement judgment obtained by VLSI Technology LLC. The dispute centres on three U.S. patents — US8156357B2, US7523373B2, and US7725759B2 — covering minimum memory operating voltage techniques, clock speed management in electronic devices, and voltage-based memory size scaling in data processing systems. These are foundational semiconductor power and performance management technologies.
The Federal Circuit closed the case on 4 December 2023 with a verdict of 'Affirmed in Part, Reversed in Part, Vacated in Part, and Remanded.' The recorded basis of termination is 'Appeal Dismissed in Part.' The verdict text indicates a substantive mixed disposition across the three patents, while the docket's basis of termination characterises part of the appeal as dismissed. The specific terms and the precise allocation of each outcome to each patent are not fully disclosed in the available public record.
The 537-day appellate duration and the fragmented disposition — spanning affirmance, reversal, vacatur, and remand — suggest a technically complex record with contested claim construction and validity issues across multiple patent families. Because the Federal Circuit remanded portions of the case, further district court proceedings are likely. What drove the partial reversal and vacatur, and which specific patent claims survived or fell, is not fully determinable from the public record alone.
See Complete Case & Patent Analysis →Filing to Appeal Dismissed in Part in 537 days
537 days from filing to Federal Circuit decision — consistent with complex multi-patent semiconductor appeals
US8156357B2, US7523373B2 & US7725759B2 — Semiconductor Power & Memory Management
Any company designing or manufacturing processors, SoCs, memory controllers, or embedded systems that implement dynamic voltage scaling, adaptive clock management, or memory power optimisation should treat these three patents as active FTO concerns. VLSI's willingness to litigate against Intel at the appellate level — and the Federal Circuit's affirmance of at least some claims — confirms that this IP is actively enforced. The remand means claim scope is still being defined, making now the right time to map your architecture against these patent families.
Official order — verbatim text
The Federal Circuit's disposition — affirmed in part, reversed in part, vacated in part, and remanded — reflects a patent-by-patent or issue-by-issue review under applicable standards of review, which typically include de novo review for claim construction and legal questions, and clear error review for factual findings. The recorded basis of termination is 'Appeal Dismissed in Part'; the docket verdict states the broader mixed ruling. The precise allocation of each outcome to each of the three patents is not fully disclosed in the available public record.
Federal Circuit's split ruling: what each part means for Intel and VLSI
What 'Affirmed in Part, Reversed in Part, Vacated in Part, Remanded' means
A split Federal Circuit disposition means the appellate panel found no reversible error on some issues (affirmed), found legal error on others (reversed), and nullified certain rulings below while sending them back for further proceedings (vacated and remanded). No single outcome applies to all three patents — each claim or issue group received its own treatment. The remand indicates the litigation continues at the lower court level on at least some issues.
Mixed appellate dispositionVLSI retains some wins but faces remand risk on others
The portions affirmed by the Federal Circuit strengthen VLSI's enforceability position on those specific claims or issues — the lower court's findings on those points survive appellate scrutiny. However, the reversed and vacated portions represent meaningful setbacks: VLSI loses some ground it gained at the district level, and the remand reopens proceedings where the outcome remains uncertain. The specific claims affected are not fully disclosed in the available public record.
Partial win preservedIntel secures partial reversal but remand prolongs exposure
Intel succeeded in persuading the Federal Circuit to reverse and vacate portions of the lower judgment — a meaningful appellate win on those issues. However, the affirmed portions confirm Intel's liability or adverse rulings on at least some claims. The remand means Intel's exposure on the contested technologies is not yet fully resolved. Further proceedings at the district court level are anticipated on the vacated issues.
Partial reversal securedContinued uncertainty for semiconductor memory and power management IP
For the broader semiconductor industry, this mixed ruling signals that courts will scrutinise memory voltage scaling, clock speed management, and power optimisation patents on a claim-by-claim basis rather than as a bloc. Companies operating in low-power microprocessor and SoC design should monitor the remanded proceedings closely, as the ultimate scope of VLSI's enforceable IP remains unsettled. The case also suggests that multi-patent infringement actions involving foundational process IP face heightened appellate fragmentation risk.
IP scope remains unsettledFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Intel, Corp. | Company | /Search in Eureka ↗ |
| Defendant | VLSI Technology, LLC | Company | /Search in Eureka ↗ |
| Plaintiff counsel | Alison Burton | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | Amanda L. Major Esq. | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | Joseph J. Mueller | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | Lauren B. Fletcher | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | Mary Virginia Sooter | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | Steven Jared Horn | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff counsel | William F. Lee | Attorney | Counsel for Intel, Corp.Search in Eureka ↗ |
| Plaintiff law firm | Wilmer Cutler Pickering Hale & Dorr LLP | Law Firm | Representing Intel, Corp.Search in Eureka ↗ |
| Defendant counsel | Alan J. Heinrich | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Amy E. Proctor | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Babak Redjaian | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Benjamin W. Hattenbach Esq. | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Charlotte J. Wen | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Dominik Slusarczyk | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Jeffrey A. Lamken | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Michael Gregory Pattillo | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Morgan Chu Esq. | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant counsel | Rayiner Hashem | Attorney | Counsel for VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant law firm | Irell & Manella LLP | Law Firm | Representing VLSI Technology, LLCSearch in Eureka ↗ |
| Defendant law firm | MoloLamken LLP | Law Firm | Representing VLSI Technology, LLCSearch in Eureka ↗ |
| Presiding judge | Judge N/A | Judge | Court of Appeals for the Federal CircuitSearch in Eureka ↗ |
R&D signals in semiconductor power & memory management IP
Forward-looking patent intelligence on VLSI Technology's enforcement portfolio, Intel's defensive IP posture, and the filing landscape around voltage scaling and clock management technologies.
VLSI Technology's broader semiconductor power IP portfolio
VLSI Technology has asserted patents spanning memory voltage control, clock speed management, and memory scaling — suggesting a portfolio built around foundational semiconductor power efficiency IP originally developed in the early-to-mid 2000s. Monitoring VLSI's continuation filings and related family members can signal where future enforcement actions may be directed, particularly in the mobile and data centre processor segments.
Active enforcement portfolioFiling trends in dynamic voltage and frequency scaling patents
Patent filing activity around dynamic voltage and frequency scaling (DVFS), adaptive clock management, and memory power optimisation has remained high as the industry pushes toward energy-efficient AI accelerators, edge SoCs, and high-bandwidth memory architectures. Identifying recent assignees and filing trajectories in this space can reveal which players are building defensive or offensive positions adjacent to the VLSI patent families asserted in this case.
High filing activityIntel's defensive patent activity in power and memory management
As a defendant in this high-stakes appellate proceeding, Intel's own patent filings in voltage management, memory power control, and processor clock architecture are relevant to assessing design-around options and cross-licensing leverage. Examining Intel's prosecution activity in these domains can reveal how the company is building IP defences for future assertions by VLSI or similarly positioned patent holders.
Defensive IP activityAdjacent innovation opportunities near VLSI's asserted claims
The three asserted patents focus on voltage thresholds for memory, clock frequency control, and voltage-driven memory sizing — but adjacent areas such as adaptive power gating, near-threshold computing architectures, and AI-workload-specific power scheduling may represent relatively open IP space. R&D teams designing next-generation low-power processors or in-memory computing systems should evaluate whether these adjacencies offer freedom to innovate outside VLSI's asserted claim boundaries.
Innovation white spaceSimilar Federal Circuit appeals in semiconductor power management IP
Explore analogous Federal Circuit infringement appeals involving semiconductor voltage scaling, clock management, and memory power optimisation patents — including other VLSI Technology enforcement actions.
What this case signals for the semiconductor IP landscape
A split Federal Circuit ruling across three foundational semiconductor patents keeps the Intel–VLSI dispute alive and raises enforcement uncertainty for the sector.
Multi-patent appeals at the Federal Circuit carry fragmentation risk
When three or more patents are appealed together, the Federal Circuit is more likely to issue split dispositions — affirming some, reversing others, and remanding the rest. Companies facing or asserting large patent portfolios in semiconductor IP should model for partial reversal scenarios rather than binary outcomes.
Remand after vacatur restarts district court exposure
The Federal Circuit's remand on vacated issues means Intel's legal exposure on those specific technology claims is not resolved. In-house teams at semiconductor manufacturers should treat a Federal Circuit remand as reopening — not closing — a chapter, and should reassess litigation reserves accordingly.
Intel v VLSI — key questions answered
The Federal Circuit issued a mixed ruling: affirmed in part, reversed in part, vacated in part, and remanded. The case involved three patents — US8156357B2, US7523373B2, and US7725759B2 — covering semiconductor memory voltage, clock speed management, and memory scaling technologies. The recorded basis of termination is 'Appeal Dismissed in Part.' The precise allocation of each outcome to each patent is not fully disclosed in the available public record.
Three patents were asserted: US8156357B2 (minimum memory operating voltage technique), US7523373B2 (system and method of managing clock speed in an electronic device), and US7725759B2 (voltage-based memory size scaling in a data processing system). All relate to semiconductor power and performance management technologies.
This split disposition means the Federal Circuit found no reversible error on some issues (affirmed — VLSI's wins on those points survive), found legal error on others (reversed — Intel prevailed on those issues), and nullified certain lower court rulings while returning them for further proceedings (vacated and remanded). The litigation continues at the district court level on at least the remanded issues, meaning neither party achieved a clean final resolution.
A remand after vacatur means the district court must reconsider the vacated issues under guidance from the Federal Circuit. For Intel, this reopens the possibility of a more favourable outcome on those issues; for VLSI, it means some of its lower court wins are not yet finalised. The specific issues remanded are not fully disclosed in the available public record.
Yes. VLSI's successful enforcement of at least some claims of US8156357B2, US7523373B2, and US7725759B2 against Intel — confirmed by the Federal Circuit's partial affirmance — indicates these patents are actively enforceable. Companies designing products incorporating dynamic voltage scaling, adaptive clock management, or memory power optimisation should conduct FTO analysis against these patents and monitor VLSI's broader portfolio for continuation filings.
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