Book a demo

Cut patent&paper research from weeks to hours with PatSnap Eureka AI!

Try now
Monterey Research v. AMD: Federal Circuit Affirms Unpatentability | PatSnap
Patent Litigation

Monterey Research v. AMD: Federal Circuit Affirms Unpatentability of Memory IC Patent

Monterey Research, LLC challenged Advanced Micro Devices over US6961807, a patent covering integrated circuits adaptable for differing memory requirements. The Federal Circuit affirmed the unpatentability determination in a per curiam judgment after 602 days of appellate proceedings.

Resolution time
602days
602 days from filing to Federal Circuit disposition
Patents asserted
1
US6961807 — integrated circuit adaptable for differing memory requirements
Outcome
Unpatentable
Federal Circuit found no reversible error; unpatentability determination stands
Cost ruling
Not recorded
No costs ruling disclosed in the available public record
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Federal Circuit closes the door on Monterey Research's memory IC patent

Monterey Research, LLC — the patent holder of US6961807 (application no. US10/229432) — appealed to the United States Court of Appeals for the Federal Circuit, Case No. 22-1460, filed 10 February 2022. The patent-in-suit covers a device, system and method for an integrated circuit adaptable for use in computing systems of differing memory requirements. The defendant in the underlying proceeding was Advanced Micro Devices, Inc., a leading semiconductor manufacturer.

The Federal Circuit issued a per curiam affirmance on 5 October 2023 under Federal Circuit Rule 36, affirming the unpatentability of the asserted patent. The recorded Basis of Termination is 'Unpatentable'; the docket order states 'AFFIRMED. See Fed. Cir. R. 36.' A Rule 36 judgment is a summary affirmance without a written opinion, signalling the appellate panel found no reversible error warranting further elaboration.

The 602-day duration is consistent with standard Federal Circuit appellate timelines for patentability appeals. Because the affirmance was entered under Rule 36 without a written opinion, the specific reasoning of the panel — and any arguments Monterey Research advanced — are not disclosed in the public record. The absence of a written opinion limits the precedential value of this ruling but leaves the unpatentability finding fully in force.

See Complete Case & Patent Analysis →
Case at a glance
Case no.22-1460
CourtCourt of Appeals for the Federal Circuit
JudgeN/A
FiledFebruary 10, 2022
ClosedOctober 5, 2023
Duration602 days
OutcomeUnpatentable
Verdict causePatentability
BasisUnpatentable
Prior Art Intelligence
See what prior art exists on this patent.
Eureka scans millions of patents and papers to surface prior art that may have invalidated these claims before costly litigation begins.
Check Prior Art
Case data sourced from PACER / Court of Appeals for the Federal Circuit via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to Unpatentable in 602 days

602 days from filing to Federal Circuit disposition

Case timeline: Appeal filed FEB 10 2022 — 602 days total Horizontal timeline showing the three key events in Monterey Research, LLC v Advanced Micro Devices, Inc. from filing to resolution. Source: PACER, Court of Appeals for the Federal Circuit. FEB 10 2022 Appeal filed Pre-trial proceedings OCT 5 2023 Unpatentable 602 DAYS TOTAL
Patent at issue

US6961807 — Integrated circuit adaptable for differing memory requirements

Publication No.US6961807B1
Application No.US10/229432
Patent details
ProductIntegrated circuit adaptable for use in computing systems of differing memory requirements
Cited in actionFebruary 10, 2022
Technical brief · sourced from PatSnap patent database
Patent figurePatent figure
Representative claim (1 of 4 independent)
1. An integrated circuit device, comprising: a microprocessor; a multipurpose memory coupled with the microprocessor; a cache controller; a first memory port for coupling a first external memory device with said cache controller; and a second memory port for coupling a second external memory device with said multipurpose memory; wherein the multipurpose memory has a first operating mode for dynamically storing as a cache memory portions of a program obtained from the first external memory device for execution by the microprocessor under control of the cache controller, and the multipurpose memory has a second ope…
Technical background
TECHNICAL FIELD This application relates, in general, to integrated circuits and associated memory systems. BACKGROUND Computer chips, such as microprocessors or microcontrollers, are made of a die and a package. The die has an integrated circuit thereon which may include various circuits such as the microprocessor, memory, power circuits, logic circuit, interface circuits, etc. From the die, signal lines are connected to signal lines of the package. The package has pins or other conductors extending from the packa…
Patent family
1 family member across 1 jurisdiction (US)
PatSnap Eureka · FTO Search Agent
Should you run an FTO analysis against US6961807 and related Monterey Research patents?

US6961807 has been found unpatentable and the finding affirmed by the Federal Circuit, removing it as a direct enforcement risk. However, semiconductor designers, memory system integrators, and computing platform developers working on adaptable IC architectures should assess whether Monterey Research holds related patents in the same family or technology domain that remain in force and could cover similar product functionality.

Run FTO in Eureka
Patent data sourced from USPTO via PatSnap Eureka patent database Search patent records in Eureka ↗
Official verdict

Official order — verbatim text

THIS CAUSE having been heard and considered, it is ORDERED and ADJUDGED: PER CURIAM (DYK, TARANTO, and CHEN, Circuit Judges). AFFIRMED. See Fed. Cir. R. 36.
Source: PACER Docket, Case 22-1460, Court of Appeals for the Federal Circuit

The Federal Circuit's per curiam order — 'AFFIRMED. See Fed. Cir. R. 36.' — is the court's most summary form of disposition, entered without written reasoning. It confirms the panel unanimously found no reversible error in the unpatentability determination below. For Monterey Research, the absence of a reasoned opinion forecloses the ability to identify specific grounds for further challenge; for AMD, it delivers an unambiguous and final resolution.

PACER case 22-1460 · Public docket record Explore in Eureka ↗
Court ruling

Federal Circuit affirms: what the ruling means for both parties

Legal mechanism

What a Federal Circuit Rule 36 affirmance means

A Rule 36 judgment is a one-line per curiam affirmance issued without a written opinion. It signals the panel found no reversible error in the decision below but does not elaborate on reasoning. The lower tribunal's unpatentability determination is fully upheld and binding. Because no opinion is written, the ruling carries no precedential weight for future cases, but is conclusive between the parties.

No reversible error found
Patent holder outcome

Monterey Research's patent claim extinguished at appellate level

The affirmance of unpatentability means US6961807 cannot be enforced. Monterey Research's appellate challenge failed, and the patent's claims remain invalid as determined in the underlying proceeding. Further challenge options at this level are exhausted. Any petition for rehearing or certiorari to the Supreme Court would require additional procedural steps not reflected in this record.

Enforcement rights lost
Challenger outcome

AMD secures full protection from US6961807 infringement claims

Advanced Micro Devices emerges from this appeal with the unpatentability finding confirmed. AMD's products and architectures that were the subject of the underlying validity dispute face no further exposure from US6961807. The Rule 36 affirmance provides AMD with a clean, final resolution without the complexity of a reasoned opinion that could be parsed or distinguished in future proceedings.

Validity challenge succeeded
Commercial implications

Adaptive memory IC patent space: enforcement risk reduced

The invalidation of US6961807 removes one assertion vector in the integrated circuit and adaptive memory architecture space. Semiconductor companies and memory system designers facing similar claims from this patent family or related assertion entities should note that the Federal Circuit declined to disturb the unpatentability finding. The absence of a written opinion, however, limits the ability to cite this ruling as persuasive authority in analogous disputes.

IC patent enforcement weakened
Legal analysis based on PACER docket records for case 22-1460 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffMonterey Research, LLCCompany/Search in Eureka ↗
DefendantAdvanced Micro Devices, Inc.Company/Search in Eureka ↗
Plaintiff counselDonald Lee JacksonAttorneyCounsel for Monterey Research, LLCSearch in Eureka ↗
Plaintiff law firmDavidson, Berquist, Jackson & Gowdey, LLPLaw FirmRepresenting Monterey Research, LLCSearch in Eureka ↗
Presiding judgeJudge N/AJudgeCourt of Appeals for the Federal CircuitSearch in Eureka ↗
R&D signals

R&D signals in the adaptive integrated circuit and memory architecture space

Forward-looking patent and R&D intelligence derived from Monterey Research v. AMD, covering portfolio activity, technology filing trends, and white-space opportunities in adaptive memory IC design.

Patent portfolio

Monterey Research's active semiconductor patent holdings

Monterey Research is a patent assertion entity with holdings across semiconductor and memory architecture domains. Despite the invalidation of US6961807, its broader portfolio may include related patents covering adaptive IC design, memory interface protocols, or controller architectures. Tracking Monterey Research's active and pending applications is essential for any semiconductor firm assessing forward-looking assertion risk.

Portfolio assertion risk
Technology landscape

Filing trends in adaptable memory interface IC design

The technology space around integrated circuits adaptable for differing memory requirements is seeing sustained filing activity, driven by heterogeneous computing, HBM adoption, and LPDDR evolution. Understanding the density and assignee distribution of filings in this area helps semiconductor R&D teams anticipate freedom-to-operate constraints and identify where innovation is concentrating.

Active filing domain
Competitive IP position

AMD's patent posture in memory architecture and IC design

Advanced Micro Devices maintains an extensive patent portfolio in semiconductor architecture, including memory subsystems, chiplet design, and heterogeneous integration. AMD's successful defense in this validity challenge is consistent with a broader strategy of contesting weak third-party patents while building defensive depth in core memory and processor architecture domains.

Strong defensive portfolio
White-space opportunity

Post-invalidation white space in adaptive IC memory claim territory

The invalidation of US6961807 clears specific claim territory around circuits adaptable to differing memory requirements. For R&D teams working on configurable memory controllers, multi-standard memory interfaces, or platform-agnostic IC architectures, this white space — combined with evolving standards in HBM3, LPDDR5X, and CXL memory — may present differentiated filing opportunities.

Filing opportunity identified
Related litigation

Similar Federal Circuit patent validity appeals in the semiconductor space

Explore Federal Circuit appeals involving semiconductor and integrated circuit patent validity challenges, including Rule 36 affirmances and unpatentability determinations in memory architecture disputes.

🔍
Access 40+ similar cases in PatSnap Eureka
Monterey Research, LLC patent enforcement history, Court of Appeals for the Federal Circuit case history, Monterey Research, LLC's full IP portfolio, and comparable case analysis
Rule 36 affirmances in IC casesMonterey Research prior appealsAMD patent validity winsMemory architecture invalidity cases
Unlock similar cases in Eureka →
Strategic implications

What this case signals for the semiconductor IP landscape

A Rule 36 affirmance of unpatentability sends a clear signal about the viability of adaptive memory IC claims before the Federal Circuit.

Rule 36 affirmances signal weak appellate records for patent holders

When the Federal Circuit issues a Rule 36 judgment, it typically signals the panel found the appeal insufficiently meritorious to warrant a written opinion. Patent holders appealing unpatentability findings in the integrated circuit space should assess the strength of their claim construction and prior art arguments before investing in Federal Circuit appeals.

AMD's IPR or inter partes strategy proves effective against memory IC assertions

The underlying invalidity or cancellation action that produced the unpatentability finding — affirmed here — demonstrates that AMD's defensive IP strategy in the memory architecture domain was effective. Competitors facing similar assertion campaigns may consider analogous validity challenges as a primary defensive tool.

🔒
Full strategic analysis in PatSnap Eureka
Unlock full strategic analysis of this Federal Circuit semiconductor patent appeal, including portfolio risk scoring and filing opportunity maps.
Monterey Research portfolio riskAMD defensive IP patternsMemory IC white-space filing map
Unlock full analysis →
Analysis powered by PatSnap Eureka Litigation Intelligence Explore in Eureka ↗
Frequently asked questions

Monterey v Advanced — key questions answered

Still have questions? PatSnap Eureka can answer them instantly from patent and litigation data. Ask Eureka ↗
PatSnap Eureka

Monitor adaptive memory IC patent risk across your product portfolio

With US6961807 invalidated, the surrounding patent landscape remains active. Use PatSnap Eureka to run FTO searches, track Monterey Research's surviving assets, and monitor Federal Circuit developments in the semiconductor patent space.

Disclaimer

This page is compiled from public court dockets and third-party patent and litigation data via PatSnap Eureka, and is provided for general informational purposes only. The information shown — including party names, patent and application numbers, dates, case status, outcomes, and any analysis — may be incomplete, may not reflect the most recent filings or legal status, and may contain errors or omissions. Verify all details against official court records (for example, PACER) and the relevant patent office before relying on them.

Nothing on this page constitutes legal advice or a legal opinion on the validity, infringement, enforceability, or scope of any patent or case, and no attorney‑client relationship is created by its use. Any description of an outcome (such as a dismissal, settlement, or consent judgment) is a general summary, not a legal determination. All patents, trademarks, and company or law‑firm names are the property of their respective owners. PatSnap makes no warranty as to the accuracy or completeness of this content and disclaims, to the fullest extent permitted by law, all liability for reliance on it. For advice on a specific matter, consult qualified legal counsel.

Ask anything about this case.
PatSnap Eureka searches patents and litigation data to answer instantly.
Powered by PatSnap Eureka
Link copied to clipboard

Related Litigation Cases

Help us improve this page

Found incorrect or outdated information? Let us know and we'll get it fixed.