Monterey Research v. AMD: Federal Circuit Affirms Unpatentability of Memory IC Patent
Monterey Research, LLC challenged Advanced Micro Devices over US6961807, a patent covering integrated circuits adaptable for differing memory requirements. The Federal Circuit affirmed the unpatentability determination in a per curiam judgment after 602 days of appellate proceedings.
Federal Circuit closes the door on Monterey Research's memory IC patent
Monterey Research, LLC — the patent holder of US6961807 (application no. US10/229432) — appealed to the United States Court of Appeals for the Federal Circuit, Case No. 22-1460, filed 10 February 2022. The patent-in-suit covers a device, system and method for an integrated circuit adaptable for use in computing systems of differing memory requirements. The defendant in the underlying proceeding was Advanced Micro Devices, Inc., a leading semiconductor manufacturer.
The Federal Circuit issued a per curiam affirmance on 5 October 2023 under Federal Circuit Rule 36, affirming the unpatentability of the asserted patent. The recorded Basis of Termination is 'Unpatentable'; the docket order states 'AFFIRMED. See Fed. Cir. R. 36.' A Rule 36 judgment is a summary affirmance without a written opinion, signalling the appellate panel found no reversible error warranting further elaboration.
The 602-day duration is consistent with standard Federal Circuit appellate timelines for patentability appeals. Because the affirmance was entered under Rule 36 without a written opinion, the specific reasoning of the panel — and any arguments Monterey Research advanced — are not disclosed in the public record. The absence of a written opinion limits the precedential value of this ruling but leaves the unpatentability finding fully in force.
See Complete Case & Patent Analysis →Filing to Unpatentable in 602 days
602 days from filing to Federal Circuit disposition
US6961807 — Integrated circuit adaptable for differing memory requirements


US6961807 has been found unpatentable and the finding affirmed by the Federal Circuit, removing it as a direct enforcement risk. However, semiconductor designers, memory system integrators, and computing platform developers working on adaptable IC architectures should assess whether Monterey Research holds related patents in the same family or technology domain that remain in force and could cover similar product functionality.
Official order — verbatim text
The Federal Circuit's per curiam order — 'AFFIRMED. See Fed. Cir. R. 36.' — is the court's most summary form of disposition, entered without written reasoning. It confirms the panel unanimously found no reversible error in the unpatentability determination below. For Monterey Research, the absence of a reasoned opinion forecloses the ability to identify specific grounds for further challenge; for AMD, it delivers an unambiguous and final resolution.
Federal Circuit affirms: what the ruling means for both parties
What a Federal Circuit Rule 36 affirmance means
A Rule 36 judgment is a one-line per curiam affirmance issued without a written opinion. It signals the panel found no reversible error in the decision below but does not elaborate on reasoning. The lower tribunal's unpatentability determination is fully upheld and binding. Because no opinion is written, the ruling carries no precedential weight for future cases, but is conclusive between the parties.
No reversible error foundMonterey Research's patent claim extinguished at appellate level
The affirmance of unpatentability means US6961807 cannot be enforced. Monterey Research's appellate challenge failed, and the patent's claims remain invalid as determined in the underlying proceeding. Further challenge options at this level are exhausted. Any petition for rehearing or certiorari to the Supreme Court would require additional procedural steps not reflected in this record.
Enforcement rights lostAMD secures full protection from US6961807 infringement claims
Advanced Micro Devices emerges from this appeal with the unpatentability finding confirmed. AMD's products and architectures that were the subject of the underlying validity dispute face no further exposure from US6961807. The Rule 36 affirmance provides AMD with a clean, final resolution without the complexity of a reasoned opinion that could be parsed or distinguished in future proceedings.
Validity challenge succeededAdaptive memory IC patent space: enforcement risk reduced
The invalidation of US6961807 removes one assertion vector in the integrated circuit and adaptive memory architecture space. Semiconductor companies and memory system designers facing similar claims from this patent family or related assertion entities should note that the Federal Circuit declined to disturb the unpatentability finding. The absence of a written opinion, however, limits the ability to cite this ruling as persuasive authority in analogous disputes.
IC patent enforcement weakenedFull party and counsel information
| Role | Name | Type | Detail |
|---|---|---|---|
| Plaintiff | Monterey Research, LLC | Company | /Search in Eureka ↗ |
| Defendant | Advanced Micro Devices, Inc. | Company | /Search in Eureka ↗ |
| Plaintiff counsel | Donald Lee Jackson | Attorney | Counsel for Monterey Research, LLCSearch in Eureka ↗ |
| Plaintiff law firm | Davidson, Berquist, Jackson & Gowdey, LLP | Law Firm | Representing Monterey Research, LLCSearch in Eureka ↗ |
| Presiding judge | Judge N/A | Judge | Court of Appeals for the Federal CircuitSearch in Eureka ↗ |
R&D signals in the adaptive integrated circuit and memory architecture space
Forward-looking patent and R&D intelligence derived from Monterey Research v. AMD, covering portfolio activity, technology filing trends, and white-space opportunities in adaptive memory IC design.
Monterey Research's active semiconductor patent holdings
Monterey Research is a patent assertion entity with holdings across semiconductor and memory architecture domains. Despite the invalidation of US6961807, its broader portfolio may include related patents covering adaptive IC design, memory interface protocols, or controller architectures. Tracking Monterey Research's active and pending applications is essential for any semiconductor firm assessing forward-looking assertion risk.
Portfolio assertion riskFiling trends in adaptable memory interface IC design
The technology space around integrated circuits adaptable for differing memory requirements is seeing sustained filing activity, driven by heterogeneous computing, HBM adoption, and LPDDR evolution. Understanding the density and assignee distribution of filings in this area helps semiconductor R&D teams anticipate freedom-to-operate constraints and identify where innovation is concentrating.
Active filing domainAMD's patent posture in memory architecture and IC design
Advanced Micro Devices maintains an extensive patent portfolio in semiconductor architecture, including memory subsystems, chiplet design, and heterogeneous integration. AMD's successful defense in this validity challenge is consistent with a broader strategy of contesting weak third-party patents while building defensive depth in core memory and processor architecture domains.
Strong defensive portfolioPost-invalidation white space in adaptive IC memory claim territory
The invalidation of US6961807 clears specific claim territory around circuits adaptable to differing memory requirements. For R&D teams working on configurable memory controllers, multi-standard memory interfaces, or platform-agnostic IC architectures, this white space — combined with evolving standards in HBM3, LPDDR5X, and CXL memory — may present differentiated filing opportunities.
Filing opportunity identifiedSimilar Federal Circuit patent validity appeals in the semiconductor space
Explore Federal Circuit appeals involving semiconductor and integrated circuit patent validity challenges, including Rule 36 affirmances and unpatentability determinations in memory architecture disputes.
Related patent case — similar technology
Comparable case in the same technology domain. Patent holder and defendant reached resolution after proceedings.
SettledRelated infringement action — same court
Comparable Device, system and method for an integrated circuit adaptable for use in computing systems of differing memory requirements-adjacent infringement action. Patent enforcement dynamics analysed in depth.
Active · District CourtRelated invalidity challenge — appellate outcome
Combined invalidity and infringement action in the same technology space. Decided after substantive proceedings.
DecidedMonterey Research, LLC's broader IP enforcement history
Monterey Research, LLC's full litigation history covering prior enforcement, licensing activity, and inter partes review proceedings.
Portfolio viewWhat this case signals for the semiconductor IP landscape
A Rule 36 affirmance of unpatentability sends a clear signal about the viability of adaptive memory IC claims before the Federal Circuit.
Rule 36 affirmances signal weak appellate records for patent holders
When the Federal Circuit issues a Rule 36 judgment, it typically signals the panel found the appeal insufficiently meritorious to warrant a written opinion. Patent holders appealing unpatentability findings in the integrated circuit space should assess the strength of their claim construction and prior art arguments before investing in Federal Circuit appeals.
AMD's IPR or inter partes strategy proves effective against memory IC assertions
The underlying invalidity or cancellation action that produced the unpatentability finding — affirmed here — demonstrates that AMD's defensive IP strategy in the memory architecture domain was effective. Competitors facing similar assertion campaigns may consider analogous validity challenges as a primary defensive tool.
Monterey Research's portfolio: residual assertion risk for semiconductor firms
Monterey Research is an active patent assertion entity in the semiconductor space. Despite losing US6961807, its broader portfolio may contain related memory architecture patents still in force. Semiconductor designers and system integrators should conduct a portfolio-level review of Monterey Research's remaining assets to assess forward-looking exposure.
Adaptive memory IC white space: filing opportunities post-invalidation
With US6961807 invalidated, the specific claim space around integrated circuits adaptable for differing memory requirements may represent a filing opportunity for semiconductor R&D teams. Companies active in heterogeneous memory architecture — including HBM, LPDDR, and configurable memory controller design — should map this white space against their current filing strategies.
Monterey v Advanced — key questions answered
The Federal Circuit affirmed the unpatentability of US6961807 in a per curiam Rule 36 judgment issued on 5 October 2023. The recorded Basis of Termination is 'Unpatentable.' No written opinion was issued, meaning the panel found no reversible error but did not elaborate on its reasoning.
A Rule 36 affirmance is a summary, one-line judgment affirming the decision below without a written opinion. For Monterey Research, it means US6961807 is definitively unpatentable and unenforceable. For AMD, it confirms the invalidity finding without creating written precedent that could be used in other proceedings.
US6961807 (application no. US10/229432) covers a device, system and method for an integrated circuit adaptable for use in computing systems of differing memory requirements. It relates to semiconductor IC architectures designed to function across platforms with varying memory configurations.
Yes. The Federal Circuit's affirmance confirms a prior unpatentability determination from the underlying invalidity or cancellation action. The appeal (filed 10 February 2022, closed 5 October 2023) was Monterey Research's challenge to that finding. The specific forum and grounds of the underlying proceeding are not further detailed in the available public record.
No. Federal Circuit Rule 36 judgments are non-precedential. While the ruling is final and binding between the parties — extinguishing US6961807 — it cannot be cited as binding or persuasive authority in other cases. Its precedential limitation is a key consideration for parties seeking to rely on this outcome in analogous patent disputes.
Monitor adaptive memory IC patent risk across your product portfolio
With US6961807 invalidated, the surrounding patent landscape remains active. Use PatSnap Eureka to run FTO searches, track Monterey Research's surviving assets, and monitor Federal Circuit developments in the semiconductor patent space.
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