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Monterey Research v. AMD & Qualcomm — Memory Burst Patent Appeal | PatSnap
Patent Litigation

Monterey Research v. AMD: Federal Circuit Affirms Memory Burst Patent Unpatentable

Monterey Research LLC's US6651134B1 — covering a memory device with fixed-length non-interruptible burst functionality — was found unpatentable on appeal. The Federal Circuit affirmed the ruling against three major semiconductor defendants: AMD, STMicroelectronics, and Qualcomm. The case ran 621 days from filing to close.

Resolution time
621days
621 days from filing to Federal Circuit decision — consistent with standard appellate timelines
Patents asserted
1
US6651134B1 — memory device with fixed-length non-interruptible burst
Outcome
Unpatentable
Federal Circuit affirmed unpatentability; lower tribunal's invalidity determination stands
Cost ruling
Patentability
Verdict cause: invalidity/cancellation action on memory device patent claims
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Federal Circuit closes the door on Monterey's memory burst patent

Monterey Research LLC filed Federal Circuit appeal No. 22-1435 on 2 February 2022, challenging an invalidity determination on US6651134B1, a patent covering a memory device with fixed-length non-interruptible burst architecture. The defendants — Advanced Micro Devices, STMicroelectronics, and Qualcomm — are each major players in the semiconductor and system-on-chip markets where memory interface technology is commercially significant.

The Federal Circuit affirmed the lower tribunal's unpatentability finding. The recorded basis of termination is 'Unpatentable,' and the verdict is styled as 'AFFIRMED,' meaning the appellate court found no reversible error in the decision below. The specific claim-by-claim reasoning and any fee or cost rulings are not disclosed in the available record.

The case closed on 16 October 2023 after 621 days — a duration consistent with Federal Circuit briefing and argument schedules. An affirmance at this level raises the bar significantly for any future attempt to enforce or rehabilitate US6651134B1. The strategic context for Monterey Research, a patent assertion entity, is that this affirmance eliminates a key asset against three of the semiconductor industry's most prominent chip designers. What drove the underlying invalidity finding, and whether other Monterey patents in this technology family remain active, is not disclosed in the available record.

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Case at a glance
Case no.22-1435
CourtCourt of Appeals for the Federal Circuit
JudgeN/A
FiledFebruary 2, 2022
ClosedOctober 16, 2023
Duration621 days
OutcomeUnpatentable
Verdict causePatentability
BasisUnpatentable
Prior Art Intelligence
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Case timeline

Filing to Unpatentable in 621 days

621 days from filing to Federal Circuit decision — consistent with standard appellate timelines

Case timeline: Appeal filed FEB 2 2022 — 621 days total Horizontal timeline showing the three key events in Monterey Research, LLC v Advanced Micro Devices, Inc. from filing to resolution. Source: PACER, Court of Appeals for the Federal Circuit. FEB 2 2022 Appeal filed Pre-trial proceedings OCT 16 2023 Unpatentable 621 DAYS TOTAL
Patent at issue

US6651134B1 — Memory device with fixed-length non-interruptible burst

Publication No.US6651134B1
Application No.US09/504344
Patent details
ProductMemory device with fixed-length non-interruptible burst access
Cited in actionFebruary 2, 2022
Technical brief · sourced from PatSnap patent database
Patent figurePatent figure
Representative claim (1 of 3 independent)
What is claimed is: 1. A circuit comprising: a memory comprising a plurality of storage elements each configured to read and write data in response to an internal address signal; and a logic circuit configured to generate a predetermined number of said internal address signals in response to (i) an external address signal, (ii) a clock signal and (iii) one or more control signals, wherein said generation of said predetermined number of internal address signals is non-interruptible. 2. The circuit according to claim 1, wherein said predetermined number of internal address signals is determined by a fixed burst len…
Technical background
The present invention relates to memory devices generally and, more particularly, to a memory device that transfers a fixed number of words of data with each access. A synchronous Static Random Access Memory (SRAM) can provide data from multiple address locations using a single address. Accessing multiple locations in response to a single address is called a burst mode access. A memory device that provides a burst mode can reduce activity on the address and control buses. The burst mode of a conventional synchronou…
Patent family
1 family member across 1 jurisdiction (US)
PatSnap Eureka · FTO Search Agent
Should you run an FTO against US6651134B1 in burst memory products?

US6651134B1 has been affirmed as unpatentable by the Federal Circuit, which means it is no longer an enforceable risk for products implementing fixed-length non-interruptible burst memory access. However, R&D teams developing memory controllers, DRAM interfaces, or SoC memory subsystems should not rely solely on this outcome: related family members, continuation applications, and sibling patents in Monterey Research's portfolio may cover overlapping claim territory and have not been adjudicated in this proceeding.

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Official verdict

Official order — verbatim text

AFFIRMED
Source: PACER Docket, Case 22-1435, Court of Appeals for the Federal Circuit

The Federal Circuit's single-word verdict — 'AFFIRMED' — confirms that the unpatentability determination made by the lower tribunal survived appellate scrutiny. The recorded basis of termination, 'Unpatentable,' is consistent with a post-grant validity proceeding outcome. The scope of the affirmance, the specific claims cancelled, and any dissenting reasoning are not disclosed in the available record.

PACER case 22-1435 · Public docket record Explore in Eureka ↗
Court ruling

Federal Circuit affirms: what the ruling means for both parties

Legal mechanism

Affirmance means the lower decision stands without reversible error

When the Federal Circuit issues an 'AFFIRMED' verdict, it signals that the appellate panel found no reversible error in the lower tribunal's unpatentability determination. The standard of review applied — whether de novo for claim construction or substantial evidence for fact findings — shapes how difficult affirmance is to overcome. Here, the unpatentability finding on US6651134B1 is now final at this appellate level.

No reversible error found
Patent holder outcome

Monterey Research loses enforceability of its memory burst patent

The affirmance of unpatentability extinguishes Monterey Research's ability to assert US6651134B1 against AMD, STMicroelectronics, Qualcomm, or any other party. A patent found unpatentable through a validity proceeding and affirmed on appeal cannot be revived through further district court assertion. This represents a terminal outcome for this specific patent asset in Monterey's portfolio.

Patent asset eliminated
Challenger outcome

AMD, STMicro & Qualcomm secure cleared IP runway on burst memory

The three defendant-appellees — AMD, STMicroelectronics, and Qualcomm — benefit from an affirmed unpatentability ruling, meaning US6651134B1 can no longer be wielded against their memory interface implementations. The Federal Circuit affirmance closes off Monterey's appellate options at this level, providing commercial certainty for products that may have implicated the patent's fixed-length non-interruptible burst claims.

Defendants' position secured
Commercial implications

Semiconductor memory IP landscape: one assertable patent removed

This affirmance reduces the pool of assertable memory-architecture patents by one well-contested asset. For chip designers working on memory controllers, DRAM interfaces, and SoC memory subsystems, the ruling provides freedom-to-operate clarity with respect to US6651134B1. However, patent assertion entities in the memory space continue to hold adjacent portfolio assets, and practitioners should monitor related family members and continuation filings.

FTO clarity on burst memory claims
Legal analysis based on PACER docket records for case 22-1435 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffMonterey Research, LLCCompany/Search in Eureka ↗
DefendantAdvanced Micro Devices, Inc.Company/Search in Eureka ↗
Co-DefendantSTMicroelectronics, Inc.CompanySearch in Eureka ↗
Co-DefendantQualcomm IncorporatedIndividualSearch in Eureka ↗
Plaintiff counselKayvan B. NorooziAttorneyCounsel for Monterey Research, LLCSearch in Eureka ↗
Plaintiff law firmNoroozi PCLaw FirmRepresenting Monterey Research, LLCSearch in Eureka ↗
Presiding judgeJudge N/AJudgeCourt of Appeals for the Federal CircuitSearch in Eureka ↗
R&D signals

R&D signals in burst memory and semiconductor IP

Forward-looking patent and innovation intelligence derived from the Monterey Research v. AMD dispute — mapping portfolio activity, filing trends, and whitespace in memory architecture.

Patent portfolio

Monterey Research's semiconductor patent portfolio beyond US6651134B1

Monterey Research holds patents across multiple semiconductor technology domains. With US6651134B1 now affirmed unpatentable, understanding which other Monterey assets cover memory access, bus architecture, or controller logic — and their current status — is strategically valuable for any company in the memory or SoC supply chain.

Portfolio mapping
Technology landscape

Filing trends in non-interruptible burst and memory access architecture

Fixed-length burst and non-interruptible memory access remains an active area of innovation, particularly as LPDDR, HBM, and embedded SRAM architectures evolve for AI accelerators and mobile SoCs. Patent filing activity in this space by established chip designers and emerging players can reveal competitive positioning and potential infringement corridors.

Memory architecture trends
Defendant IP posture

AMD, STMicro & Qualcomm memory interface patent activity

AMD, STMicroelectronics, and Qualcomm each maintain substantial memory interface and controller patent portfolios. Examining their filing activity in burst-mode memory, memory scheduling, and low-power DRAM access reveals how they are building defensive IP and where competitive whitespace may exist for new entrants.

Competitor IP filing
Whitespace opportunity

Adjacent whitespace: memory access scheduling for AI and edge SoCs

With burst memory access patents being contested and invalidated, adjacent claim spaces — such as adaptive burst length scheduling, memory controller arbitration for heterogeneous SoCs, and AI workload-aware DRAM access — may represent lower-litigation-risk innovation corridors. Companies filing now in these adjacent areas can establish prior art and defensive positioning.

Whitespace R&D signal
Related litigation

Similar Federal Circuit patent validity appeals in semiconductor memory

Cases before the Federal Circuit involving memory device patent validity challenges, post-grant proceedings, and PAE assertions against semiconductor manufacturers like AMD and Qualcomm.

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Monterey Research, LLC patent enforcement history, Court of Appeals for the Federal Circuit case history, Monterey Research, LLC's full IP portfolio, and comparable case analysis
PAE vs. AMD memory casesBurst memory patent invalidityFederal Circuit affirmed unpatentableQualcomm memory IP disputes
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Strategic implications

What this case signals for the semiconductor memory IP landscape

An affirmed unpatentability finding at the Federal Circuit carries sector-wide weight — here is what it means for memory IP strategy.

Affirmance by the Federal Circuit is a high bar — and Monterey failed it

Federal Circuit affirmances of unpatentability are treated as authoritative across all district courts. Any company that was monitoring this case as a potential exposure should update its FTO assessments to reflect that US6651134B1 is no longer a live threat. The ruling is immediately actionable for in-house IP teams holding litigation reserves related to this patent.

Patent assertion entities in memory architecture remain active — monitor adjacents

The removal of US6651134B1 from Monterey's enforceable arsenal does not eliminate risk from related continuations, divisionals, or sibling patents covering similar burst-mode memory technology. R&D and IP teams building memory controllers or SoC memory subsystems should run landscape searches across Monterey's broader portfolio and similar PAE holdings in this domain.

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Full strategic analysis in PatSnap Eureka
Unlock deeper semiconductor memory IP signals from this Federal Circuit patent validity appeal — portfolio mapping, filing trends, and FTO corridors.
Monterey portfolio survivorsBurst memory patent whitespaceAMD/Qualcomm memory IP filing trends
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Frequently asked questions

Monterey v Advanced — key questions answered

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Track semiconductor memory patent risk before it reaches the Federal Circuit

Use PatSnap Eureka to monitor patent assertion activity in burst memory architecture, identify live family members of invalidated patents, and run FTO searches across your SoC and memory controller product lines before filing or launch.

Disclaimer

This page is compiled from public court dockets and third-party patent and litigation data via PatSnap Eureka, and is provided for general informational purposes only. The information shown — including party names, patent and application numbers, dates, case status, outcomes, and any analysis — may be incomplete, may not reflect the most recent filings or legal status, and may contain errors or omissions. Verify all details against official court records (for example, PACER) and the relevant patent office before relying on them.

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