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Sentient Sensors v. Xilinx | Patent Infringement — Zynq SoC | PatSnap
Patent Litigation

Sentient Sensors v. Xilinx: Dismissed With Prejudice After 1,528 Days

Sentient Sensors, LLC filed suit against Xilinx Incorporated in the District of Delaware in February 2022, asserting US patent 6,938,177 against the Zynq 7000, Zynq UltraScale+, Kria, and Versal SoC product families. The action ran for 1,528 days before the parties jointly stipulated to dismissal with prejudice under Rule 41(a)(1)(A)(ii).

Resolution time
1528days
1,528 days — over four years from filing to dismissal in D. Del.
Patents asserted
1
US6938177B1 — Zynq SoC and programmable logic products
Outcome
Dismissed with Prejudice
Stipulated dismissal with prejudice; each party bears its own costs and fees.
Cost ruling
Own Costs
Each party bears its own costs, disbursements, and attorneys' fees per stipulation.
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Zynq SoC Patent Dispute Ends in Stipulated Dismissal With Prejudice

Sentient Sensors, LLC commenced this infringement action on 8 February 2022 in the United States District Court for the District of Delaware before Judge Maryellen Noreika. The complaint asserted US Patent No. 6,938,177 against Xilinx Incorporated's Zynq 7000 SoC (ZC702, ZC704, ZC706), Zynq UltraScale+ (ZCU102, ZCU104, ZCU106), Zynq-based Kria products, Versal products, and associated development kits — a broad sweep of Xilinx's flagship programmable SoC and adaptive compute platforms.

The case closed on 16 April 2026 when the parties filed a joint Rule 41(a)(1)(A)(ii) stipulation of dismissal with prejudice. The recorded basis of termination is Dismissed with Prejudice; the docket order states that each party shall bear its own costs, disbursements, and attorneys' fees. Dismissal with prejudice is a final adjudication on the merits as a matter of law, meaning Sentient Sensors cannot reassert the same claims under US6938177B1 against Xilinx in a future action.

The case ran for over four years — a duration that suggests substantive litigation activity before resolution. The parties' decision to bear their own costs removes any fee-shifting signal that might indicate who held the stronger position at the point of resolution. The specific terms underlying the parties' agreement to stipulate dismissal are not disclosed in the available public record.

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Case at a glance
CourtDelaware District Court
JudgeMaryellen Noreika
FiledFebruary 8, 2022
ClosedApril 16, 2026
Duration1528 days
OutcomeDismissed with Prejudice
Verdict causeInfringement Action
BasisDismissed with Prejudice
Prior Art Intelligence
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Case timeline

Filing to Dismissed with Prejudice in 1528 days

1,528 days — over four years from filing to dismissal in D. Del.

Case timeline: Complaint filed FEB 8 2022 — 1528 days total Horizontal timeline showing the three key events in Sentient Sensors, LLC v Xilinx Incorporated from filing to resolution. Source: PACER, Delaware District Court. FEB 8 2022 Complaint filed Pre-trial proceedings APR 16 2026 Dismissed with Prejudice 1528 DAYS TOTAL
Patent at issue

US6938177B1 — programmable SoC control and logic technology

Publication No.US6938177B1
Application No.US10/028556
Patent details
Productprogrammable system-on-chip control and logic architecture
Cited in actionFebruary 8, 2022
Technical brief · sourced from PatSnap patent database
Patent figurePatent figure
Representative claim (1 of 6 independent)
1. An instrument controller comprising: a non-volatile memory storage component for program and data storage; a large volatile memory storage component for additional program and data storage; a processor coupled to both the non-volatile memory storage component and the large volatile memory storage components, the processor capable of high-frequency and low-frequency operations and having an embedded memory for storing an initialization program that enables the processor to start up processing without first retrieving a program from the non-volatile memory; at least two internal oscillators coupled to the proces…
Technical background
STATEMENT OF GOVERNMENT INTEREST The terms and conditions of the Cooperative Research and Development Agreement under which tis invention was created entitle the Government of the United States to a non-exclusive royalty free right to practice and use the invention which is the subject of this patent FIELD OF THE INVENTION The present invention generally relates to multi-hip modules (MCM). More specifically, the present invention relates to an MCM capable of running multiple is processes and having non-volatile sto…
Patent family
1 family member across 1 jurisdiction (US)
PatSnap Eureka · FTO Search Agent
Should you run an FTO analysis against US6938177B1?

Any organisation developing, commercialising, or integrating products in the programmable SoC, FPGA, or adaptive compute domain — particularly architectures resembling Xilinx's Zynq or Versal families — should assess exposure to US6938177B1. The dismissal here is party-specific to Xilinx; the patent holder retains full enforcement rights against all other parties. Development kit makers and IP licensors building on Zynq-compatible cores face equivalent risk.

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Official verdict

Official order — verbatim text

Pursuant to Federal Rule of Civil Procedure 41(a)(1)(A)(ii), Plaintiff Sentient Sensors, LLC (“Plaintiff”) and Defendant Xilinx Incorporated (“Defendant”), hereby stipulate and agree that this action is dismissed with prejudice. The parties shall bear their own costs, disbursements and attorneys’ fees.
Source: PACER Docket, Case 1:22-cv-00173, Delaware District Court

The stipulation is framed as a bilateral Rule 41(a)(1)(A)(ii) agreement, requiring consent from all appearing parties and producing an immediately effective dismissal without a separate court order. The with-prejudice designation makes the dismissal a final disposition on the merits as to Xilinx, and the mutual cost-bearing clause means no fee-shifting was sought or awarded. The underlying reasons driving the parties to this resolution after more than four years of litigation are not stated in the available public record.

PACER case 1:22-cv-00173 · Public docket record Explore in Eureka ↗
Dismissal terms

Dismissed with prejudice: what the stipulated resolution means for both parties

Legal mechanism

Rule 41(a)(1)(A)(ii) stipulated dismissal with prejudice

A Rule 41(a)(1)(A)(ii) dismissal requires the signatures of all parties who have appeared. When filed with prejudice, it operates as a final judgment on the merits — the court retains no further jurisdiction over the dismissed claims. Sentient Sensors cannot re-file suit against Xilinx asserting the same patent claims that were before the court.

Final, merits-barring dismissal
Patent holder outcome

Sentient Sensors loses the right to re-assert US6938177B1 against Xilinx

The with-prejudice designation extinguishes Sentient Sensors' ability to bring the same infringement claims against Xilinx in any subsequent proceeding. While the patent itself remains in force against third parties, the res judicata effect of the dismissal forecloses this specific defendant. Whether any consideration passed between the parties is not disclosed in the available public record.

Claim barred against Xilinx
Defendant outcome

Xilinx's Zynq and Versal product lines cleared of this specific claim

Xilinx (now part of AMD) obtains finality with respect to Sentient Sensors' assertions under US6938177B1 across the named Zynq 7000, UltraScale+, Kria, and Versal product families. The parties bear their own costs, so no fee-shifting award is recorded. The merits of the infringement or validity dispute were not adjudicated on the public record.

Products cleared from this action
Commercial implications

US6938177B1 remains a live risk for other SoC and FPGA vendors

The dismissal is party-specific: US6938177B1 retains its presumption of validity and is enforceable against any third party not covered by this proceeding. FPGA, SoC, and adaptive compute vendors operating in adjacent spaces to Xilinx's Zynq and Versal architectures should treat the patent as an active portfolio asset. No invalidity finding or claim construction ruling entered on the public record to narrow the patent's reach.

Patent still enforceable vs. third parties
Legal analysis based on PACER docket records for case 1:22-cv-00173 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffSentient Sensors, LLCCompany/Search in Eureka ↗
DefendantXilinx IncorporatedIndividual/Search in Eureka ↗
Plaintiff counselAndrew J. CochranAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselBrian E. FarnanAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselGerald J. Flattmann , Jr.AttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselJohn C. StellabotteAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselMichael E. ShanahanAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselMichael J. FarnanAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff counselScott H. KalikoAttorneyCounsel for Sentient Sensors, LLCSearch in Eureka ↗
Plaintiff law firmFarnan LLPLaw FirmRepresenting Sentient Sensors, LLCSearch in Eureka ↗
Defendant counselAaron R. FahrenkrogAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselAlexandra M. EwingAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselDaniel H. WadeAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselDavid M. HoffmanAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselEmily J. TremblayAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselFrederick L. Cottrell , IIIAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselJeffrey A. ShneidmanAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselMary PhengAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselWarren K. Mabey , Jr.AttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant counselWilliam R JonesAttorneyCounsel for Xilinx IncorporatedSearch in Eureka ↗
Defendant law firmFish & Richardson PCLaw FirmRepresenting Xilinx IncorporatedSearch in Eureka ↗
Defendant law firmRichards, Layton & Finger, PALaw FirmRepresenting Xilinx IncorporatedSearch in Eureka ↗
Presiding judgeJudge Maryellen NoreikaJudgeDelaware District CourtSearch in Eureka ↗
R&D signals

R&D signals in the programmable SoC and FPGA IP space

Forward-looking patent and R&D intelligence derived from the Sentient Sensors v. Xilinx dispute and the broader programmable SoC landscape.

Patent portfolio

Sentient Sensors' programmable logic patent footprint

Sentient Sensors asserted US6938177B1 across virtually all of Xilinx's Zynq and Versal SoC generations. Monitoring Sentient Sensors' full portfolio — including any continuations, divisionals, or related applications — can reveal whether additional claims cover next-generation SoC and adaptive compute architectures beyond those named in this action.

Portfolio watch: Sentient Sensors
Technology landscape

Filing trends in SoC control and programmable logic patents

The assertion of a B1-grant patent filed in the early 2000s against current-generation Zynq UltraScale+ and Versal products suggests that foundational SoC control claims can age well technically. Tracking recent filing activity in programmable logic, SoC control fabric, and FPGA interconnect domains can surface emerging blocking IP before it reaches assertion.

Emerging SoC control IP
Competitor IP posture

Xilinx (AMD) defensive IP in adaptive compute and Zynq architecture

Xilinx's engagement of Fish & Richardson for this four-year dispute reflects a substantive defensive strategy for its Zynq and Versal families. Examining Xilinx and AMD's own patent portfolio in adaptive SoC, programmable logic, and heterogeneous compute provides intelligence on where they have built defensive depth — and where competitor products may face cross-assertion risk.

AMD/Xilinx defensive portfolio
White space opportunity

Adjacent innovation opportunities near US6938177B1 claim scope

The gap between a 2000s-era SoC control patent and today's AI-optimised adaptive compute platforms (Versal AI Core, Kria AI Module) may contain filing white space. R&D teams exploring novel SoC control fabric architectures, heterogeneous processor integration, or AI-acceleration overlays on programmable logic may find opportunity to stake claims beyond the '177 patent's original scope.

SoC AI acceleration white space
Related litigation

Similar FPGA and SoC patent infringement cases in D. Del.

Cases asserting programmable logic and SoC patents against FPGA vendors in the District of Delaware, where Xilinx and AMD-related litigation frequently concentrates.

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Sentient Sensors, LLC patent enforcement history, Delaware District Court case history, Sentient Sensors, LLC's full IP portfolio, and comparable case analysis
Related SoC patent actionsSentient Sensors prior filingsD. Del. FPGA case outcomesXilinx IP litigation history
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Strategic implications

What this case signals for the programmable SoC and FPGA IP landscape

A four-year dispute targeting Xilinx's flagship SoC families underscores the assertion risk surrounding legacy semiconductor patents in adaptive compute.

Zynq and Versal product families attracted concentrated infringement risk

The complaint named virtually the entire Zynq portfolio — ZC702, ZC704, ZC706, ZCU102, ZCU104, ZCU106, Kria, and Versal — alongside associated development kits. Vendors building products on or competing with Xilinx SoC architecture should audit US6938177B1 claim scope against their own implementations before go-to-market.

Own-costs provision limits inference about the resolution's terms

Mutual cost-bearing is a common feature of negotiated dispositions and signals neither a clear plaintiff win nor a clear defendant win. IP teams tracking this case as a valuation or licensing benchmark should note that no public financial terms, royalty rates, or licensing commitments are disclosed in the available record.

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Claim construction signalsRelated Sentient Sensors patentsParallel USPTO proceedings
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Frequently asked questions

Sentient v Xilinx — key questions answered

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Map your SoC and FPGA exposure against US6938177B1

PatSnap Eureka can run a targeted FTO analysis against US6938177B1 for your Zynq-adjacent or adaptive compute products, and monitor Sentient Sensors' portfolio for follow-on assertion risk. Stay ahead of programmable SoC IP enforcement.

Disclaimer

This page is compiled from public court dockets and third-party patent and litigation data via PatSnap Eureka, and is provided for general informational purposes only. The information shown — including party names, patent and application numbers, dates, case status, outcomes, and any analysis — may be incomplete, may not reflect the most recent filings or legal status, and may contain errors or omissions. Verify all details against official court records (for example, PACER) and the relevant patent office before relying on them.

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