Book a demo

Cut patent&paper research from weeks to hours with PatSnap Eureka AI!

Try now
Synopsys v. Avatar Integrated & Siemens: EDA Patent Dismissal | PatSnap
Explore in Eureka
Case ID3:20-cv-04151
FiledJun 2020
ClosedJun 2024
Patent Litigation

Synopsys v. Avatar Integrated & Siemens: EDA Patent Dispute Dismissed With Prejudice

Synopsys, Inc. asserted three U.S. patents covering its IC Compiler and PrimeTime electronic design automation tools against Avatar Integrated Systems and Siemens Industry Software in California’s Northern District. After nearly four years of litigation, the parties jointly stipulated to dismiss the action with prejudice — each side bearing its own fees and costs.

Resolution time
1448days
1,448 days — nearly four years from filing to dismissal in N.D. Cal.
Patents asserted
3
US8407655B2, US7853915B2 and US8234614B1 — three EDA tool patents asserted
Outcome
Dismissed with Prejudice
Stipulated dismissal with prejudice; Synopsys cannot re-file these claims.
Cost ruling
Each Party Bears Own Costs
No fee-shifting awarded; both sides absorb their own litigation expenses.
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Four-Year EDA Patent Battle Ends in Bilateral Dismissal

Synopsys, Inc. — a leading electronic design automation (EDA) software developer — filed suit on June 23, 2020 in the U.S. District Court for the Northern District of California against Avatar Integrated Systems, Inc. and Siemens Industry Software, Inc. Synopsys asserted three issued patents (US8407655B2, US7853915B2, and US8234614B1) covering technology embodied in its flagship IC Compiler and PrimeTime EDA tools, alleging infringement by the defendants.

On June 10, 2024 — 1,448 days after filing — the case ended via a Fed. R. Civ. P. 41(a)(1)(A)(ii) stipulated dismissal with prejudice. Critically, the parties agreed that each side bears its own attorneys’ fees and costs. A dismissal with prejudice is a final adjudication on the merits: Synopsys is permanently barred from reasserting these specific claims against these defendants. The bilateral cost-bearing arrangement suggests neither side extracted a clear financial concession from the other.

Nearly four years is a substantial investment for a case to resolve without a public merits determination, suggesting the parties likely reached a private commercial arrangement — though the public record is silent on any settlement terms. The involvement of Siemens Industry Software as a co-defendant alongside Avatar is strategically significant: Siemens is a direct EDA competitor to Synopsys, and its presence likely elevated the litigation’s complexity and stakes. What drove the ultimate resolution — licensing, cross-licensing, or simply a mutual decision to end hostilities — remains undisclosed.

Case at a glance
Case no.3:20-cv-04151
CourtCalifornia Northern
JudgeN/A
FiledJune 23, 2020
ClosedJune 10, 2024
Duration1448 days
OutcomeDismissed with Prejudice
Verdict causeInfringement Action
BasisDismissed with Prejudice
Prior Art Intelligence
See what prior art exists on this patent.
Eureka scans millions of patents and papers to surface prior art that may have invalidated these claims before costly litigation begins.
Check Prior Art
Case data sourced from PACER / California Northern District Court via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to Dismissed with Prejudice in 1448 days

1,448 days — nearly four years from filing to dismissal in N.D. Cal.

Case timeline: Complaint filed JUN 23 2020, JUN–JUL — 1448 days total Horizontal timeline showing the three key events in Synopsys, Inc. v Avatar Integrated Systems, Inc. from filing to resolution. Source: PACER, California Northern District Court. JUN 23 2020 Complaint filed Pre-trial proceedings JUN 10 2024 Dismissed with Prejudice 1448 DAYS TOTAL
Dismissal terms

Dismissed with prejudice: what the stipulated exit means for both parties

Legal mechanism

Rule 41(a)(1)(A)(ii): stipulated dismissal with prejudice explained

A Fed. R. Civ. P. 41(a)(1)(A)(ii) dismissal is a joint stipulation signed by all parties — no court order required. The ‘with prejudice’ designation makes it a final adjudication: the same claims cannot be re-filed against the same defendants. This is the cleanest possible exit, giving defendants permanent protection from re-litigation of these specific patent claims.

Permanent bar on re-filing
Patent holder outcome

Synopsys permanently surrenders these claims against these defendants

By agreeing to dismissal with prejudice, Synopsys loses the right to reassert US8407655B2, US7853915B2, and US8234614B1 against Avatar and Siemens in future litigation. The patents themselves remain valid and enforceable against third parties. The bilateral cost arrangement means Synopsys recovers nothing publicly — any value exchanged, if any, would be in an undisclosed side agreement.

Claims extinguished vs. these defendants
Defendant outcome

Avatar and Siemens secured permanent immunity on these three patents

For Avatar Integrated Systems and Siemens Industry Software, the with-prejudice dismissal delivers full legal closure on the asserted claims. Neither defendant faces residual exposure from this action. The mutual cost-bearing term suggests defendants avoided any damages or royalty payment in the public record. Siemens — a market-level competitor to Synopsys — in particular benefits from removing litigation uncertainty.

Full closure, no public damages
Commercial implications

EDA competitive dynamics: strategic settlement signals sector tension

The four-year duration and the involvement of Siemens Industry Software — a direct EDA rival to Synopsys — suggest this was more than a routine infringement suit. Cases involving IC Compiler and PrimeTime touch core EDA workflows. The quiet resolution is consistent with a cross-licensing or commercial arrangement that both sides preferred to keep confidential. EDA players should monitor whether Synopsys pursues related patents against other competitors.

EDA competitive IP tension
Legal analysis based on PACER docket records for case 3:20-cv-04151 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffSynopsys, Inc.CompanyEDA software leader — holder of US8407655B2, US7853915B2, and US8234614B1Search in Eureka ↗
DefendantAvatar Integrated Systems, Inc.CompanyAvatar Integrated Systems, Inc. and Siemens Industry Software, Inc. — EDA sector defendantsSearch in Eureka ↗
Co-DefendantSiemens Industry Software, Inc.CompanySearch in Eureka ↗
Plaintiff counselAaron Stafford OakleyAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselAlex RhimAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselAliza George CarranoAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselBarrington E. DyerAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselBrandon Keith FranklinAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselBrian W FrinoAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselCeline Jimenez CrowsonAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselCorey T LeggettAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselGurtej SinghAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselHelen Yiea TracAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselJacob KarimAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselJohn Christopher MoulderAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselKrista Sue SchwartzAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselMadeleine BechAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselNicholas ReddickAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselPatrick Thomas MichaelAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselShaimaa M HusseinAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff counselXiaolin ChenAttorneyCounsel for Synopsys, Inc.Search in Eureka ↗
Plaintiff law firmHogan Lovells US LLP (Washington DC)Law FirmRepresenting Synopsys, Inc.Search in Eureka ↗
Plaintiff law firmHogan Lovells US LLPLaw FirmRepresenting Synopsys, Inc.Search in Eureka ↗
Plaintiff law firmSeyfarth Shaw LLPLaw FirmRepresenting Synopsys, Inc.Search in Eureka ↗
Plaintiff law firmWillkie Farr Gallagher LLPLaw FirmRepresenting Synopsys, Inc.Search in Eureka ↗
Defendant counselCaroline L DesmondAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselJohn D. VandenbergAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselJonah Dylan MitchellAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselKlaus Hemingway HammAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselKristin L. ClevelandAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselMark W. WilsonAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselPaul AlexanderAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselSalumeh R LoeschAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant counselScott D. BakerAttorneyCounsel for Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant law firmArnold & Porter Kaye Scholer LLPLaw FirmRepresenting Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant law firmKlarquist, Sparkman LLPLaw FirmRepresenting Avatar Integrated Systems, Inc.Search in Eureka ↗
Defendant law firmReed Smith LLPLaw FirmRepresenting Avatar Integrated Systems, Inc.Search in Eureka ↗
Presiding judgeJudge N/AJudgeCalifornia Northern District CourtSearch in Eureka ↗
Official verdict

Official order — verbatim text

“Pursuant to Fed. R. Civ. P. 41(a)(1)(A)(ii), the parties, through their counsel of record, hereby stipulate that this action is dismissed with prejudice, each party bearing its own fees and costs.”
Source: PACER Docket, Case 3:20-cv-04151, California Northern District Court

The stipulated dismissal under Rule 41(a)(1)(A)(ii) reflects a consensual, bilateral exit rather than any merits adjudication. The ‘with prejudice’ language is the operative term: it functions as a final judgment barring Synopsys from re-litigating these three patent claims against Avatar and Siemens in any future proceeding. The mutual cost-bearing clause is notable — it departs from any fee-shifting outcome and suggests both parties valued finality over a contested cost determination. No finding of invalidity, non-infringement, or infringement was ever entered on the public record.

PACER case 3:20-cv-04151 · Public docket record Explore in Eureka ↗
Patent at issue

US8407655B2, US7853915B2 & US8234614B1 — EDA Tool Patents

Publication No.US8407655B2
Application No.US12/949689
Patent details
ProductIC place-and-route compilation methods and systems
Cited in actionJune 23, 2020

Publication No.US7853915B2
Application No.US12/145405
Patent details
ProductStatic timing analysis and optimization for integrated circuit design
Cited in actionJune 23, 2020

Publication No.US8234614B1
Application No.US12/156963
Patent details
ProductElectronic design automation methods for chip layout and verification
Cited in actionJune 23, 2020

The three patents at issue — US8407655B2, US7853915B2, and US8234614B1 — cover technology in the electronic design automation domain, specifically methods and systems underlying Synopsys’s IC Compiler (place-and-route) and PrimeTime (static timing analysis) product lines. These are among Synopsys’s most commercially critical tools, used at foundries and fabless semiconductor companies globally to physically implement and verify chip designs. The application dates (application numbers 12/949689, 12/145405, and 12/156963) suggest late-2000s to early-2010s vintage filings, meaning these patents would have issued with claims shaped around EDA methodologies that were maturing as advanced node design complexity surged.

Strategically, patents covering core EDA workflow steps — compilation, timing closure, and layout optimization — create a high barrier for competitors seeking to replicate equivalent functionality. Synopsys’s decision to assert all three patents simultaneously against Avatar and Siemens suggests a coordinated enforcement posture designed to protect market share in a segment where Siemens (via its EDA acquisitions) has aggressively expanded. Any EDA software vendor, ECAD tool developer, or semiconductor IP provider building tools that intersect with IC place-and-route or static timing verification should treat this patent family as a live clearance priority.

Patent data sourced from USPTO via PatSnap Eureka patent database Search patent records in Eureka ↗
Freedom to operate

Should you run an FTO against US8407655B2, US7853915B2 & US8234614B1?

If your R&D team is building or acquiring EDA tools that touch IC place-and-route compilation or static timing analysis — the core workflows of IC Compiler and PrimeTime — these three Synopsys patents represent a meaningful clearance priority. The with-prejudice dismissal only protects Avatar and Siemens from re-assertion; all other market participants remain fully exposed. Chip design tool vendors, EDA startups, and semiconductor OEMs integrating third-party design automation capabilities should assess whether their implementations overlap with the claim scope of these patents before product launch or licensing negotiations.

PatSnap Eureka’s FTO Search Agent can map the independent and dependent claim structures of US8407655B2, US7853915B2, and US8234614B1 against your technical implementation, surfacing design-around opportunities and prosecution history estoppel that may limit claim scope. Eureka also identifies continuation applications and related family members that Synopsys may assert separately — giving your legal and engineering teams a complete exposure picture before entering the EDA competitive market.

PatSnap Eureka FTO Search

Run a freedom-to-operate analysis on US8407655B2 to assess your product’s exposure

Run FTO in Eureka →
Related litigation

Similar EDA Patent Infringement Cases in N.D. California

Cases involving EDA software patents litigated in the Northern District of California, including Synopsys enforcement actions and electronic design automation IP disputes.

🔍
Access 40+ similar cases in PatSnap Eureka
Synopsys, Inc. patent enforcement history, California Northern case history, Synopsys, Inc.’s full IP portfolio, and comparable case analysis
Synopsys EDA enforcement casesN.D. Cal. software patent dismissalsSiemens EDA patent litigation historyIC Compiler patent disputes
Unlock similar cases in Eureka →
Strategic implications

What this case signals for the EDA software IP landscape

A four-year, three-patent EDA dispute between direct competitors ending in bilateral dismissal carries clear market signals for IP strategy teams.

EDA patents covering core workflow tools carry significant litigation leverage

Synopsys’s choice to assert three patents specifically tied to IC Compiler and PrimeTime — its most commercially central tools — signals that EDA incumbents are willing to use their deep patent portfolios to challenge competitive encroachment. Any EDA platform replicating comparable chip compilation or timing analysis functionality faces meaningful patent risk from this portfolio.

Dismissal with prejudice plus mutual cost-bearing often signals a private resolution

When sophisticated parties walk away from four years of litigation with no public damages and a with-prejudice stipulation, the pattern is consistent with an undisclosed commercial arrangement — licensing, cross-licensing, or a business relationship restructuring. The public record cannot confirm this, but the structure is a common signal in high-value EDA and enterprise software disputes.

🔒
Full strategic analysis in PatSnap Eureka
Unlock deeper analysis of Synopsys’s EDA patent enforcement strategy and district court dismissal patterns for enterprise software IP teams.
Patent family exposure mapSynopsys EDA enforcement historySiemens EDA acquisition IP risk
Unlock full analysis →
Analysis powered by PatSnap Eureka Litigation Intelligence Explore in Eureka ↗
Frequently asked questions

Synopsys v Avatar — key questions answered

Still have questions? PatSnap Eureka can answer them instantly from patent and litigation data. Ask Eureka ↗
PatSnap Eureka

Track EDA Patent Enforcement Risk Before It Reaches Litigation

Run an FTO on the Synopsys EDA patent family before building or acquiring IC Compiler or PrimeTime-adjacent technology. PatSnap Eureka monitors live enforcement activity across the EDA software patent landscape so your IP team stays ahead of risk.

Ask anything about this case.
PatSnap Eureka searches patents and litigation data to answer instantly.
Powered by PatSnap Eureka
Link copied to clipboard

Related Litigation Cases

Help us improve this page

Found incorrect or outdated information? Let us know and we'll get it fixed.