VLSI Technology, LLC v. Intel, Corp.
Infringement action filed 2 May 2024 in the United States Court of Appeals for the Federal Circuit and closed 14 Apr 2026, with 8 patents asserted. Recorded basis of termination: appeal dismissed in part.
Case record
- Patents involved
- US7706207B2US8004922B2US8020014B2US7268588B2US7675806B2US7709303B2US8268672B2US8566836B2
- Case no.
- 24-1772
- Verdict cause
- Infringement action
- Court
- Fed. Cir.
- Court level
- Court of Appeals
- Case region
- District of Columbia
- Chief judge
- None recorded
- Trial level
- Appeal
- Filed – Closed
- 2 May 2024 – 14 Apr 2026
- Duration
- 712 days
- Basis of termination
- Appeal Dismissed in Part
- Products & marks
- Low voltage memory device and method thereof · Method for power reduction and a device having power reduction capabilities · Method of assembly and assembly thus made · Multi-core system on chip · Power island with independent power characteristics for memory and logic · Process for forming an electronic device including a fin-type structure
Check this patent against your own product
Prior art, claim scope, infringement exposure and design-around routes. Every answer cites the records behind it.
Get an FTO claim chart- 01Ranked prior artEvery hit source-linked
- 02Claim-level comparisonAgainst your own product
- 03Legal statusAcross 174 jurisdictions
Memory with level shifting word line driver and method thereof
A memory includes a bit cell array including a plurality of word lines and address decode circuitry having an output to provide a predecode value. The address decode circuitry includes a first plurality of transistors having a first gate oxide thickness. The memory further includes word line driver circuitry having an input coupled to the output of the address decode circuitry and a plurality of outputs, each output coupled to a corresponding word line of the plurality of word lines. The word line driver includes a second plurality of transistors having a second gate oxide thickness greater than the first gate oxide thickness. A method of operating the memory also is provided.
- Legal status
- Inactive
- Granted
- 27 Apr 2010
- Est. expiry
- 15 May 2026
- Validity challenges
- 1 on recordIPR2018-01040 · Other · filed by INTEL CORPORATION
- Licences recorded
- None recorded
- Classification
- G11C8/00
- Prosecution counsel
- Daylight Law, P.C.
- Examiner
- HOANG, HUAN
Power island with independent power characteristics for memory and logic
A power island for a system-on-a-chip (SoC) includes a first segment, a second segment, and a supply line. The first segment includes a hardware device and operates the hardware device at first power characteristics indicative of at least a first voltage. The second segment includes scalable logic and operates the scalable logic at second power characteristics indicative of at least a second voltage. The second power characteristics of the scalable logic are different from the first power characteristics of the hardware device. The supply line receives an external supply signal (VDD) and directs the external supply signal to both the first segment and the second segment. The second segment changes at least one power characteristic of the external supply signal to operate the scalable logic according to the second power characteristics.
- Legal status
- Active
- Granted
- 23 Aug 2011
- Est. expiry
- 3 Nov 2029
- Validity challenges
- 2 on recordIPR2018-01033 · Other · filed by INTEL CORPORATIONIPR2018-01144 · Other · filed by INTEL CORPORATION
- Licences recorded
- None recorded
- Inventors
- EVOY, DAVID R. · KLAPPORTH, PETER · PINEDA DE GYVEZ, JOSE J.
- Classification
- G11C7/00
- Prosecution counsel
- Daylight Law, P.C.
- Examiner
- NGUYEN, VANTHU
Also asserted in this case
6 moreThe docket lists 8 asserted patents. Full bibliographic detail, drawings and prosecution history for the remaining 6 asserted patents are one query away in Eureka.
- US8020014B2Method for power reduction and a device having power reduction capabilities
- US7268588B2Cascadable level shifter cell
- US7675806B2Low voltage memory device and method thereof
- US7709303B2Process for forming an electronic device including a fin-type structure
- US8268672B2Method of assembly and assembly thus made
- US8566836B2Multi-core system on chip
Parties of record
VLSI Technology, LLC
- Core tech
- G11C8/00G11C7/00
- Counsel
- Alan J. Heinrich · Babak Redjaian · Benjamin W. Hattenbach · Charlotte J. Wen · Elizabeth C. Tuan · Elizabeth Kathleen Clarke · Ian Washburn · Iian D. Jablon · Jeffrey A. Lamken · Lucas M. Walker · Morgan Chu
- Firm
- Irell & Manella LLP, MoloLamken LLP
Intel, Corp.
- Core tech
- Not recorded
- Counsel
- Andrew J. Danford · Dominic E. Massa · Joseph J. Mueller · Louis W. Tompros · Mary Virginia Sooter · William F. Lee
- Firm
- Wilmer Cutler Pickering Hale & Dorr LLP
Counsel of record
| Attorney | For | Role |
|---|---|---|
| Alan J. Heinrich | VLSI Technology, LLC | Plaintiff |
| Babak Redjaian | VLSI Technology, LLC | Plaintiff |
| Benjamin W. Hattenbach | VLSI Technology, LLC | Plaintiff |
| Charlotte J. Wen | VLSI Technology, LLC | Plaintiff |
| Elizabeth C. Tuan | VLSI Technology, LLC | Plaintiff |
| Elizabeth Kathleen Clarke | VLSI Technology, LLC | Plaintiff |
| Ian Washburn | VLSI Technology, LLC | Plaintiff |
| Iian D. Jablon | VLSI Technology, LLC | Plaintiff |
| Jeffrey A. Lamken | VLSI Technology, LLC | Plaintiff |
| Lucas M. Walker | VLSI Technology, LLC | Plaintiff |
| Morgan Chu | VLSI Technology, LLC | Plaintiff |
| Andrew J. Danford | Intel, Corp. | Defendant |
| Dominic E. Massa | Intel, Corp. | Defendant |
| Joseph J. Mueller | Intel, Corp. | Defendant |
| Louis W. Tompros | Intel, Corp. | Defendant |
| Mary Virginia Sooter | Intel, Corp. | Defendant |
| William F. Lee | Intel, Corp. | Defendant |
Basis of termination
From the record · verbatim“THIS CAUSE having been considered, it is ORDERED AND ADJUDGED: REVERSED-IN-PART, AFFIRMED-IN-PART, AND REMANDED”
Case 24-1772 · Fed. Cir. · closed 14 April 2026
Related cases
Three questions this record usually leads to. Each one runs against the full litigation and patent corpus, and cites what it finds.
Frequently asked questions
What is case 24-1772?
24-1772 is a patent infringement action brought by VLSI Technology, LLC against Intel, Corp., filed on 2 May 2024 in the United States Court of Appeals for the Federal Circuit. The case closed on 14 April 2026.
Which patents were asserted in 24-1772?
US7706207B2 (“Memory with level shifting word line driver and method thereof”), assigned to VLSI TECHNOLOGY LLC, currently inactive; US8004922B2 (“Power island with independent power characteristics for memory and logic”), assigned to VLSI TECHNOLOGY LLC, currently active; US8020014B2 (“Method for power reduction and a device having power reduction capabilities”), assigned to VLSI TECHNOLOGY LLC; US7268588B2 (“Cascadable level shifter cell”), assigned to VLSI TECHNOLOGY LLC; US7675806B2 (“Low voltage memory device and method thereof”), assigned to VLSI TECHNOLOGY LLC; US7709303B2 (“Process for forming an electronic device including a fin-type structure”), assigned to VLSI TECHNOLOGY LLC; US8268672B2 (“Method of assembly and assembly thus made”), assigned to VLSI TECHNOLOGY LLC; US8566836B2 (“Multi-core system on chip”), assigned to VLSI TECHNOLOGY LLC. The record also lists Low voltage memory device and method thereof, Method for power reduction and a device having power reduction capabilities, Method of assembly and assembly thus made, Multi-core system on chip, Power island with independent power characteristics for memory and logic and Process for forming an electronic device including a fin-type structure.
How was case 24-1772 terminated?
The recorded basis of termination is appeal dismissed in part. The termination text reads: “THIS CAUSE having been considered, it is ORDERED AND ADJUDGED: REVERSED-IN-PART, AFFIRMED-IN-PART, AND REMANDED”
How long did case 24-1772 take?
712 calendar days, from filing on 2 May 2024 to closure on 14 April 2026.
Who were the attorneys and the judge in 24-1772?
Alan J. Heinrich, Babak Redjaian, Benjamin W. Hattenbach, Charlotte J. Wen, Elizabeth C. Tuan, Elizabeth Kathleen Clarke, Ian Washburn, Iian D. Jablon, Jeffrey A. Lamken, Lucas M. Walker and Morgan Chu are recorded as counsel for plaintiff VLSI Technology. Andrew J. Danford, Dominic E. Massa, Joseph J. Mueller, Louis W. Tompros, Mary Virginia Sooter and William F. Lee appear for defendant Intel.
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