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VLSI Technology v. Patent Quality Assurance — Memory Voltage Patent | PatSnap
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Case ID3:24-cv-00213
FiledMar 2024
ClosedFeb 2025
Patent Litigation

VLSI Technology v. Patent Quality Assurance: Federal Court Remands Memory Voltage Patent Dispute

VLSI Technology, LLC brought an infringement action against Patent Quality Assurance, LLC and individual defendant Joseph Uradnik over US7523373B2, a patent covering minimum memory operating voltage techniques. After 330 days, the Virginia Eastern District Court granted VLSI’s motion to remand, sending the case back to the Circuit Court for the City of Alexandria where it will continue.

Resolution time
330days
330-day federal phase before remand to state court
Patents asserted
1
US7523373B2 — minimum memory operating voltage technique
Outcome
Case Remanded
Returned to Circuit Court for the City of Alexandria; federal proceedings closed
Cost ruling
Motions Mooted
All pending dismiss motions denied as moot following remand order
Published by PatSnap Insights Team · Verified by PatSnap Eureka Data
Case overview

Memory Voltage Patent Dispute Returned to Virginia State Court

VLSI Technology, LLC initiated this infringement action on 20 March 2024 in the Virginia Eastern District Court, asserting US7523373B2 — a patent covering minimum memory operating voltage techniques — against Patent Quality Assurance, LLC (PQA) and individual defendant Joseph Uradnik. The case sits at the intersection of patent enforcement and questions of proper forum, with VLSI challenging the defendants’ removal of the action to federal court.

On 13 February 2025, Judge M. Hannah Lauck granted VLSI’s motion to remand, ordering the case returned to the Circuit Court for the City of Alexandria. The federal court denied as moot all pending motions — including two motions to dismiss filed by Uradnik and PQA under Rules 12(b)(2) and 12(b)(6), and a motion to file a revised financial disclosure under seal — meaning no merits determination was reached in the federal proceedings.

The 330-day federal phase ended without any adjudication of infringement or validity, which is consistent with a disputed removal that lacked a sufficient federal jurisdictional basis. The remand suggests the defendants’ grounds for removal were found wanting, though the accompanying Memorandum Opinion would contain the full reasoning. The merits of the underlying patent infringement claims remain live and will now be litigated in Virginia state court.

Case at a glance
Case no.3:24-cv-00213
CourtVirginia Eastern
JudgeM. Hannah Lauck
FiledMarch 20, 2024
ClosedFebruary 13, 2025
Duration330 days
OutcomeCase Remanded
Verdict causeInfringement Action
BasisCase Remanded
Prior Art Intelligence
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Case data sourced from PACER / Virginia Eastern District Court via PatSnap Eureka Litigation Intelligence Explore similar cases ↗
Case timeline

Filing to Case Remanded in 330 days

330-day federal phase before remand to state court

Case timeline: Complaint filed MAR 20 2024, SEP–OCT — 330 days total Horizontal timeline showing the three key events in VLSI Technology, LLC v Patent Quality Assurance, LLC from filing to resolution. Source: PACER, Virginia Eastern District Court. MAR 20 2024 Complaint filed Pre-trial proceedings FEB 13 2025 Case Remanded 330 DAYS TOTAL
Remand terms

Federal court remands to Alexandria: what the ruling means for both parties

Legal mechanism

Remand returns the case to its original state court forum

A remand order transfers a case back to the state court from which it was removed. The federal court found — for reasons detailed in the accompanying Memorandum Opinion — that federal jurisdiction was not properly established. Removal to federal court requires a valid jurisdictional basis; where that basis is absent or defective, the plaintiff’s motion to remand must be granted. No merits ruling was issued.

No federal merits decision
Plaintiff outcome

VLSI wins the forum battle; infringement claims survive

VLSI’s successful remand motion means its infringement claims under US7523373B2 continue in the Circuit Court for the City of Alexandria, the forum VLSI originally chose. The defendants’ 12(b)(2) and 12(b)(6) dismissal motions were denied as moot — so no challenge to personal jurisdiction or the legal sufficiency of VLSI’s claims was resolved against VLSI at the federal level.

Claims survive; state court proceeds
Defendant outcome

Defendants’ removal strategy failed; face state court proceedings

PQA and Uradnik’s attempt to litigate in federal court was unsuccessful. Their pending motions to dismiss — which could have ended the case without a merits finding — were denied as moot, leaving them to defend the infringement action in Virginia state court. The failure to establish a removal basis also typically signals exposure to potential attorneys’ fee sanctions under 28 U.S.C. § 1447(c), though none is confirmed from the public record.

Removal strategy unsuccessful
Commercial implications

Memory operating voltage patent remains active enforcement risk

The remand preserves US7523373B2 as an active assertion vehicle. Companies developing or deploying minimum memory operating voltage techniques should note that this patent has not been invalidated or found unenforceable. The return to state court may affect discovery dynamics and procedural timelines, but the underlying infringement claims are fully intact and will advance toward a merits determination.

Patent enforcement risk continues
Legal analysis based on PACER docket records for case 3:24-cv-00213 and PatSnap Eureka litigation intelligence Search PatSnap Eureka ↗
Parties and representation

Full party and counsel information

RoleNameTypeDetail
PlaintiffVLSI Technology, LLCCompanyPatent licensing entity — holder of US7523373B2 covering memory voltage techniquesSearch in Eureka ↗
DefendantPatent Quality Assurance, LLCCompanyPatent Quality Assurance, LLC and individual Joseph Uradnik; removed action to federal courtSearch in Eureka ↗
Co-DefendantJoseph UradnikIndividualSearch in Eureka ↗
Plaintiff counselEllen D. MarcusAttorneyCounsel for VLSI Technology, LLCSearch in Eureka ↗
Plaintiff counselJoshua Louis SolomonAttorneyCounsel for VLSI Technology, LLCSearch in Eureka ↗
Plaintiff counselMichael Steven SchachterAttorneyCounsel for VLSI Technology, LLCSearch in Eureka ↗
Plaintiff counselSteven Joseph BallewAttorneyCounsel for VLSI Technology, LLCSearch in Eureka ↗
Plaintiff law firmHolmes Costin & Marcus, PLLCLaw FirmRepresenting VLSI Technology, LLCSearch in Eureka ↗
Plaintiff law firmPollack Solomon Duffy LLP (MA-NA)Law FirmRepresenting VLSI Technology, LLCSearch in Eureka ↗
Plaintiff law firmWillkie Farr & Gallagher LLP (NY-NA)Law FirmRepresenting VLSI Technology, LLCSearch in Eureka ↗
Defendant counselCraig Crandall ReillyAttorneyCounsel for Patent Quality Assurance, LLCSearch in Eureka ↗
Defendant law firmLaw Office of Craig C. ReillyLaw FirmRepresenting Patent Quality Assurance, LLCSearch in Eureka ↗
Presiding judgeJudge M. Hannah LauckJudgeVirginia Eastern District CourtSearch in Eureka ↗
Official verdict

Official order — verbatim text

“For the reasons stated in the accompanying Memorandum Opinion, the Court GRANTS VLSI Technology LLC’s Motion to Remand. (ECF No. 15.) The Court REMANDS this action to the Circuit Court for the City of Alexandria. The Court DENIES AS MOOT: (1) Defendant Joseph Uradnik’s Motion to Dismiss Pursuant to Federal Rules of Civil Procedure 12(b)(2) and 12(b)(6), (ECF No. 3); (2) Defendant Patent Quality Assurance, LLC’s Motion to Dismiss Pursuant to Federal Rules of Civil Procedure 12(b)(2) and 12(b)(6), (ECF No. 5); and (3) Defendants’ Motion for Leave to File PQA’s Revised Financial Interest Disclosure Under Seal and For Other Relief. (ECF No. 31). It is SO ORDERED.”
Source: PACER Docket, Case 3:24-cv-00213, Virginia Eastern District Court

The court’s order is procedural rather than substantive: it grants remand and denies all pending motions as moot, without reaching the merits of infringement or the defendants’ jurisdictional and sufficiency challenges. The phrase ‘for the reasons stated in the accompanying Memorandum Opinion’ indicates a detailed written analysis of the removal defect exists but is not reproduced in the order itself. For both parties, the operative effect is clear — federal jurisdiction is extinguished, all federal motions are terminated, and the Circuit Court for the City of Alexandria resumes authority over the dispute.

PACER case 3:24-cv-00213 · Public docket record Explore in Eureka ↗
Patent at issue

US7523373B2 — Minimum Memory Operating Voltage Technique

Publication No.US7523373B2
Application No.US11/468458
Patent details
ProductMinimum memory operating voltage technique for semiconductor memory systems
Cited in actionMarch 20, 2024

US7523373B2, filed under application number US11/468458, covers a minimum memory operating voltage technique — a method or system for determining and applying the lowest reliable operating voltage for memory components. This class of technology is commercially significant in semiconductor design, where power efficiency and voltage margin optimisation directly affect device performance and battery life. The patent’s claims define boundaries around voltage management approaches that are foundational to modern memory subsystem design.

For semiconductor IP portfolios, memory operating voltage patents occupy a strategically valuable position: they sit at the intersection of power management and memory architecture, two areas subject to continuous competitive pressure. VLSI Technology’s assertion of this patent against PQA and Uradnik — rather than a product manufacturer — suggests a complex enforcement or counterclaim dynamic that the state court proceedings will need to resolve. Companies designing low-power memory controllers or SoC memory interfaces should assess their exposure against this patent’s claim scope.

Patent data sourced from USPTO via PatSnap Eureka patent database Search patent records in Eureka ↗
Freedom to operate

Should you run an FTO against US7523373B2?

Any R&D team developing products that implement minimum memory operating voltage techniques — including low-power DRAM controllers, embedded memory subsystems, or voltage-scaling memory interfaces — should evaluate whether their implementations fall within the claim scope of US7523373B2. The patent remains enforceable and is actively asserted. With no invalidity ruling on record at the federal level, the risk profile has not diminished from the public proceedings.

PatSnap Eureka’s FTO Search Agent can map the claim language of US7523373B2 against your product architecture, identify prior art that could support a design-around or IPR petition, and flag related family members or continuation applications. Given that this dispute is now proceeding in Virginia state court — where patent-specific procedural tools are less standardised — a proactive FTO analysis conducted before any licensing demand or litigation posture solidifies is strongly advisable.

PatSnap Eureka FTO Search

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Related litigation

Similar Memory Voltage Patent Infringement Cases in US District Courts

Cases involving memory operating voltage patents and removal/remand disputes in Virginia federal courts, with comparable non-practicing entity enforcement dynamics.

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Strategic implications

What this case signals for the semiconductor memory IP landscape

A successful remand preserves VLSI’s chosen forum and keeps a key memory voltage patent in active play.

Forum selection remains a live battleground in patent enforcement

Defendants in patent cases frequently remove to federal court to access Article III judges and federal patent law procedures. When removal is successfully challenged — as here — the case returns to state court with no merits decided. Companies asserting patents should anticipate removal attempts and prepare remand arguments proactively, particularly where the defendant’s jurisdictional basis is thin.

US7523373B2 has survived federal proceedings without validity challenge

Neither an IPR nor a federal invalidity ruling has resolved the status of this patent. The mootness of the 12(b)(6) motion means the legal sufficiency of VLSI’s infringement theory was never tested at the federal level. Competitors working with minimum memory operating voltage techniques should treat this patent as an active enforcement risk pending the state court outcome.

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State court claim constructionVLSI enforcement historyUS7523373B2 IPR exposure
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Frequently asked questions

VLSI v Patent — key questions answered

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Monitor the US7523373B2 dispute as it moves to state court

The memory voltage patent infringement claims are now live in Virginia state court. Use PatSnap Eureka to track filings, run an FTO against US7523373B2, and benchmark this patent’s claim scope against your product roadmap before any licensing demand arrives.

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