3D IC Stacking Patent Landscape 2026
3D IC Stacking Patent Landscape in 2026
The 3D IC stacking patent field is heavily concentrated, with Taiwan Semiconductor Manufacturing Co. (TSMC) leading a tight tier of foundry and logic incumbents that together account for nearly a third of the top hundred filers’ combined output. Annual filing volume peaked in 2021 and has eased since, though the most recent years remain under-counted due to publication lag.
TSMC leads a concentrated field of foundry and logic giants
TSMC holds the top position with 1,858 patent records, followed closely by Samsung Electronics at 1,557 and Intel at 1,515, forming a near-tied leading trio that collectively dominates 3D IC stacking IP.
The top five filers — TSMC, Samsung, Intel, Semiconductor Energy Laboratory, and Sony Semiconductor Solutions — account for 32% of the combined output of the hundred largest filers, signaling strong but not absolute concentration; a second tier of equipment and materials specialists (Applied Materials, Monolithic 3D, IBM, Siliconware Precision, Kioxia) holds meaningful positions.
| # | Applicant | Patent records | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co. (TSMC) | 1,858 | |
| 2 | Samsung Electronics Co., Ltd. | 1,557 | |
| 3 | Intel Corporation | 1,515 | |
| 4 | Semiconductor Energy Laboratory Co., Ltd. | 920 | |
| 5 | Sony Semiconductor Solutions Corporation | 842 | |
| 6 | Applied Materials, Inc. | 658 | |
| 7 | Monolithic 3D Inc. | 621 | |
| 8 | International Business Machines Corporation (IBM) | 528 | |
| 9 | Siliconware Precision Industries Co., Ltd. | 524 | |
| 10 | Kioxia Corporation | 522 |
| # | Applicant | Patent records | Share |
|---|---|---|---|
| 11 | Resonac Corporation | 451 | |
| 12 | Sony Group Corporation | 433 | |
| 13 | Shin-Etsu Chemical Co., Ltd. | 407 | |
| 14 | Changxin Memory Technologies, Inc. | 366 | |
| 15 | Micron Technology, Inc. | 336 | |
| 16 | SK Hynix Inc. | 328 | |
| 17 | Disco Corporation | 300 | |
| 18 | Semiconductor Manufacturing International (Shanghai) Corporation | 295 | |
| 19 | Qualcomm Incorporated | 282 | |
| 20 | Nanya Technology Corporation | 276 |
The dominance of vertically integrated foundries and logic vendors indicates that core stacking architecture IP is largely controlled by a small group with deep process integration expertise, raising freedom-to-operate concerns for new entrants attempting foundational approaches.
Filings from 2024 and 2025 are substantially under-counted due to standard patent publication lag and should not be interpreted as a sustained decline beyond the post-2021 easing already observed. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Post-2021 volume easing; semiconductor device IP dominates the technology mix
The annual filing trend reveals a field that grew steadily from 2017 through a 2021 peak and has since moderated, while the IPC class breakdown shows a technology mix anchored in semiconductor device processing with meaningful adjacent branches.
Annual filing trend
Filings rose from 1,334 in 2017 to a peak of 1,718 in 2021, then eased to 1,581 in 2022 and 1,341 in 2023. The 2024 figure of 912 and the 2025 figure of 332 should be treated as preliminary given publication lag; they do not yet reflect true activity levels.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) is the overwhelmingly dominant branch at 19,988 patent records, reflecting the process-integration core of 3D IC stacking. H10B (Memory device manufacture) at 2,110 and H04N (Pictorial communication/video) at 1,473 form a secondary tier, followed by G11C (Static and digital memories) and H10D (Semiconductor devices, general). Materials and process branches — C09J (Adhesives), B23K (Welding/soldering/brazing), C25D (Electroplating), and C23C (Coating) — appear at lower but technically meaningful counts, indicating active work on enabling materials and bonding processes.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Method for fabricating through silicon via structure
A method for fabricating through silicon via (TSV) structure is disclosed. The method includes the steps of: providing a substrate; forming a through-silicon via (TSV) in the substrate; depositing a liner in the TSV; removing the liner in a bottom of the TSV; and filling a first conductive layer in the TSV for forming a TSV structure. (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | Package systems having interposers | 1,060 |
| 2 | 3DIC stacking device and method of manufacture | 929 |
| 3 | Plasma activated conformal film deposition | 913 |
| 4 | Semiconductor Device and Method of Forming an Inte… | 766 |
| 5 | Plasma activated conformal dielectric film deposit… | 757 |
| 6 | Through silicon via, folded flex microelectronic p… | 661 |
| 7 | Plasma activated conformal dielectric film deposit… | 659 |
| 8 | Plasma activated conformal film deposition | 634 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the patent structure means for R&D investment decisions
The combination of a maturing filing trajectory, high concentration among process-integration leaders, and active collaboration clusters shapes both the risk profile and the accessible white space for new entrants and challengers.
Field has passed its peak filing year; consolidation phase underway
The lifecycle evidence places 3D IC stacking in a decline stage, with annual filings having eased back from their 2021 peak of 1,718. On a multi-year basis the field expanded significantly from 2017, but the directional signal from 2022–2023 actuals indicates that foundational architecture IP is maturing. R&D teams should expect incremental improvement patents rather than broad new claim landscapes from incumbents.
Post-peak · 2021 apexTop five filers hold 32% of the hundred largest filers’ combined output
TSMC, Samsung, Intel, Semiconductor Energy Laboratory, and Sony Semiconductor Solutions form a dominant first tier. A clear gap separates them from a second tier (Applied Materials, Monolithic 3D, IBM, Siliconware Precision, Kioxia) with 500–660 patent records each. New entrants face high barriers in core stacking architecture but may find differentiated positions in materials, equipment, and niche application verticals where the top five are less dominant.
High concentrationTSMC and IBM anchor the most active co-filing networks
The most frequent co-filing pairs are TSMC with its subsidiary TSMC China (18 joint filings) and TSMC with TSMC Nanjing (14), indicating intra-corporate IP coordination across jurisdictions. IBM co-files with IBM United Kingdom (16) and IBM Deutschland (6), as well as with Zeon Corporation (6). Sony Semiconductor Solutions and Sony Group co-file 11 times. TSMC also collaborates with National Taiwan University (7) and Global Unichip (7), suggesting university and design-house partnerships as an innovation channel worth monitoring.
Intra-group + academic tiesUS leads filing activity; Taiwan and China are strategic secondary offices
The United States accounts for the largest share of patent records at 11,906, reflecting both the origin of many applicants and the strategic importance of US patent protection. Europe (EPO) at 1,681 and China at 1,583 form a secondary tier, followed by WIPO PCT at 1,397, Taiwan at 1,230, and Japan at 1,178. Singapore at 343 reflects its role as a regional semiconductor hub. The breadth of jurisdictions covered indicates that leading players are pursuing global protection strategies, raising the cost of freedom-to-operate clearance for new entrants.
US-anchored · global coverageGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co. (TSMC) | TSMC China Co., Ltd. | 18 |
| International Business Machines Corporation (IBM) | IBM UNITED KINGDOM LTD INTELLECTUAL PROPERTY DEPAR… | 16 |
| Taiwan Semiconductor Manufacturing Co. (TSMC) | TSMC Nanjing Co., Ltd. | 14 |
| Sony Semiconductor Solutions Corporation | Sony Group Corporation | 11 |
| Taiwan Semiconductor Manufacturing Co. (TSMC) | National Taiwan University | 7 |
| Taiwan Semiconductor Manufacturing Co. (TSMC) | Global Unichip Corporation | 7 |
| International Business Machines Corporation (IBM) | Zeon Corporation | 6 |
| International Business Machines Corporation (IBM) | IBM DEUTSCHLAND GMBH | 6 |
| Samsung Electronics Co., Ltd. | Dongjin Semichem Co., Ltd. | 4 |
| International Business Machines Corporation (IBM) | IBM China Co., Ltd. | 3 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC, Samsung, and Intel lead; momentum diverges across the second tier
The top three players share a common focus on semiconductor device processing (H01L 21 and H01L 23) but differ in trajectory and application emphasis, with TSMC and Intel gaining momentum while several mid-tier players are contracting.
Taiwan Semiconductor Manufacturing Co. (TSMC)
TSMC leads with 1,858 patent records, concentrated in semiconductor device processing (H01L 21: 1,189 records; H01L 23: 1,090 records; H01L 25: 440 records), reflecting deep focus on stacking architecture and interconnect integration. Recent filing momentum is positive at +17% versus the prior three-year period, indicating continued offensive prosecution despite the broader market easing. Co-filing relationships with TSMC China, TSMC Nanjing, National Taiwan University, and Global Unichip extend its IP ecosystem.
patent records: 1,858Intel Corporation
Intel ranks third overall at 1,515 patent records but shows the strongest recent momentum among the top three at +26% versus the prior period, suggesting an accelerating prosecution strategy. Its focus spans H01L 21 (1,082 records), H01L 23 (821 records), and H01L 29 (670 records — semiconductor device structures), indicating broader device-level coverage than TSMC’s interconnect-heavy profile. Samsung, ranked second at 1,557 patent records with +10% momentum, maintains broad coverage across H01L 23, H01L 21, and H01L 27 (stacked/integrated circuits).
patent records: 1,515| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co. (TSMC) | 411 | ▲ +17% |
| Intel Corporation | 518 | ▲ +26% |
| Samsung Electronics Co., Ltd. | 431 | ▲ +10% |
| Semiconductor Energy Laboratory Co., Ltd. | 300 | ▼ -32% |
| Sony Semiconductor Solutions Corporation | 167 | ▼ -61% |
| International Business Machines Corporation (IBM) | 62 | ▼ -40% |
| Monolithic 3D Inc. | 213 | ▲ +16% |
| Sony Group Corporation | 12 | ▼ -82% |
Under-served branches adjacent to the dominant H01L core
Several IPC classes appear at notably lower filing densities relative to the overall corpus size, representing areas where the 3D IC stacking patent landscape is thinner and where technically motivated entrants may find differentiated positions.
H10B · Memory Device Manufacture
H10B carries 2,110 patent records — substantial in absolute terms but only 6% of the dominant H01L branch, leaving memory-specific stacking process IP comparatively sparse relative to the scale of investment in 3D NAND and HBM. Entrants with expertise in advanced memory cell integration, wafer bonding for DRAM stacks, or CMP processes tailored for memory layers could find differentiated claim space. A realistic entry path is via process patents on bonding or planarization steps specific to memory stack architectures rather than device architecture claims already dominated by Kioxia, Changxin Memory, and SK Hynix.
Search this in Eureka →H04N · Pictorial Communication / Image Sensor Stacking
H04N (Pictorial communication, video/TV) appears at 1,473 patent records — 4% of the H01L total — reflecting image sensor stacking applications such as back-illuminated CMOS stacks and stacked pixel architectures. Sony Semiconductor Solutions and Sony Group are the primary players here (H04N 5 and H04N 25 each exceeding 100 records in their portfolios), but the branch remains underpopulated relative to the commercial importance of stacked image sensors in mobile, automotive, and medical imaging. Entrants focused on pixel-level circuit integration, on-chip signal processing for stacked sensors, or novel bonding schemes for image sensor arrays could pursue meaningful positions in this adjacent space.
Search this in Eureka →How leading players differ by technology route
Strength of each leader across the main technology routes.
| Player | H01L 21 · Semiconductor devices | H01L 23 · Semiconductor devices | H01L 27 · Semiconductor devices | H01L 25 · Semiconductor devices | H01L 29 · Semiconductor devices |
|---|---|---|---|---|---|
| Intel Corporation | Strong · 1,082 | Strong · 821 | Strong · 625 | Moderate · 334 | Strong · 670 |
| Taiwan Semiconductor Manufacturing Co. (TSMC) | Strong · 1,189 | Strong · 1,090 | Moderate · 352 | Moderate · 440 | Emerging · 154 |
| Samsung Electronics Co., Ltd. | Strong · 742 | Strong · 747 | Strong · 532 | Strong · 395 | Moderate · 156 |
| Monolithic 3D Inc. | Strong · 407 | Strong · 412 | Strong · 511 | Moderate · 207 | Strong · 348 |
| Semiconductor Energy Laboratory Co., Ltd. | Strong · 529 | Absent | Strong · 562 | Absent | Strong · 722 |
| International Business Machines Corporation (IBM) | Strong · 590 | Strong · 449 | Moderate · 123 | Emerging · 117 | Moderate · 132 |
| Sony Semiconductor Solutions Corporation | Absent | Moderate · 215 | Strong · 783 | Absent | Absent |
Frequently asked questions
The corpus analyzed contains 11,588 patent families in scope covering 3D IC stacking technology globally.
Taiwan Semiconductor Manufacturing Co. (TSMC) leads with 1,858 patent records, ahead of Samsung Electronics at 1,557 and Intel at 1,515.
Annual filing volume peaked in 2021 at 1,718 patent records and has eased since. Figures for 2024 and 2025 are preliminary due to publication lag and should not be read as the full activity level for those years.
The United States is the leading jurisdiction at 11,906 patent records, followed by Europe (EPO) at 1,681, China at 1,583, WIPO (PCT) at 1,397, Taiwan at 1,230, and Japan at 1,178. Singapore at 343 also features prominently as a regional filing hub.
Among the top filers, Intel shows the strongest recent momentum at +26% versus the prior three-year period, followed by TSMC at +17% and Samsung at +10%. Semiconductor Energy Laboratory (-32%), Sony Semiconductor Solutions (-61%), IBM (-40%), and Sony Group (-82%) have all contracted in recent filings.
The most-cited works in the corpus include patents covering ‘Package systems having interposers’ (1,060 citations), ‘3DIC stacking device and method of manufacture’ (929 citations), and multiple patents on ‘Plasma activated conformal film deposition’ and ‘Plasma activated conformal dielectric film deposition’ (ranging from 634 to 913 citations each), reflecting the foundational importance of packaging architecture and deposition process technology.
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Disclaimer. This page is generated from PatSnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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