3D NAND Patents: Who Leads, Where the Gaps Are 2026
3D NAND scaling and string stacking patents: who controls channel hole and word line count claims
72.6% concentration. The top five assignees hold 1,245 of the 1,714 records in scope — a field where claim space is already staked out at the top. Filings ran from 58 in 2017 to a peak of 253 in 2022. The last complete-year comparison available runs 236 filings in 2021 down to 203 in 2024, a 14% pullback over that span; 2025 and 2026 are still filling in behind the publication lag and should not be read as a fresh drop.
- 1MICRON TECHNOLOGY INC651
- 2SANDISK TECHNOLOGIES LLC315
- 3MACRONIX INTERNATIONAL CO LTD124
- 4SAMSUNG ELECTRONICS CO LTD82
- 5YANGTZE MEMORY TECH CO LTD73
See the full 3d nand scaling and string stacking analysis in Eureka
- The complete ranking, not just the top five
- Every IPC branch with its share of the corpus
- The most-cited records, and where claim space is still thin
Common questions on 3D NAND scaling patents
Who holds the most patents in 3D NAND scaling and string stacking?
One assignee leads the ranked field with 651 of the 1,714 records in scope, well ahead of the fifth-ranked company at 73. The top five assignees combined hold 72.6% of all records, and the top ten hold 87.0%, so the field is heavily concentrated at the top with a long tail of smaller filers making up the rest of the 52-company ranking.
Is 3D NAND patent filing activity slowing down?
Filings peaked in 2022 at 253 and the last fully comparable years show a decline from 236 filings in 2021 to 203 in 2024, a 14% pullback. That is a real cooling but not a collapse. Because patent publication typically lags filing by around 18 months, the 2025 and 2026 figures in any dataset are still incomplete and should not be read as confirmation of a steeper drop.
What technical areas dominate 3D NAND patent claims?
Memory device manufacture (IPC class H10B) appears in 54.5% of the 1,714 records, ahead of general semiconductor device claims (H01L, 51.4%) and static/digital memory claims (G11C, 47.4%). This tells you the sharpest competitive pressure is on how the stack is physically built — channel hole etching, word line formation, CMOS-under-array integration — rather than purely on device-level architecture. Narrower classes like H10D and H10W trail well behind, and AI-adjacent G06N claims are marginal at 1.2% of records.
Disclaimer. This analysis is based on Patsnap Eureka data drawn from a limited snapshot of global patent records and is provided for general information and reference only. Patent data carries inherent limitations — recent filings are under-counted because of publication lag, counts may be on a record or family basis, classification and applicant-name data may contain errors or duplicates, and the underlying search query defines the scope shown — so the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing here is an exhaustive prior-art, novelty, freedom-to-operate or validity search, nor does it constitute legal, financial or professional advice, and it should not be relied upon as such. Verify independently and review with qualified patent and legal professionals before acting on it.
Method: Filing trend and technology composition. Derived from a Patsnap search on 3D NAND Scaling and String Stacking covering 2015–2026, data cut-off 2026-07-31. Counts reflect published records only and shift as new filings publish. Every share divides by all records in scope. Data: Patsnap Eureka. See the full landscape report.