ABF Buildup Substrate Patents: Who Leads, Where the Gaps Are 2026
- One assignee dominates the ranking. The leader holds 18 records against a fifth-place entry of just 2, with no company showing filing activity in the most recent year.
- Semiconductor-adjacent classes dominate the claim space. H01L appears on 93.9% of the 33 records in scope, with H10W close behind at 63.6% — buildup substrate claims are being written as semiconductor device claims, not standalone circuit-board claims.
- Filing peaked in 2020 and has since gone quiet. The trend shows a high of 3 records in 2020, with the most recent full years showing no filings — though publication lag of roughly 18 months means the latest year is always undercounted.
What this landscape covers
ABF (Ajinomoto Build-up Film) buildup substrate manufacturing sits at the intersection of organic package substrate design and semiconductor packaging. The search scope here pulls records that combine buildup film, ABF or organic package substrate terminology with process-control concepts — layer count, dielectric loss, desmear, line width, spacing, registration accuracy and warpage — the parameters that actually determine whether a substrate design is manufacturable at yield. That combination narrows the field to 33 published records, a small but technically dense corpus rather than a broad packaging category.
Because the search terms tie substrate structure directly to process tolerances, the records skew toward assignees who both design the package and control the build process — which explains why the IPC composition leans so heavily on semiconductor device classes rather than generic printed-circuit classes.
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Filing trend and technology composition
The two views below are drawn from the same 33 records: one tracks when filings were published, the other breaks down which IPC subclasses those filings sit in. Because a single record can carry several IPC classes, the subclass shares add up to more than 100% of the record total — that is expected and is not a data error.
Filing trend, 2017-2026
Filings rose to a peak of 3 records in 2020 before tapering; the most recent years show no published records, consistent with an 18-month publication lag rather than a hard stop in R&D activity. With fewer than four complete years of data once that lag is accounted for, no growth rate can be stated reliably.
IPC subclass composition (share of 33 records)
H01L (semiconductor devices) covers 93.9% of records and H10W covers 63.6%, meaning the great majority of buildup substrate claims are framed as semiconductor device or wafer-level packaging claims. H05K (printed circuits and assemblies), the classification a purely board-level filer would use, appears on only 36.4% of records — a signal that most claim activity here originates from chip and package designers, not board fabricators.
Shares are the percentage of the 33 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on ABF Buildup Substrate Manufacturing with Eureka
This page is one run against one query. Ask Eureka your own question about abf buildup substrate manufacturing and every answer comes back with the patent numbers behind it.
Try EurekaThe most-cited record in this corpus
Multi-layer core organic package substrate (US20140262440A1)
A multi-layer core organic package substrate includes: a multi-layer core comprising at least two organic core layers, wherein two of the at least two organic core layers are separated by a core metal layer; a first plurality of build-up layers formed on top of the multi-core layer; and a second plurality of build-up layers formed below the multi-core layer.Filed by XILINX, INC., published 2014-09-18 — the structural approach behind the corpus's most-cited family line.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20140174807A1 | High density organic bridge device and method | 106 |
| 2 | US9236366B2 | High density organic bridge device and method | 18 |
| 3 | US20160133552A1 | High density organic bridge device and method | 16 |
| 4 | US9548264B2 | High density organic bridge device and method | 11 |
| 5 | WO2014098966A1 | High density organic bridge device and method | 10 |
| 6 | US20190019755A1 | High density organic bridge device and method | 7 |
| 7 | WO2017052647A1 | Lithographically defined VIAS for organic package substrate scaling | 6 |
| 8 | US20170125349A1 | High density organic bridge device and method | 5 |
| 9 | US20180233431A1 | Lithographacally defined vias for organic package substrate scaling | 4 |
| 10 | US20140262440A1 | Multi-layer core organic package substrate | 4 |
Citation counts favour older records simply because they have had longer to accumulate citations inside the searched corpus — read them as a signal of influence on later filings, not as a marker of current relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for a filing decision
Three patterns stand out once the ranking, the trend and the IPC breakdown are read together.
One assignee holds the bulk of the ranked records
Across the 7 companies the ranking returns, the leader sits at 18 records while the fifth-ranked entity holds only 2. That gap suggests one organisation built a broad claim position early, while later entrants filed narrowly around specific structural variants rather than contesting the core architecture directly.
Activity has quieted, but publication lag clouds the read
The trend shows filings peaking at 3 records in 2020 with no published records in the most recent years. Given that publication typically lags filing by around 18 months, recent quiet is at least partly an artefact of the data cut-off rather than proof that R&D has stopped.
Buildup substrate claims read as semiconductor device claims
With H01L present on 93.9% of records and H10W on 63.6%, most applicants are framing buildup substrate innovation inside semiconductor device or wafer-level packaging language. A board-fabrication-only filer entering this space should expect to compete against claims drafted from the chip side, not just other substrate specialists.
Co-filing is limited to a small named cluster
Only 3 co-assignee pairs appear in the dataset, all among the same three individual co-inventors. There is no evidence of cross-company joint filing in this corpus, which points to substrate process know-how being held and filed internally rather than developed through disclosed partnerships.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to abf buildup substrate manufacturing, with the prior art for and against each one.
Who is active, and where the field is still open
The ranked assignees split between one large semiconductor-packaging filer, two other named corporations, and a small cluster of individually named co-inventors who filed together on a handful of records.
A single semiconductor packaging filer leads by a wide margin
The top-ranked assignee holds 18 of the records in the ranking, well ahead of any other named party. Its filings anchor the H01L-heavy composition seen across the whole corpus.
Everyone else files narrowly
Beyond the leader, ranked assignees hold only a handful of records each, down to 2 at fifth place. That pattern is typical of a technically constrained niche where most participants stake out a single structural variant rather than a broad portfolio.
No ranked assignee shows recent-year filings
Every assignee tracked for momentum, including the one with a recorded -100% YoY change, shows zero filings in the latest year. Given publication lag, this likely understates current activity rather than confirming the field has gone cold.
| Assignee | Recent year | YoY |
|---|---|---|
| Intel Corporation | 0 | — |
| Xilinx, Inc. | 0 | — |
| Taiwan Semiconductor Manufacturing Company (TSMC) | 0 | -100% |
| ROY MIHIR K | 0 | — |
| LOTZ STEPHANIE M | 0 | — |
| JEN WEI LUN KANE | 0 | — |
| NUCONCEPTS HLDG LLC | 0 | — |
Where to take this analysis
The dataset points to specific next steps depending on whether the goal is freedom-to-operate, portfolio planning or scouting.
Check freedom-to-operate against the leader's claim set
With one assignee holding 18 of the ranked records, any new filing on core buildup layer structures should be checked against that portfolio specifically, not just the corpus generally.
Explore assignee portfolios in EurekaProbe the under-claimed process-parameter branches
Desmear, registration accuracy and warpage-specific claims are thin relative to the structural claims that dominate the corpus, suggesting room for process-level filings.
Run a white space search in EurekaRe-run the trend once lag clears
The apparent drop-off after 2020 is partly a publication-lag artefact; revisiting the trend in a future data cut will clarify whether filing has genuinely slowed.
Track this landscape over time in EurekaCommon questions about ABF buildup substrate patents
ABF stands for Ajinomoto Build-up Film, a resin dielectric material used to build up multiple wiring layers on an organic package substrate for advanced semiconductor packaging. Patent activity in this space concentrates where substrate structure meets manufacturing process control — layer count, line width and spacing, registration accuracy, desmear, dielectric loss and warpage — because those parameters determine whether a design can actually be manufactured at yield. This dataset scopes specifically to filings that combine substrate structure claims with at least one of those process parameters, which is why it returns a focused 33-record corpus rather than a broad packaging category.
Within the 7 companies returned by the assignee ranking for this dataset, one assignee leads clearly with 18 records, compared to just 2 at fifth place. That gap indicates a concentrated position at the top of the ranking, with the remaining ranked entities holding much narrower, more specific claim sets. Note that this ranking reflects only the assignees the data endpoint surfaces for this search scope, not every company active in ABF substrate manufacturing worldwide.
The visible trend peaks at 3 records in 2020 and shows no published filings in the most recent years, but this is very likely a publication-lag effect rather than a real stop in R&D. Patent applications typically take around 18 months to publish after filing, so the most recent one to two years in any filing trend will always look artificially low. A more reliable read on recent activity will only be possible once a later data cut-off has allowed those pending applications to publish.
H01L, the semiconductor devices classification, appears on 93.9% of the 33 records in scope, and H10W appears on 63.6%. Printed circuit and assembly claims under H05K appear on only 36.4% of records, which is lower than might be expected for a substrate-manufacturing topic. This pattern shows that most patent activity in this space is being driven by semiconductor and package designers who frame buildup substrate innovation as part of device or wafer-level packaging claims, rather than by board fabricators filing standalone circuit-board patents.
The IPC composition shows structural device claims (H01L, H10W) heavily represented while specific process-parameter branches — desmear chemistry, registration accuracy control, warpage-compensating layer design, and dielectric loss reduction in the build-up film itself — appear far less often in the corpus. Memory-device-specific substrate builds under H10B also show only a small share of records. Any of these process-level or memory-specific angles represents a narrower, less contested claim space than the core structural territory the leading assignee already occupies.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.