Advanced Packaging Patents: Who Leads, Where the Gaps Are 2026
- 36.8% concentration at the top. The five largest filers account for 1,136 of 3,086 records in scope, but the ranked field runs 100 companies deep with a long tail below tenth place.
- Filings roughly tripled from 2021 to 2024. Complete-year filings rose from 135 in 2021 to 386 in 2024, a 186% increase — the clearest signal in the dataset that packaging claim space is filling fast.
- H01L dominates, but four other subclasses each carry real volume. 69.2% of records sit in semiconductor devices (H01L), while H10W, H05K, H10P and G06F each cover thousands of records worth of adjacent claim territory.
Filing growth compares 2021 (135 records) with 2024 (386) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 3,086 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
This landscape tracks patent activity at the intersection of chiplet integration, advanced semiconductor packaging and the mechanical and electrical elements that make heterogeneous integration work — bonding pads, package substrates, thermal interfaces and electrical connections. The search spans 3,086 published records filed between 2015 and the 2026 data cut-off, drawn from receiving offices led by the United States, WIPO’s PCT route and the European Patent Office. It captures the shift from single-die packaging toward multi-die, multi-material assemblies where thermal and electrical interconnect claims sit alongside the underlying substrate and bonding art.
Because publication lags filing by roughly 18 months, the most recent one to two years in any trend understate real filing activity — 2024 is the last year that can be read as complete, and everything after it will keep rising as records publish.
Filing trends and technology composition
Two views of the same 3,086 records: how filing volume has moved year over year, and which IPC subclasses carry the claim density.
Filing trend, 2017–2026
Filings climbed from 69 in 2017 to a peak of 455 in 2025, with the 2021-to-2024 span alone showing a 186% rise from 135 to 386 complete-year filings. The 2026 figure of 51 is a partial year and should not be read as a slowdown.
Technology composition by IPC subclass
H01L (semiconductor devices) touches 69.2% of the 3,086 records, with H10W close behind at 31.6%. H05K, H10P, G06F, H10B, H10D and G01R each cover a meaningful secondary share — since records can carry multiple classes, these figures add up to more than 100% and should be read as overlapping claim territory rather than a partition.
Shares are the percentage of the 3,086 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Advanced Packaging & Heterogeneous Integration Patent Landscape with Eureka
This page is one run against one query. Ask Eureka your own question about advanced packaging & heterogeneous integration patent landscape and every answer comes back with the patent numbers behind it.
Try EurekaThe most-cited records in this landscape
Package substrate including embedded die and methods of forming the same (US20260165171A1)
Filed by Taiwan Semiconductor Manufacturing Company Limited and published 2026-06-11, this application claims a package substrate built around a core and a dielectric filling layer, with a die embedded in that filling layer. The die carries a device region on one side and a through-silicon via running from that device region through to the opposite side, and the method covers mounting the die on or in the core before forming the dielectric fill.Abstract text drawn directly from the published filing.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US7335972B2 | Heterogeneously integrated microsystem-on-a-chip | 426 |
| 2 | US7242081B1 | Stacked package structure | 423 |
| 3 | US5613861A | Photolithographically patterned spring contact | 408 |
| 4 | US20030119279A1 | Three dimensional device integration method and integrated device | 312 |
| 5 | US7126212B2 | Three dimensional device integration method and integrated device | 300 |
| 6 | US5325265A | High performance integrated circuit chip package | 259 |
| 7 | US9431368B2 | Three dimensional device integration method and integrated device | 233 |
| 8 | US20140254979A1 | Waveguide and semiconductor packaging | 233 |
| 9 | US20030158588A1 | Minimally invasive retinal prosthesis | 218 |
| 10 | US20140185264A1 | Methods and apparatus for forming package-on-packages | 217 |
Citation counts inside this corpus favour older filings that have had more time to accumulate citations — treat them as a signal of historical influence on the field, not of current filing priority.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Three readings of the same dataset, each pointing at a different question a filing or freedom-to-operate review needs answered.
The top is dense but not closed
The five largest assignees hold 36.8% of all 3,086 records, and the top ten hold 45.6% — a meaningful concentration, but one that still leaves more than half the field to a long tail of single- and few-filing entrants. A new entrant is not filing into a monopoly; it is filing into a crowded but not fully occupied space.
Momentum built fast, then flattened at the leaders
Complete-year filings rose from 135 in 2021 to 386 in 2024. At the same time, recent-year momentum among several of the largest named filers is negative year-on-year, which suggests the growth is broadening across the field rather than concentrating further at the historical leaders.
H01L is the densest, but not the only route
H01L absorbs the large majority of records, yet H10W, H05K, H10P and G06F each carry thousands of records' worth of claim activity on printed-circuit assembly, data-processing integration and related subclasses — these secondary classes are where less-crowded claim language is more likely to be found.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to advanced packaging & heterogeneous integration patent landscape, with the prior art for and against each one.
Leading filers and where the gaps sit
The ranked field runs 100 companies deep, led by a foundry, an IDM and a fabless leader, with contract packaging and IP-licensing specialists filling out the tail. Recent-year momentum among several of the largest named filers is falling, which is more consistent with a maturing filing cadence at the top than with reduced overall activity in the field.
A single foundry sets the pace
The leading assignee's record count is more than four times the tenth-place figure of 38, reflecting a foundry-scale filing programme across substrate, bonding and thermal-interface claims tied to its own process nodes.
A sharp drop after the leader
Fifth place sits at 100 records, well below the leader's 440 — the concentration in this field is front-loaded rather than evenly graduated across the ranked list.
Several large filers are pulling back
Named leaders in the momentum data show year-on-year declines ranging from double digits to a full drop-off in the latest year, which given the 18-month publication lag likely reflects incomplete recent-year data as much as any real change in filing intent.
| Assignee | Recent year | YoY |
|---|---|---|
| Qualcomm Inc. | 18 | -38% |
| Intel Corp. | 5 | -67% |
| Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) | 2 | -95% |
| International Business Machines Corporation (IBM) | 1 | -50% |
| SJ Semiconductor (Jiangyin) Corp. | 1 | -50% |
| Adeia Semiconductor Bonding Technologies Inc. | 0 | -100% |
| SILVEBROOK KIA | 0 | -100% |
| Applied Materials, Inc. | 0 | -100% |
Where to take this next
The landscape points to specific next steps depending on whether the question is freedom-to-operate, white space, or competitive tracking.
Map claim language in the under-claimed subclasses
H10W, H05K and G06F carry real volume but sit well below H01L's density — a claim-language pull across just those subclasses will show where language is still open.
Explore in EurekaTrack the leaders' recent filings, not just their totals
Momentum figures suggest filing cadence is shifting even among the largest assignees; a rolling watch on recent publications catches direction changes before the ranking does.
Set up monitoring in EurekaRun a freedom-to-operate check against the most-cited records
The highest-cited patents in this set date back over a decade and still anchor citation networks in heterogeneous integration — worth checking against any new embedded-die or TSV design.
Run a check in EurekaCommon questions about this landscape
The ranked assignee list covers 100 companies, led by a major semiconductor foundry with 440 records, well ahead of the fifth-placed filer at 100 and the tenth-placed filer at 38. The top five combined hold 36.8% of all 3,086 records in scope, and the top ten hold 45.6%, so the field is concentrated at the top but still has a substantial long tail of companies with only a handful of filings each. This mix of a dense top and a long tail is typical of a technology area that is still actively being claimed rather than settled by a small set of incumbents.
Complete-year filings rose from 135 in 2021 to 386 in 2024, a 186% increase, and the field peaked so far at 455 filings in 2025. Because patent publication lags actual filing by roughly 18 months, the 2025 and 2026 figures are still incomplete and should not be read as a plateau or decline — they will keep revising upward as more records publish. On the evidence available, 2021 through 2024 shows sustained, fast growth rather than any slowdown.
H01L, the general semiconductor devices class, covers 69.2% of the 3,086 records in scope, making it the dominant classification by a wide margin. H10W follows at 31.6%, with H05K (printed circuits and assemblies), H10P, G06F, H10B, H10D and G01R each covering a smaller but still meaningful share. Because a single record can carry multiple IPC codes, these percentages overlap rather than sum to 100%, and the secondary classes are often where less-crowded claim language can still be found.
US20260165171A1, filed by Taiwan Semiconductor Manufacturing Company Limited and published in mid-2026, claims a package substrate with a die embedded in a dielectric filling layer, where the die has a through-silicon via running from a device region on one side to the opposite side. Anyone designing a similar embedded-die, TSV-through-device-region substrate should treat this filing as a recent reference point to check claim scope against, particularly around the specific arrangement of core, dielectric fill and TSV path. It does not cover every embedded-die approach, but its claim structure is specific enough that near-identical TSV routing through the device region is worth a closer freedom-to-operate look.
The clearest signal of white space is the gap between H01L's 69.2% share of the 3,086 records and the much smaller shares held by adjacent classes like H05K (9.7%), H10P (8.3%) and G06F (8.1%) — these carry real but comparatively thin filing density. Sub-areas such as thermal interface integration inside TSV stacks, bonding-pad redistribution for chiplet interconnect, and handling-unit identification for die-level traceability show up as under-claimed relative to the core substrate and bonding art. These are not empty fields, but they carry meaningfully less claim density than the core H01L territory, which makes them worth a targeted prior-art pull before committing to a filing strategy there.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.