Advanced Packaging Substrate Patents: Leaders, Trends & Gaps 2026
- Flat filing curve. activity peaked at 3 families in 2024 after a 2022 midpoint of 2, with no sustained upward trend across the window.
- No dominant filer. the strongest co-filing cluster links only three individual inventors, and every tracked assignee shows zero filings in the latest year — this is a fragmented field, not a consolidated one.
- US-centred filing. 17 of 25 records were filed at the USPTO against 4 PCT, 2 EPO, 1 China and 1 Taiwan, meaning most legal effect sits in a single jurisdiction.
What this landscape covers
Advanced packaging substrates sit at the interface between semiconductor die and printed circuit board, and ABF (Ajinomoto Build-up Film) materials are the dielectric layers that make fine-line, low-warpage routing possible in that interface. This dataset tracks 25 patent families filed against a search spanning build-up film, package substrate material and ABF substrate terminology, cross-referenced against claim language on coefficient of thermal expansion, laser drilling, fine line formation, warpage and flip chip package, under IPC classes H01L23, C08G59 and H05K3.
The classification spread — semiconductor packaging (H01L) alongside printed circuit assembly (H05K) and three separate polymer-chemistry classes (C08G, C08J, C08L) — reflects a technology that sits genuinely at the seam between materials science and device packaging, rather than belonging cleanly to either.
Filing trend and technology composition
Twenty-five families is a small corpus, so read the trend as directional rather than statistically firm. It is still large enough to show where classification weight sits and where filing offices concentrate.
A flat curve, not a growth curve
Filings moved from zero in 2017 to a peak of 3 in 2024, passing through 2 at the 2022 midpoint. That is a shallow, uneven climb rather than the steep S-curve typical of a technology entering a growth phase, and the most recent year (2026, partial) will read low until publication catches up — publication typically lags filing by around 18 months, so any apparent 2025–2026 slowdown should be treated with caution.
Packaging and polymer chemistry in near-equal weight
H01L (semiconductor devices) leads at 17 of 25 records, with H05K (printed circuits) and H10W each at 8. The three polymer classes — C08J, C08L and C08G — each appear in 4 to 7 records, confirming that a meaningful share of the claim activity is about the dielectric material itself, not just how it is assembled into a package.
Shares are the percentage of the 25 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Advanced Packaging Substrates and ABF Materials with Eureka
This page is one run against one query. Ask Eureka your own question about advanced packaging substrates and abf materials and every answer comes back with the patent numbers behind it.
Try EurekaThe documents shaping this space
US20250167125A1 — Build-up film and pre-preg substrates in isolation packages
Filed by Texas Instruments, this application describes a semiconductor package substrate built from a build-up film isolation layer flanked by two pre-preg layers, each carrying its own metallization for a separate voltage domain, with solder mask layers top and bottom and two dies coupled to the isolated metallizations.Published 2025-05-22 — recent enough that its citation count has not yet accumulated.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US7411306B2 | Packaging structure and method of an image sensor module | 17 |
| 2 | US20140367149A1 | Resin composition for printed circuit board, build-up film, prepreg and printed circuit board | 10 |
| 3 | US20140124944A1 | Substrate build up layer to achieve both finer design rule and better package coplanarity | 9 |
| 4 | WO2016107649A1 | Peelable copper foils, manufacturing method of coreless substrate, and coreless substrate obtained by the man… | 6 |
| 5 | US20220328387A1 | Package carrier and manufacturing method thereof | 3 |
| 6 | US20210091016A1 | Transformers with build-up films | 3 |
| 7 | CN117887209A | 树脂组合物、增层膜及其制备方法和封装载板 | 2 |
| 8 | US20150181705A1 | Build-up insulating film, printed circuit board including embedded electronic component using the same and me… | 2 |
| 9 | US9040842B2 | Mechanical adhesion of copper metallization to dielectric with partially cured epoxy fillers | 2 |
| 10 | US20240243048A1 | Electronic package, package substrate and manufacturing method thereof | 1 |
Citation counts are drawn from a searched corpus and skew toward older filings; treat them as a measure of influence within this dataset, not of current commercial relevance.
Patent titles are shown in the language they were filed in, not translated, so that each record stays verifiable against the original filing — a translated title will not match in Eureka or in any national register. Each row carries its publication number; clicking a row searches Eureka by that number.
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Three patterns stand out once the citation table and the IPC split are read together: an older core of highly-cited foundational patents, a filing base that has never concentrated, and a jurisdictional footprint weighted almost entirely to the US.
Influence sits with older packaging patents, not build-up film chemistry
US7411306B2, an image-sensor packaging structure, carries the highest citation count in the set at 17, ahead of the next record on build-up film resin composition at 10. The most-cited prior art here is structural, not chemical — a signal that packaging architecture claims have been more heavily built upon than the dielectric material claims.
No filer shows current momentum
Every named assignee in the momentum data, including Texas Instruments and the strongest individual co-filing trio, shows zero filings in the latest tracked year. Combined with only three co-assignee pairs across the whole set, this reads as a field of independent, opportunistic filers rather than a small number of firms racing each other.
Legal effect is concentrated in the US
Seventeen of twenty-five records were filed with the USPTO, versus four PCT applications and single-digit counts at the EPO, CNIPA and TIPO. A freedom-to-operate review built only on US prior art would miss relatively little of this corpus, but it would also miss the small China and Taiwan filings that may matter most for manufacturing-side risk.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to advanced packaging substrates and abf materials, with the prior art for and against each one.
Who is filing, and where the gaps sit
The assignee picture here is unusually thin for a packaging-materials search: individual inventors appear alongside corporate names, and no single organisation has built a filing programme of scale within this window.
Three named inventors form the densest cluster
Nalla Ravi, Jomaa Houssam and Bchir Omar co-appear on four filings each across their three pairings, the strongest co-assignment pattern in the dataset. That is a small, tight group rather than an institutional program, and their momentum has since dropped to zero in the latest tracked year.
Texas Instruments anchors the recent-filing end
Texas Instruments' 2025 application on isolated build-up film substrates is the most recent substantive filing in the set. Beyond it, corporate names in the momentum table — including Nvidia and Samsung Electro-Mechanics via translation — show no recent activity, leaving the current-year field effectively open.
No assignee has scaled a filing program
With a peak of three families in the corpus's best year, no organisation here is running a packaging-substrate patent program at the scale seen in adjacent semiconductor fields. That lowers the bar for a new entrant to establish a credible position quickly.
| Assignee | Recent year | YoY |
|---|---|---|
| Hanwha Yisen Co., Ltd. | 1 | -50% |
| Texas Instruments Incorporated | 0 | — |
| NALLA RAVI | 0 | — |
| JOMAA HOUSSAM | 0 | — |
| BCHIR OMAR | 0 | — |
| NVIDIA Corporation | 0 | — |
| Circuit Foil Luxembourg | 0 | — |
| Samsung Electro-Mechanics Co., Ltd. | 0 | — |
Where to take this
The dataset points to open filing space rather than a crowded one, but the two most-cited prior-art records are worth clearing before committing claim language.
Map claims against the top two cited patents
US7411306B2 and the build-up film resin composition application carry the highest citation counts in this set and are the most likely prior art to be raised in prosecution or opposition.
Run a citation check in Eureka →Test draft claims against the white space list
Dual-voltage isolation layers, peelable coreless processes and warpage-compensating pre-preg stacks all show thin direct coverage in this corpus and are worth a freedom-to-operate pass before drafting.
Explore white space in Eureka →Common questions on ABF substrate patents
ABF, or Ajinomoto Build-up Film, is a dielectric layer used to build multilayer package substrates that route signals between a semiconductor die and a printed circuit board. It is chosen for its low coefficient of thermal expansion and its ability to support fine-line circuit patterns after laser drilling, both of which reduce warpage in thin, high-density packages. This dataset shows build-up film claims sitting across semiconductor device, printed circuit and polymer-chemistry IPC classes, which reflects how central the material is to both the mechanical and electrical performance of the package.
Within this 25-family dataset, no single organisation holds a dominant filing position. Texas Instruments appears with the most recent substantive filing, while the densest co-filing cluster belongs to three individually named inventors rather than a corporate program. That fragmentation is notable given how consolidated adjacent semiconductor packaging fields tend to be, and it suggests the field is still open to new entrants building a focused filing strategy.
Filing activity in this corpus is flat rather than rising: it moved from zero families in 2017 to a peak of three in 2024, passing through two at the 2022 midpoint. That is not a strong growth signal, though the most recent one to two years will read artificially low because publication typically lags filing by around 18 months. A firmer read on 2025-2026 activity will only be possible once those filings publish.
The United States dominates this dataset with 17 of 25 filings, followed by international PCT applications at 4, and single-digit counts at the European Patent Office, CNIPA and TIPO. For a freedom-to-operate review focused on US commercialisation, this corpus is largely US-native; for manufacturing-side risk in Asia, the smaller China and Taiwan filings deserve separate, targeted searching since they are underrepresented here relative to actual regional manufacturing volume.
Based on claim density in this corpus, dual-voltage-domain isolation layers, peelable copper foil coreless processes, laser-drilling parameter claims, warpage-compensating pre-preg stacks and fine-line resin filler formulations all show thinner direct coverage than the core build-up film and packaging structure claims. These are reasonable areas to test a first claim against, though a full clearance search beyond this 25-family sample is advisable before drafting.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.