Book a demo

Advanced Semiconductor Packaging (Chiplet/2.5D) Patent Landscape

Advanced Semiconductor Packaging (Chiplet/2.5D) Patent Landscape
Competitive Landscape
Advanced Semiconductor Packaging (Chiplet/2.5D) Patent Landscape in 2026

The advanced semiconductor packaging (chiplet/2.5D) space is a concentrated, growth-stage field led decisively by Taiwan Semiconductor Manufacturing Co., with the United States as the dominant filing jurisdiction. Multi-year activity is still expanding from a broad base, though annual volume eased from its 2022 peak, and late-period figures remain understated by publication lag.

602
Patent families in scope
45%
Top-5 share of top-100 filers
+33%
3-yr filing growth (lag-adj.)
United States
Leading jurisdiction
↗ Tap any metric to explore the underlying patents and uncover deeper insights in PatSnap Eureka
Published byPatSnap Insights Team··7 min readVerified by PatSnap Eureka data
Overview

TSMC leads a tightly held field with Intel and Qualcomm as credible challengers

Taiwan Semiconductor Manufacturing Co. (TSMC) holds the top position with 120 patent families, nearly 60% more than second-ranked Intel (78 patent families), establishing a clear tier separation at the top of the ranking.

The top five filers — TSMC, Intel, Qualcomm, AMD, and Apple — together account for 45% of the combined total across the hundred largest filers, signaling a moderately concentrated landscape where a small group of integrated device manufacturers and fabless designers set the dominant technical direction.

Leading applicants
#ApplicantPatent familiesShare
1Taiwan Semiconductor Manufacturing Co., Ltd.120
2Intel Corporation78
3Qualcomm Incorporated45
4Advanced Micro Devices, Inc.30
5Apple Inc.25
6International Business Machines Corporation24
7Applied Materials, Inc.20
8Samsung Electronics Co., Ltd.12
9SJ Semiconductor (Jiangyin) Corp.10
10Tokyo Electron Ltd.10
#ApplicantPatent familiesShare
11GlobalFoundries US Inc.9
12National Center for Advanced Packaging Co., Ltd.9
13Adeia Semiconductor Inc.9
14Xilinx, Inc.8
15Micron Technology, Inc.8
16Etron Technology, Inc.8
17Marvell Asia Pte. Ltd.8
1858th Research Institute of China Electronics Technology Group Corporation7
19Industrial Technology Research Institute7
20Adeia Semiconductor Bonding Technologies Inc.6
↗ Hover a row · click a company to ask Eureka

TSMC’s lead reflects its role as both a process innovator and a packaging-platform provider; Intel’s large but declining portfolio suggests a strategic shift in emphasis, while Qualcomm’s sharp recent acceleration indicates growing offensive investment in chiplet interconnect IP.

The most recent 18–24 months of filings are systematically under-counted due to patent publication lag; apparent softness in 20232025 data should not be read as a real slowdown. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.

Source: PatSnap Eureka. Chart shows the top applicants ranked by patent families. Applicant counts can overlap where a patent family lists several applicants, so they need not sum to the total in scope.Explore deeper in Eureka →
Trends & Structure

Sustained growth from 2019 onward, dominated by core semiconductor device IP

The filing trend chart and technology composition chart together show a field that scaled rapidly from 2019 and is still technically anchored in semiconductor device architecture, with meaningful but smaller adjacent branches signaling diversification.

Annual filing trend

Filings climbed sharply from 2019 through a 2022 peak, then moderated in 2023 before partially recovering in 2024; 2025 and 2026 figures are heavily understated by publication lag and should not be interpreted as a real decline. The 33% growth over the recent three-year window versus the prior three-year window confirms the field is still expanding on a multi-year basis.

Annual filing trendAnnual values from 2017 to 2026, peaking at 105 in 2022.282017272018482019682020952021105202280202396202453202522026↗ Hover for values · click a bar to ask Eureka

Technology composition

H01L (semiconductor devices) dominates the branch mix by a wide margin, reflecting the core die-attach, interconnect, and integration focus of chiplet and 2.5D architectures. H10W, G06F (digital data processing), H10B (memory device manufacture), and H10D (semiconductor devices, general) form a secondary tier, indicating that system-level integration and memory co-packaging are growing areas of technical activity.

Technology compositionH01L · Semiconductor devices leads with 709; H10W 128.H01L · Semiconductor dev…709H10W128G06F · Electric digital …57H10B · Memory device man…55H10D · Semiconductor dev…43H05K · Printed circuits …24H10P24G11C · Static & digital …23↗ Hover for values · click a bar to ask Eureka
Source: PatSnap Eureka. Technology-branch counts are measured in patent records; a single patent family can carry several IPC classes, so class totals can exceed the family total in scope.Explore deeper in Eureka →
Key Patents

Highly cited patent families surfaced by the query

Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.

Featured patent
US20240088008A1Published 2024-03-14

Fan-out packaging unit used in pop packaging and m…

Sj SEMICONDUCTOR(JIANGYIN) Corporation

A fan-out packaging unit of Package-on-Package (PoP) structure and a method for manufacturing the same are disclosed. The method includes steps of: forming a first rewiring layer on a substrate; forming a hybrid bonding structure between a first surface of the first rewiring layer and semiconductor chips, wherein the hybrid bonding structure comprises a… (excerpt from the patent abstract)

Fan-out packaging unit used in pop packaging and m… — patent drawingFan-out packaging unit used in pop packaging and m… — patent drawing
Representative drawings from the patent document.
Open this patent in Eureka →
Highly cited patent families surfaced by this query
#PatentCitations
13D IC method and device537
2Three-dimensional integrated circuit structure hav…272
33D IC method and device244
4Systems and methods for releveled bump planes for …155
5Novel semiconductor system and device127
6Through silicon via design for stacking integrated…122
7Electrostatic discharge structure for 3-dimensiona…111
8Antenna cavity structure for integrated patch ante…110

Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.

Source: PatSnap Eureka. Citation-ranked patent families surfaced by this query.Open in Eureka →
Insights

What the portfolio structure means for packaging R&D investment decisions

The combination of growth-stage dynamics, a concentrated leader set, selective cross-organizational collaboration, and U. S.-heavy jurisdiction coverage defines the strategic context for any new entrant or incumbent expanding into chiplet/2.5D IP.

Growth

Growth stage, past its 2022 volume peak but still expanding on a multi-year basis

The field is classified as Growth: the recent three-year filing window is 33% above the prior three-year window, confirming net expansion. Annual volume peaked in 2022 and has moderated since, but publication lag means the apparent softness in 2023–2025 overstates any real deceleration. Core integration concepts (3D IC, through-silicon via) are well-staked; the differentiation frontier has moved toward heterogeneous integration system design and thermal management.

Growth · past 2022 peak
Concentration

Top-heavy structure with a meaningful mid-tier of challengers

The top five filers hold 45% of the combined total among the hundred largest filers, with TSMC alone at 120 patent families — nearly double Intel’s 78. Below the top two, Qualcomm (45 families), AMD (30 families), and Apple (25 families) form a credible challenger tier. The presence of research institutes and Chinese packaging specialists in the lower ranks (SJ Semiconductor, National Center for Advanced Packaging) suggests that competitive pressure is broadening geographically.

Concentrated · clear leader
Collaboration

Collaboration is limited and mostly intra-corporate or foundry-design partnerships

TSMC and GUC (Global Unichip Corporation) have co-filed 2 patent families, reflecting the foundry-design-house relationship central to chiplet platform development. IBM and IBM United Kingdom co-filed 2 families, indicating coordinated cross-entity prosecution within the IBM group. AMD and ATI Technologies co-filed 1 family, consistent with historical corporate integration. Cross-organization R&D collaboration is sparse, suggesting that most IP is developed and held within single entities rather than through open consortia.

Low cross-org collaboration
Geography

U.S.-centric filing with China as a meaningful secondary market

The United States accounts for the largest share of patent records filed across all jurisdictions, reflecting both the location of leading applicants and the strategic importance of U.S. market protection. China ranks second, underscoring the growing domestic packaging ecosystem and the importance of freedom-to-operate in that market. WIPO (PCT) and European (EPO) filings provide a global prosecution layer, while Taiwan, South Korea, and Japan reflect the Asia-Pacific manufacturing concentration. India’s presence is notable for an early-stage filing jurisdiction.

U.S.-led · China rising
PatSnap Eureka · TRIZ Solution Agent
Facing a specific technical bottleneck in this field?

Go beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.

Solve it in Eureka →
Top collaboration links
ApplicantCollaboratorCo-filings
Taiwan Semiconductor Manufacturing Co., Ltd.Global Unichip Corporation2
International Business Machines CorporationIBM United Kingdom Ltd.2
Advanced Micro Devices, Inc.ATI Technologies ULC1

Co-filing pairs, ranked by the number of jointly-filed patent families.

Source: PatSnap Eureka. Collaboration pairs drawn from co-applicant records; jurisdiction counts are at the patent-record level.Explore insights →
Leaders

TSMC and Intel lead by volume; Qualcomm and AMD show the strongest recent momentum

The leader set is dominated by integrated foundries and fabless designers, all concentrated in core H01L semiconductor device classes. Momentum diverges sharply: TSMC is stable, Intel is declining, and Qualcomm is accelerating.

Leader · Taiwan Semiconductor Manufacturing Co.

Taiwan Semiconductor Manufacturing Co.

TSMC leads the corpus with 120 patent families, concentrated across H01L 23, H01L 25, and H01L 21 — covering packaging structure, multi-die assemblies, and process integration respectively. Its recent-period filing trend is essentially flat at +3%, indicating a sustained and deliberate prosecution strategy rather than aggressive new filing. TSMC’s breadth across all three H01L sub-classes reflects its role as both the process node owner and the packaging platform provider for chiplet ecosystems.

families: 120
Challenger · Intel Corporation

Intel Corporation

Intel holds 78 patent families, the second-largest portfolio, with its technical focus evenly split between H01L 25 (multi-die assemblies) and H01L 23 (packaging structures), reflecting its Foveros and EMIB platform investments. However, its recent filing trend shows a sharp –51% decline versus the prior period, suggesting a meaningful reduction in new IP generation in this space — whether through portfolio rationalization, strategic pivot, or licensing-out activity. AMD (30 families, +36% trend) and Qualcomm (45 families, +91% trend) are the most aggressive challengers by momentum.

families: 78
🔍
See the full applicant breakdown
Access ranked profiles for all top 100 filers, including momentum trends and technology focus maps.
Qualcomm Inc.Samsung Electronics Co. Ltd.+ more
Unlock full assignee analysis →
Leading-applicant momentum (recent 3 yrs, lag-adjusted)
ApplicantRecent (3 yrs)Trend
Taiwan Semiconductor Manufacturing Co., Ltd.38▬ +3%
Intel Corporation20▼ -51%
Qualcomm Incorporated21▲ +91%
Advanced Micro Devices, Inc.15▲ +36%
Apple Inc.10▲ new entrant
International Business Machines Corporation14▲ new entrant
Applied Materials, Inc.7▼ -42%
Samsung Electronics Co., Ltd.12▲ new entrant
Source: PatSnap Eureka. Applicant rankings are by patent family count; momentum compares the most recent three-year filing window to the prior three-year window.Explore players →
Adjacent Branches

Under-served branches in data processing integration and printed circuit assembly

Several IPC classes adjacent to the dominant H01L core show relatively sparse coverage in this corpus, representing areas where technical activity exists but dedicated chiplet/2.5D IP has not yet accumulated in depth.

G06F · System-level digital data processing integration

G06F (electric digital data processing) accounts for 57 patent records — roughly 5% of the branch total — despite chiplet architectures being fundamentally motivated by system-level compute disaggregation. This sparsity suggests that software-hardware co-design, die-to-die protocol stacks, and chiplet coherency architectures are underrepresented in formal IP. For teams working on chiplet interconnect standards (UCIe, CXL) or heterogeneous compute orchestration, this branch offers a realistic entry path with low incumbent density relative to its technical relevance.

Search this in Eureka →

H05K · Printed circuits, substrate assemblies, and advanced packaging substrates

H05K (printed circuits and assemblies) appears in only 24 patent records — about 2% of the branch total — even though advanced organic substrates, redistribution layers, and fan-out panel packaging are central enablers of 2.5D integration. The low count likely reflects that substrate IP is often filed by EMS and substrate vendors outside the dominant applicant set. Teams developing next-generation packaging substrates, embedded bridge technologies, or panel-level fan-out processes could find relatively open ground in this branch, particularly in combination with H01L claims.

Search this in Eureka →
🔒
Unlock the full white-space map
See all adjacent IPC branches ranked by sparsity score, with entry-path analysis and competitor density overlays.
H10B · Memory device manufacture (co-packaging)F25B · Thermal management and refrigeration for high-density packages+ more
Unlock full analysis →
Source: PatSnap Eureka. Branch share figures are relative to total IPC branch records in this corpus; sparsity is an observation of relative filing density, not a validated market opportunity.Explore emerging →
Route Matrix

How leaders differ across technology routes: packaging structure, multi-die assembly, and process

Route coverage across the main technology branches in the current evidence set.

PlayerH01L 23 · Semiconductor devicesH01L 25 · Semiconductor devicesH01L 21 · Semiconductor devicesH01L 27 · Semiconductor devicesH10W 20
Taiwan Semiconductor Manufacturing Co., Ltd.Strong · 110Strong · 96Strong · 76Emerging · 12Emerging · 7
Intel CorporationStrong · 70Strong · 71Moderate · 34Emerging · 5Emerging · 9
Qualcomm IncorporatedStrong · 41Strong · 37Moderate · 19Emerging · 4Emerging · 2
Apple Inc.Strong · 25Strong · 22Strong · 14AbsentEmerging · 4
Advanced Micro Devices, Inc.Strong · 23Strong · 29Moderate · 8AbsentAbsent
International Business Machines CorporationStrong · 21Strong · 22Moderate · 9Emerging · 2Absent
Applied Materials, Inc.Strong · 18AbsentStrong · 17Emerging · 3Moderate · 4
Source: PatSnap Eureka. Matrix values are measured in patent records and should not be compared directly with family-level applicant totals.Compare in Eureka →
Frequently asked questions

Frequently asked questions

Still have questions? PatSnap Eureka answers them from patent and research data.Ask Eureka →
PatSnap Eureka

Ready to map your own semiconductor packaging landscape?

Join 18,000+ innovators using PatSnap Eureka to map any technology landscape: search 2B+ patents and papers, surface key assignees, and generate a report like this in minutes.

18,000+innovators worldwide
2B+patents & papers
< 5 minper landscape report

Disclaimer. This page is generated from PatSnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.

Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.

Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. PatSnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.

Explore in Eureka ↗
Powered by PatSnap Eureka

Help us improve this page

Found incorrect or outdated information? Let us know and we'll get it fixed.