Advanced Semiconductor Packaging (Chiplet/2.5D) Patent Landscape
The advanced semiconductor packaging (chiplet/2.5D) space is a concentrated, growth-stage field led decisively by Taiwan Semiconductor Manufacturing Co., with the United States as the dominant filing jurisdiction. Multi-year activity is still expanding from a broad base, though annual volume eased from its 2022 peak, and late-period figures remain understated by publication lag.
TSMC leads a tightly held field with Intel and Qualcomm as credible challengers
Taiwan Semiconductor Manufacturing Co. (TSMC) holds the top position with 120 patent families, nearly 60% more than second-ranked Intel (78 patent families), establishing a clear tier separation at the top of the ranking.
The top five filers — TSMC, Intel, Qualcomm, AMD, and Apple — together account for 45% of the combined total across the hundred largest filers, signaling a moderately concentrated landscape where a small group of integrated device manufacturers and fabless designers set the dominant technical direction.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co., Ltd. | 120 | |
| 2 | Intel Corporation | 78 | |
| 3 | Qualcomm Incorporated | 45 | |
| 4 | Advanced Micro Devices, Inc. | 30 | |
| 5 | Apple Inc. | 25 | |
| 6 | International Business Machines Corporation | 24 | |
| 7 | Applied Materials, Inc. | 20 | |
| 8 | Samsung Electronics Co., Ltd. | 12 | |
| 9 | SJ Semiconductor (Jiangyin) Corp. | 10 | |
| 10 | Tokyo Electron Ltd. | 10 |
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 11 | GlobalFoundries US Inc. | 9 | |
| 12 | National Center for Advanced Packaging Co., Ltd. | 9 | |
| 13 | Adeia Semiconductor Inc. | 9 | |
| 14 | Xilinx, Inc. | 8 | |
| 15 | Micron Technology, Inc. | 8 | |
| 16 | Etron Technology, Inc. | 8 | |
| 17 | Marvell Asia Pte. Ltd. | 8 | |
| 18 | 58th Research Institute of China Electronics Technology Group Corporation | 7 | |
| 19 | Industrial Technology Research Institute | 7 | |
| 20 | Adeia Semiconductor Bonding Technologies Inc. | 6 |
TSMC’s lead reflects its role as both a process innovator and a packaging-platform provider; Intel’s large but declining portfolio suggests a strategic shift in emphasis, while Qualcomm’s sharp recent acceleration indicates growing offensive investment in chiplet interconnect IP.
The most recent 18–24 months of filings are systematically under-counted due to patent publication lag; apparent softness in 2023–2025 data should not be read as a real slowdown. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Sustained growth from 2019 onward, dominated by core semiconductor device IP
The filing trend chart and technology composition chart together show a field that scaled rapidly from 2019 and is still technically anchored in semiconductor device architecture, with meaningful but smaller adjacent branches signaling diversification.
Annual filing trend
Filings climbed sharply from 2019 through a 2022 peak, then moderated in 2023 before partially recovering in 2024; 2025 and 2026 figures are heavily understated by publication lag and should not be interpreted as a real decline. The 33% growth over the recent three-year window versus the prior three-year window confirms the field is still expanding on a multi-year basis.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (semiconductor devices) dominates the branch mix by a wide margin, reflecting the core die-attach, interconnect, and integration focus of chiplet and 2.5D architectures. H10W, G06F (digital data processing), H10B (memory device manufacture), and H10D (semiconductor devices, general) form a secondary tier, indicating that system-level integration and memory co-packaging are growing areas of technical activity.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Fan-out packaging unit used in pop packaging and m…
A fan-out packaging unit of Package-on-Package (PoP) structure and a method for manufacturing the same are disclosed. The method includes steps of: forming a first rewiring layer on a substrate; forming a hybrid bonding structure between a first surface of the first rewiring layer and semiconductor chips, wherein the hybrid bonding structure comprises a… (excerpt from the patent abstract)


| # | Patent | Citations |
|---|---|---|
| 1 | 3D IC method and device | 537 |
| 2 | Three-dimensional integrated circuit structure hav… | 272 |
| 3 | 3D IC method and device | 244 |
| 4 | Systems and methods for releveled bump planes for … | 155 |
| 5 | Novel semiconductor system and device | 127 |
| 6 | Through silicon via design for stacking integrated… | 122 |
| 7 | Electrostatic discharge structure for 3-dimensiona… | 111 |
| 8 | Antenna cavity structure for integrated patch ante… | 110 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the portfolio structure means for packaging R&D investment decisions
The combination of growth-stage dynamics, a concentrated leader set, selective cross-organizational collaboration, and U. S.-heavy jurisdiction coverage defines the strategic context for any new entrant or incumbent expanding into chiplet/2.5D IP.
Growth stage, past its 2022 volume peak but still expanding on a multi-year basis
The field is classified as Growth: the recent three-year filing window is 33% above the prior three-year window, confirming net expansion. Annual volume peaked in 2022 and has moderated since, but publication lag means the apparent softness in 2023–2025 overstates any real deceleration. Core integration concepts (3D IC, through-silicon via) are well-staked; the differentiation frontier has moved toward heterogeneous integration system design and thermal management.
Growth · past 2022 peakTop-heavy structure with a meaningful mid-tier of challengers
The top five filers hold 45% of the combined total among the hundred largest filers, with TSMC alone at 120 patent families — nearly double Intel’s 78. Below the top two, Qualcomm (45 families), AMD (30 families), and Apple (25 families) form a credible challenger tier. The presence of research institutes and Chinese packaging specialists in the lower ranks (SJ Semiconductor, National Center for Advanced Packaging) suggests that competitive pressure is broadening geographically.
Concentrated · clear leaderCollaboration is limited and mostly intra-corporate or foundry-design partnerships
TSMC and GUC (Global Unichip Corporation) have co-filed 2 patent families, reflecting the foundry-design-house relationship central to chiplet platform development. IBM and IBM United Kingdom co-filed 2 families, indicating coordinated cross-entity prosecution within the IBM group. AMD and ATI Technologies co-filed 1 family, consistent with historical corporate integration. Cross-organization R&D collaboration is sparse, suggesting that most IP is developed and held within single entities rather than through open consortia.
Low cross-org collaborationU.S.-centric filing with China as a meaningful secondary market
The United States accounts for the largest share of patent records filed across all jurisdictions, reflecting both the location of leading applicants and the strategic importance of U.S. market protection. China ranks second, underscoring the growing domestic packaging ecosystem and the importance of freedom-to-operate in that market. WIPO (PCT) and European (EPO) filings provide a global prosecution layer, while Taiwan, South Korea, and Japan reflect the Asia-Pacific manufacturing concentration. India’s presence is notable for an early-stage filing jurisdiction.
U.S.-led · China risingGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. | Global Unichip Corporation | 2 |
| International Business Machines Corporation | IBM United Kingdom Ltd. | 2 |
| Advanced Micro Devices, Inc. | ATI Technologies ULC | 1 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC and Intel lead by volume; Qualcomm and AMD show the strongest recent momentum
The leader set is dominated by integrated foundries and fabless designers, all concentrated in core H01L semiconductor device classes. Momentum diverges sharply: TSMC is stable, Intel is declining, and Qualcomm is accelerating.
Taiwan Semiconductor Manufacturing Co.
TSMC leads the corpus with 120 patent families, concentrated across H01L 23, H01L 25, and H01L 21 — covering packaging structure, multi-die assemblies, and process integration respectively. Its recent-period filing trend is essentially flat at +3%, indicating a sustained and deliberate prosecution strategy rather than aggressive new filing. TSMC’s breadth across all three H01L sub-classes reflects its role as both the process node owner and the packaging platform provider for chiplet ecosystems.
families: 120Intel Corporation
Intel holds 78 patent families, the second-largest portfolio, with its technical focus evenly split between H01L 25 (multi-die assemblies) and H01L 23 (packaging structures), reflecting its Foveros and EMIB platform investments. However, its recent filing trend shows a sharp –51% decline versus the prior period, suggesting a meaningful reduction in new IP generation in this space — whether through portfolio rationalization, strategic pivot, or licensing-out activity. AMD (30 families, +36% trend) and Qualcomm (45 families, +91% trend) are the most aggressive challengers by momentum.
families: 78| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. | 38 | ▬ +3% |
| Intel Corporation | 20 | ▼ -51% |
| Qualcomm Incorporated | 21 | ▲ +91% |
| Advanced Micro Devices, Inc. | 15 | ▲ +36% |
| Apple Inc. | 10 | ▲ new entrant |
| International Business Machines Corporation | 14 | ▲ new entrant |
| Applied Materials, Inc. | 7 | ▼ -42% |
| Samsung Electronics Co., Ltd. | 12 | ▲ new entrant |
Under-served branches in data processing integration and printed circuit assembly
Several IPC classes adjacent to the dominant H01L core show relatively sparse coverage in this corpus, representing areas where technical activity exists but dedicated chiplet/2.5D IP has not yet accumulated in depth.
G06F · System-level digital data processing integration
G06F (electric digital data processing) accounts for 57 patent records — roughly 5% of the branch total — despite chiplet architectures being fundamentally motivated by system-level compute disaggregation. This sparsity suggests that software-hardware co-design, die-to-die protocol stacks, and chiplet coherency architectures are underrepresented in formal IP. For teams working on chiplet interconnect standards (UCIe, CXL) or heterogeneous compute orchestration, this branch offers a realistic entry path with low incumbent density relative to its technical relevance.
Search this in Eureka →H05K · Printed circuits, substrate assemblies, and advanced packaging substrates
H05K (printed circuits and assemblies) appears in only 24 patent records — about 2% of the branch total — even though advanced organic substrates, redistribution layers, and fan-out panel packaging are central enablers of 2.5D integration. The low count likely reflects that substrate IP is often filed by EMS and substrate vendors outside the dominant applicant set. Teams developing next-generation packaging substrates, embedded bridge technologies, or panel-level fan-out processes could find relatively open ground in this branch, particularly in combination with H01L claims.
Search this in Eureka →How leaders differ across technology routes: packaging structure, multi-die assembly, and process
Route coverage across the main technology branches in the current evidence set.
| Player | H01L 23 · Semiconductor devices | H01L 25 · Semiconductor devices | H01L 21 · Semiconductor devices | H01L 27 · Semiconductor devices | H10W 20 |
|---|---|---|---|---|---|
| Taiwan Semiconductor Manufacturing Co., Ltd. | Strong · 110 | Strong · 96 | Strong · 76 | Emerging · 12 | Emerging · 7 |
| Intel Corporation | Strong · 70 | Strong · 71 | Moderate · 34 | Emerging · 5 | Emerging · 9 |
| Qualcomm Incorporated | Strong · 41 | Strong · 37 | Moderate · 19 | Emerging · 4 | Emerging · 2 |
| Apple Inc. | Strong · 25 | Strong · 22 | Strong · 14 | Absent | Emerging · 4 |
| Advanced Micro Devices, Inc. | Strong · 23 | Strong · 29 | Moderate · 8 | Absent | Absent |
| International Business Machines Corporation | Strong · 21 | Strong · 22 | Moderate · 9 | Emerging · 2 | Absent |
| Applied Materials, Inc. | Strong · 18 | Absent | Strong · 17 | Emerging · 3 | Moderate · 4 |
Frequently asked questions
Taiwan Semiconductor Manufacturing Co. (TSMC) leads with 120 patent families, followed by Intel (78 patent families) and Qualcomm (45 patent families). These three together represent the top tier of a moderately concentrated field.
Yes, on a multi-year basis. Recent three-year filings are 33% above the prior three-year window, confirming the field is in a Growth stage. Annual volume peaked in 2022 and has eased since, but the most recent years are understated by publication lag and should not be read as a real decline.
The United States accounts for the largest share of patent records across all jurisdictions, reflecting the concentration of leading applicants and the strategic importance of U.S. IP protection. China is the second-largest jurisdiction, followed by WIPO (PCT), Europe (EPO), and Taiwan.
Qualcomm shows the strongest recent momentum at +91% in its most recent three-year window versus the prior period. AMD is up +36%, and Samsung Electronics, Apple, and IBM each entered the recent filing window as new entrants. Intel, by contrast, is down -51% in recent filings.
The most-cited work covers foundational 3D IC methods and devices (537 and 244 citations respectively), three-dimensional integrated circuit structures (272 citations), systems for releveled bump planes (155 citations), and through-silicon via designs for stacked integrated circuits (122 citations). These represent the core prior art stack for chiplet and 2.5D integration.
G06F (electric digital data processing, 57 records) and H05K (printed circuits and assemblies, 24 records) are the most notable adjacent branches with low filing density relative to their technical relevance to chiplet architectures. H10B (memory device manufacture) and H10D (semiconductor devices, general) also show relatively sparse coverage at 55 and 43 records respectively.
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Disclaimer. This page is generated from PatSnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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