ADC Architecture Patents: Top Companies & Filing Trends 2026
- Filing has plateaued, not grown. Annual filings rose to a peak of 108 in 2021, sat near that level through 2022 (105), and the visible trend since is flat to declining — though the two most recent years are undercounted due to publication lag.
- Claim density is lopsided by IPC subclass. H03M (coding & code conversion) carries 2,156 of 2,271 records; every other subclass, including measurement (G01R) and transmission (H04B), trails by an order of magnitude or more.
- Filing is US-centric with a thin cross-border tail. The US receiving office accounts for 1,219 records against 288 at the EPO and 208 in China, and only ten co-assignee pairings appear across the whole corpus.
Filing growth compares 2021 (108 records) with 2024 (71) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 2,271 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
This dataset tracks patent families filed against successive-approximation, sigma-delta and time-interleaved ADC architectures, filtered to documents that make explicit claims around sampling rate, SNDR, calibration or power-efficiency figure of merit. The search spans H03M1, H03M3 and G01R19 classifications, covering 2,271 published families filed between 2017 and 2026.
Because publication lags filing by roughly eighteen months, the 2025 and 2026 figures in any trend chart understate real filing activity; treat the last two data points as provisional rather than a genuine downturn signal.
Filing trend and technology composition
Two views of the same corpus: annual filing counts show where momentum has gone, and the IPC breakdown shows where claim space is already occupied versus merely adjacent.
A peak in 2021, then a plateau
Filings climbed from 59 in 2017 to a peak of 108 in 2021, held near that level at 105 in 2022, and the recorded trend since reads flat to declining. Given the 18-month publication lag, the 2025-2026 tail is best read as incomplete rather than as a genuine collapse in filing activity.
H03M dominates; everything else is peripheral
H03M (coding and code conversion) covers 2,156 of the 2,271 records — nearly the entire corpus. G01R (electric and magnetic measurement, 144), H04B (transmission, 102) and G06F (digital data processing, 90) appear as adjacent claim territory rather than core architecture, with H03H, H03K, H04N and H04L each contributing a smaller slice.
Shares are the percentage of the 2,271 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Analog-to-Digital Converter Architectures with Eureka
This page is one run against one query. Ask Eureka your own question about analog-to-digital converter architectures and every answer comes back with the patent numbers behind it.
Try EurekaRepresentative and most-cited filings
US6924755B1 — Multi-channel ADC with calibration of channel offset and gain
A multi-channel analog to digital converter which facilitates calibration of the analog to digital converter and respective input channels to the analog to digital converter, and a method for calibrating the analog to digital converter. A multi-channel ADC comprising an ADC circuit for converting analog signals received on input channels CH1 to CHN to digital output signals comprises a primary offset storing register and a primary gain storing register for storing respective primary offset and gain correction codes which are applied to the digital output signals in a primary correcting circuit for correcting for the offset and gain errors across channels.Filed by Analog Devices, Inc., granted 2005-08-02 — predates most of the corpus and is a useful reference point for calibration claim scope.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US8031094B2 | Touch controller with improved analog front end | 902 |
| 2 | US20110063154A1 | Touch controller with improved analog front end | 388 |
| 3 | US5736847A | Power meter for determining parameters of muliphase power lines | 246 |
| 4 | US5982315A | Multi-loop SIGMA DELTA analog to digital converter | 223 |
| 5 | US6246258B1 | Realizing analog-to-digital converter on a digital programmable integrated circuit | 195 |
| 6 | US6185508B1 | Power meter for determining parameters of multi-phase power lines | 177 |
| 7 | US6694270B2 | Phasor transducer apparatus and system for protection, control, and management of electricity distribution sy… | 172 |
| 8 | US5408235A | Second order Sigma-Delta based analog to digital converter having superior analog components and having a pro… | 163 |
| 9 | US5329281A | Analog to digital converter with autoranging offset | 138 |
| 10 | US6243034B1 | Integrating analog to digital converter with improved resolution | 137 |
Citation counts favour older filings simply because they've had longer to accumulate citations within a searched corpus; treat this table as a map of past influence, not current competitive priority.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Three patterns stand out once the raw counts are put in context: where the claim space is saturated, where citation weight sits, and where filing geography concentrates risk.
Core architecture claims are nearly all in one subclass
H03M holds almost the entire corpus. A new SAR or sigma-delta architecture claim is filing into the most densely occupied classification in the dataset, not a sparse one — freedom-to-operate work should start here, not at the adjacent subclasses.
Filing strategy is still US-anchored
The United States receiving office carries more than half of all records, more than four times the EPO count and nearly six times China's. A design-around or clearance search that skips the US office is skipping the majority of the prior art.
Co-filing is rare and narrow
Only ten co-assignee pairs appear across 2,271 families, and the strongest pairing is a foundry-and-design-house relationship rather than a cross-industry alliance. Most activity in this space is filed by single assignees working alone.
Recent-year activity has gone quiet across named assignees
Several of the assignees tracked for recent-year momentum show zero filings in the latest year, with year-over-year drops of 50% to 100% among those that filed at all. Read this alongside the publication lag: it likely reflects reporting delay as much as an actual pullback.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to analog-to-digital converter architectures, with the prior art for and against each one.
Who is filing, and where the gate sits
The named assignees in the recent-momentum data show near-zero latest-year activity, consistent with publication lag rather than a genuine exit from the field. The overall filing pattern — heavy H03M concentration, thin co-filing, US-anchored geography — points to a small set of incumbents defending established architecture claims while everyone else files singly.
Established players show a pullback in the most recent year
Assignees tracked for recent momentum, including Texas Instruments, all show flat or declining latest-year counts. This is consistent with the corpus-wide publication lag rather than a real strategic exit, but it does mean the newest public record is thin for these names.
Solo filing is the norm, not the exception
With only ten co-assignee pairings identified, most ADC architecture patents in this corpus are filed by a single entity. The strongest pairing links a foundry to a design-house partner, suggesting the rare collaborations that do exist follow a manufacturing relationship rather than a joint-research one.
The US office is the primary gate to clear
More than half of all records in this corpus sit at the US receiving office. Any clearance search or licensing negotiation that treats the EPO or CNIPA filings as the primary battleground is looking in the wrong place first.
| Assignee | Recent year | YoY |
|---|---|---|
| Texas Instruments Incorporated | 1 | -50% |
| Sigma Sense Technology Co., Ltd. | 0 | -100% |
| Analog Devices, Inc. | 0 | — |
| Broadcom Inc. | 0 | — |
| Realtek Semiconductor Corp. | 0 | -100% |
| NXP B.V. | 0 | -100% |
| Qualcomm Incorporated | 0 | — |
| Microchip Technology Incorporated | 0 | — |
Where to take this next
The landscape data points to specific next steps depending on whether the goal is clearance, licensing or new architecture filing.
Run a freedom-to-operate check against H03M
With 2,156 of 2,271 records sitting in H03M, any new SAR or sigma-delta claim needs a targeted clearance search in that subclass before drafting, not a broad scan across all eight IPC codes in this corpus.
Explore ADC prior art in EurekaWatch the US receiving office first
Over half of all filings route through the US office. A monitoring watch that starts there, then expands to EPO and CNIPA, will catch competitive activity earlier than a jurisdiction-balanced approach.
Set up assignee tracking in EurekaTest the under-claimed branches for a first-filer position
Time-interleaved skew calibration and power-efficiency figure-of-merit circuits show thinner claim density than the H03M core, which may leave room for a defensible first claim.
Map white space in EurekaCommon questions about ADC architecture patents
Successive-approximation and sigma-delta architectures dominate this corpus, which is classified almost entirely under H03M (coding and code conversion) — 2,156 of 2,271 records. That concentration means claim space around core conversion techniques, calibration schemes and quantization is already densely occupied. Anyone drafting a new architecture claim in this space should expect to find substantial prior art and should search H03M first before assuming an idea is novel.
Filings rose from 59 in 2017 to a peak of 108 in 2021, held near that level at 105 in 2022, and the visible trend afterward reads flat to declining. However, patent publication typically lags filing by around eighteen months, so the 2025 and 2026 figures in this dataset are understated and should not be read as a genuine collapse in R&D activity. The honest read is a mature, plateaued filing rate rather than either strong growth or a real decline.
The recent-year momentum data tracks assignees including Texas Instruments alongside several others, most of which show flat or zero filings in the latest recorded year. That pattern is consistent across the tracked set and most likely reflects publication lag rather than an actual exit from the field. A representative early filing worth reviewing for calibration claim scope is US6924755B1, assigned to Analog Devices, which covers multi-channel offset and gain calibration.
The clearest under-claimed territory sits adjacent to the dominant H03M core: time-interleaved ADC skew calibration, power-efficiency figure-of-merit optimisation circuits, and cross-domain ADC-filter co-design touching H03H all show materially thinner filing density than the core coding and conversion claims. These branches are still tied to the same commercial architectures, which makes them a more realistic filing target than an entirely new conversion technique. A first claim there would typically need to tie a specific calibration or efficiency metric to a concrete circuit implementation rather than claim the metric in the abstract.
The US receiving office accounts for 1,219 of the records in this corpus, more than four times the EPO's 288 and close to six times China's 208. This likely reflects where the major semiconductor design houses in this field are headquartered and where they first seek protection before extending coverage via WIPO/PCT routes, which account for 166 records. For competitive monitoring or clearance work, the US office should be the first jurisdiction searched, not a secondary check after Europe or China.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.