Cobalt Ruthenium RC Delay Reduction — PatSnap Eureka
Reduce Interconnect RC Delay with Hybrid Cobalt–Ruthenium Metal Line Routing
At sub-10 nm nodes, copper's quantum-confinement limits make Co–Ru hybrid metallization a necessary architectural shift. Explore the IBM, QUALCOMM, and UMC patent strategies that maximize effective conducting cross-section and suppress grain-boundary scattering.
Why Copper Fails at Advanced Nodes — and Why Co–Ru Hybrid Routing is the Answer
The physical motivation for moving away from Cu in advanced back-end-of-line (BEOL) interconnect analysis stems from a well-documented non-linear resistance increase as linewidth shrinks below roughly 20 nm. Research from Samsung Semiconductor (2016) established that even in the absence of grain-boundary scattering, quantum confinement alone causes a severe resistance increase in Cu at dimensions corresponding to future technology nodes — well beyond ITRS roadmap projections. This fundamental quantum-mechanical limitation makes barrier-free or thin-barrier alternatives essential.
Ruthenium has attracted attention as a Cu replacement because of its favorable scaling behavior. Research from KU Leuven (2018) established a predictive resistivity model using the Mayadas-Shatzkes framework, demonstrating that grain-boundary scattering is the dominant scattering mechanism in scaled Ru interconnects but that Ru still offers competitive resistivity relative to Cu at sub-20 nm dimensions. Importantly, Ru thin-film resistivity can be modeled and controlled, providing process designers with predictive tools for integration.
IBM Research at Albany NanoTech (2020) found that although fcc Ru — which nucleates in confined trenches — has bulk phonon-limited resistivity less than half that of hcp Ru, high grain-boundary scattering still yields elevated resistivity compared with similarly grained Cu, underlining the necessity of combining Ru with a complementary fill metal rather than using it alone. Cobalt brings complementary virtues: its lower bulk resistivity relative to W, its compatibility with PVD reflow processing for advanced materials integration, and its epitaxial relationship with Ru surfaces.
The Epitaxial metals for interconnects beyond Cu study (2020) measured resistivity of Co(0001) and Ru(0001) single-crystal thin films and showed that Ru's resistivity crosses below that of Co at approximately 20 nm thickness. Crucially, it demonstrated that epitaxial electrochemical deposition of Co on Ru is feasible for BEOL structures, opening a route to low-defect-density bilayers. According to IEEE-published work from Beijing Information Science and Technology University (2022), a Monte Carlo Boltzmann-transport-equation simulator confirmed that grain-boundary scattering dominates and that high-aspect-ratio structures benefit Ru and W for buried power rail applications.
Quantifying the Co–Ru RC Delay Advantage
Key data points from the 13-source dataset synthesized by PatSnap Eureka, spanning patent assignees, resistivity crossover thresholds, and the dominant scattering mechanisms at scaled linewidths.
Co–Ru Interconnect Patent Assignee Distribution
IBM leads with 3+ active Co–Ru patents; QUALCOMM holds 3 routing-level hybrid metallization patents; UMC and GlobalFoundries each contribute process-specific filings.
Resistivity Scaling: Cu vs Ru vs Co at Decreasing Linewidth
Cu resistance increases sharply below 20 nm due to quantum confinement; Ru crosses below Co at ~20 nm thickness; both motivate hybrid Co–Ru adoption at advanced nodes.
Ru–Co Bilayer Integration Process Steps
IBM's PVD reflow method (2017) and nitridized Ru variant (2018) define a 5-step process that eliminates thick Ta/TaN barriers and achieves void-free Co fill at advanced nodes.
QUALCOMM Hybrid Routing: Metal Assignment by Line Function
Narrow signal lines use Co or Ru (barrier-less/thin-barrier); wide power rails retain Cu for superior bulk conductivity — both processed in a single CMP step.
Constructing the Ru–Co Bilayer: Patent-Backed Process Strategies
Four distinct integration approaches from IBM, UMC, and GlobalFoundries address the trench fill, diffusion barrier, and liner volume challenges at sub-10 nm nodes.
Ru Liner + PVD Co Reflow: The Cornerstone Process
IBM's patent on cobalt first layer advanced metallization deposits a Ru layer over an adhesion-promoting layer in a patterned dielectric, then deposits Co by PVD and performs a thermal anneal that reflows Co to fill the trench. The anneal step is critical: Co has sufficient surface mobility at moderate temperatures to fill high-aspect-ratio features without void formation, while the Ru underlayer provides the necessary wetting surface and a diffusion barrier function. This eliminates thick Ta/TaN barriers that consumed significant trench cross-section in Cu damascene, replaced by a thin conformal Ru liner. Learn more about BEOL patent landscape analysis on PatSnap.
Void-free fill · No thick Ta/TaN · ↑ Metal cross-sectionNitridized Ru Interlayer: Blocking Co Diffusion into Low-k
IBM's nitridized ruthenium layer patent interposes a nitridized Ru layer between the adhesion promoter and the Co fill. Nitridizing the Ru surface suppresses Co silicide formation and Co diffusion into the surrounding dielectric while preserving Ru's good wetting properties for Co. This directly addresses a key reliability concern: if Co diffuses into the low-k dielectric, the effective dielectric constant rises, increasing parasitic capacitance and worsening the C component of RC delay. The nitridized Ru acts as a combined diffusion barrier and wetting layer — a dual function previously requiring two separate deposited films.
Blocks Co diffusion · Preserves low-k integrity · Dual functionCo–Ru Alloy Liner: Single Film Replaces Sequential Depositions
United Microelectronics Corp. pursued an alloy-based variant in which the liner itself is a Co–Ru alloy rather than a pure Ru film, deposited into the trench before a metal fill. The UMC patent explicitly frames the motivation in RC delay terms: "a reduction in interconnect line widths leads to increased line resistance (R) for signals. Further, reduced spacing between conducting lines creates more parasitic capacitance (C). The result is an increase in RC signal delay, which slows chip speed and lowers chip performance." The Co–Ru alloy liner reduces total liner volume versus separate-film stacks, maximizing metal fill fraction. This approach is particularly attractive for tight-pitch nodes where sequential deposition steps introduce thickness variability. See how advanced materials patent intelligence supports process decisions.
Single alloy liner · ↑ Fill fraction · Tight-pitch compatibleRu-Lined Cu: The Historical Stepping Stone
GlobalFoundries established the transitional Ru-lined Cu approach, using Ru as a liner for Cu fill — a stepping stone between pure Cu damascene and fully Co- or Ru-filled narrow lines. This leverages Ru's favorable adhesion and barrier properties while retaining Cu for the bulk fill. As documented in PatSnap customer research on BEOL transitions, this transitional architecture validated Ru's liner function before the industry moved to fully Cu-free narrow lines. The approach is documented in GlobalFoundries' ruthenium-lined copper fabrication methods patents from 2014–2015.
Ru barrier for Cu · Transitional architecture · Adhesion validatedHybrid Metal Assignment: QUALCOMM's Routing-Level RC Strategy
Beyond materials and deposition, significant RC delay reduction comes from intelligently assigning metals to different routing functions based on linewidth — a strategy patented across three QUALCOMM filings.
Horizontal Metal Assignment: Signal vs. Power Rails
QUALCOMM's 2019 hybrid metallization patent describes an IC where narrow-trench signal interconnects use non-copper material — explicitly including Ru and Co — while wide-trench power rails retain Cu. Both types are processed in a common CMP step at approximately the same trench depth, making the integration manufacturable without separate patterning levels. Narrow signal lines benefit from Co or Ru because the liner-to-fill ratio is large and barrier-less or thin-barrier metals improve the effective fill fraction; wide power rails favor Cu's superior bulk conductivity where the barrier volume is a smaller fraction of total trench area.
Vertical Bilayer: Co-Top / Ru-Bottom Within a Single Trench
QUALCOMM's hybrid metal interconnect structures patent (2019) describes a vertical bilayer where each hybrid interconnect has a top portion of Co and a bottom portion of Ru. This exploits Ru's superior adhesion and wetting at the trench floor and sidewalls while using Co's better CMP compatibility at the top surface — a direct engineering answer to the practical challenge that Ru is difficult to planarize by CMP alone. By combining both metals vertically, the structure captures the low-contact-resistance and wetting advantages of Ru at the bottom while maintaining planarity control via Co at the top, collectively reducing both R and integration defectivity.
Key Players in Hybrid Co–Ru Interconnect Innovation
IBM, QUALCOMM, UMC, and GlobalFoundries each occupy distinct positions in the Co–Ru patent landscape, differentiated by process approach, routing strategy, and materials modeling contributions.
| Assignee | Patent Focus | Core Innovation | Integration Approach | Status |
|---|---|---|---|---|
| IBM | Ru-seeded Co-filled trench conductors; nitridized Ru interlayer | PVD Co thermal reflow; nitridized Ru as dual barrier/wetting layer | Single-trench process optimization | 3+ Active |
| QUALCOMM | Hybrid metallization routing (horizontal & vertical) | Metal assignment by line function; Co-top/Ru-bottom vertical bilayer | Routing-level / EDA-amenable | 3 Active |
| UMC | Co–Ru alloy liner | Single alloy liner replaces sequential pure-metal depositions | Tight-pitch simplified deposition | Active |
| GlobalFoundries | Ru-lined Cu transitional approach | Ru as liner for Cu fill; validated Ru adhesion/barrier function | Transitional Cu damascene | Historical |
| KU Leuven | Finite-size Ru resistivity modeling | Mayadas-Shatzkes framework; grain-boundary scattering as dominant mechanism | Academic / materials modeling | Published 2018 |
| IBM Research Albany | fcc Ru first-principles evaluation | fcc Ru bulk phonon-limited resistivity <½ of hcp Ru; grain-boundary limits persist | Ab initio materials theory | Published 2020 |
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Six Principles for RC Delay Reduction in Co–Ru Hybrid Routing
The PatSnap Eureka dataset of 13 patents and papers converges on six actionable principles. First, the Ru liner / Co fill bilayer is the cornerstone process: IBM's 2017 patent establishes that depositing Ru first as a wetting/adhesion layer and then reflowing PVD Co achieves void-free fill without thick Ta/TaN barriers — directly increasing effective metal cross-section and reducing resistance.
Second, nitridized Ru blocks Co diffusion into low-k dielectric: IBM's 2018 patent shows that nitridizing the Ru surface suppresses Co diffusion, preserving low-k dielectric integrity and preventing the capacitance increase that would otherwise offset resistance gains. Third, Co–Ru alloy liners further minimize liner volume: UMC's 2019 patent demonstrates a single Co–Ru alloy liner film reduces total liner thickness versus sequential pure-metal stacks, increasing metal fill fraction within the same trench footprint.
Fourth, routing-level metal assignment amplifies RC benefit: QUALCOMM's 2019 patent shows that reserving Cu for wide power rails and using Co/Ru for narrow signal lines — in a single CMP step — combines the resistance advantage of alternative metals where it matters most. Fifth, the vertical Co-top/Ru-bottom hybrid solves CMP incompatibility: QUALCOMM's vertical structure patent addresses the practical challenge that Ru is difficult to planarize by placing Co at the top for CMP control while retaining Ru at the trench floor for wetting. According to semiconductor technology literature, this is a critical manufacturing yield enabler.
Sixth, grain-boundary scattering is the dominant resistance mechanism to engineer: KU Leuven (2018) and Beijing Information S&T University (2022) both identify it as the primary resistivity mechanism at sub-20 nm, making epitaxial or highly textured Co-on-Ru deposition the materials-level strategy most likely to unlock further RC reduction. The NIST materials database and PatSnap Open API both support programmatic access to the underlying materials and patent data for further research.
Cobalt–Ruthenium RC Delay Reduction — key questions answered
Even defect-free monocrystalline Cu nanowires exceed roadmap resistance targets at future nodes due to quantum confinement effects, making Co–Ru hybrid routing a necessary architectural shift rather than an incremental improvement. Ruthenium offers competitive resistivity relative to Cu at sub-20 nm dimensions, and cobalt provides lower bulk resistivity than tungsten with PVD reflow compatibility.
IBM's patent on cobalt first layer advanced metallization establishes that depositing Ru first as a wetting and adhesion layer and then reflowing PVD Co into the trench achieves void-free fill at advanced nodes without thick Ta/TaN barriers — directly increasing effective metal cross-section and reducing resistance.
IBM's 2018 patent on nitridized ruthenium shows that nitridizing the Ru surface suppresses Co diffusion into the surrounding low-k dielectric, preserving dielectric integrity and preventing the capacitance increase that would otherwise offset resistance gains. The nitridized Ru acts as a combined diffusion barrier and wetting layer — a dual function previously requiring two separate deposited films.
QUALCOMM's hybrid metallization patent shows that reserving Cu for wide power rails and using Co/Ru for narrow signal lines — processed in a single CMP step — combines the resistance advantage of alternative metals where it matters most with the conductance advantage of Cu where trench width makes barriers less costly.
QUALCOMM's vertical hybrid structure patent addresses the practical integration challenge by placing Co at the top of the trench for CMP control while retaining Ru at the trench floor for wetting — maintaining process yield without sacrificing RC performance.
Both KU Leuven (2018) and Beijing Information Science and Technology University (2022) identify grain-boundary scattering as the dominant resistivity mechanism at sub-20 nm. Epitaxial or highly textured deposition of Co on Ru, as demonstrated in the Epitaxial metals for interconnects beyond Cu study (2020), is therefore the materials-level strategy most likely to unlock further RC reduction.
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References
- Cobalt first layer advanced metallization for interconnects — International Business Machines Corporation, 2017
- Formation of advanced interconnects — International Business Machines Corporation, 2019
- Nitridized ruthenium layer for formation of cobalt interconnects — International Business Machines Corporation, 2018
- Hybrid metallization interconnects for power distribution and signaling — QUALCOMM Incorporated, 2019
- Hybrid metallization interconnects for power distribution and signaling — QUALCOMM Incorporated, 2021
- Hybrid metal interconnect structures for advanced process nodes — QUALCOMM Incorporated, 2019
- Metal interconnect structure and method for fabricating the same — United Microelectronics Corp., 2019
- Methods for fabricating integrated circuits with ruthenium-lined copper — GlobalFoundries Inc., 2014
- Methods for fabricating integrated circuits with ruthenium-lined copper — GlobalFoundries Inc., 2015
- Method of optimizing wire RC for device performance and reliability — International Business Machines Corporation, 2017
- Finite Size Effects in Highly Scaled Ruthenium Interconnects — Department of Physics and Astronomy, KU Leuven, 2018
- First-Principles Evaluation of fcc Ruthenium for its use in Advanced Interconnects — IBM Research at Albany NanoTech, 2020
- Epitaxial metals for interconnects beyond Cu — University of Mosul / collaborators, 2020
- Mechanisms of Scaling Effect for Emerging Nanoscale Interconnect Materials — Beijing Information Science and Technology University, 2022
- Lower limits of line resistance in nanocrystalline back end of line Cu interconnects — Samsung Semiconductor Inc., 2016
- Recent Trends in Copper Metallization — China Nanhu Academy of Electronics and Information Technology, 2022
- IEEE — Institute of Electrical and Electronics Engineers
- KU Leuven — Department of Physics and Astronomy
- NIST — National Institute of Standards and Technology
All data and statistics on this page are sourced from the references above and from PatSnap's proprietary innovation intelligence platform.
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