Digital-to-Analog Converter Patents: Top Companies & Trends 2026
- Filing has plateaued. activity peaked at 46 records in 2022 and has not exceeded that since, with 2026 still partial.
- Concentration is moderate, not extreme. the leader holds 76 records but the top 5 assignees combined account for only 23.1% of all 877 records in scope.
- Claims cluster hard around coding and conversion. H03M covers 96.2% of records, while amplifier and pulse-technique overlaps sit in the single digits.
What the DAC patent record actually shows
Digital-to-analog converter patenting sits at the intersection of mixed-signal circuit design and system-level calibration. The dataset used here pulls 877 records filed between 2015 and 2026 where the claims or abstract reference core DAC architecture terms alongside performance-defining concepts such as spurious free dynamic range, settling time, glitch energy, and calibration. That combination narrows the field to filings that are actually contesting DAC performance, rather than any circuit that happens to touch a converter block.
The picture that emerges is a mature, technically narrow field rather than an expanding one. Filing volume rose through the late 2010s, peaked in 2022, and has since leveled off — consistent with a technology where the core architectures (current-steering, sigma-delta, calibration loops) are well established and further patenting is incremental. Because publication typically lags filing by around 18 months, the most recent years in any trend line will understate true filing activity.
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Filing trend and technology composition
The two views below cover the same 877 records from different angles: one shows when filings happened, the other shows what technical ground they claim.
A decade of filing activity, now flat
Filings climbed from 32 in 2017 to a peak of 46 in 2022, then held roughly level rather than continuing to climb — 2026 figures are partial due to publication lag, so the true trajectory for the last one to two years reads higher than shown.
IPC composition is dominated by one subclass
H03M (coding and code conversion) appears in 96.2% of the 877 records in scope, confirming this is the primary classification for DAC-specific claims. Secondary classes — H03K, H03F, H04B, H04L, G05F, G09G and G01R — each cover under 6% of records and mark where DAC claims overlap with pulse logic, amplification, transmission, power control, display drive and measurement circuitry respectively.
Shares are the percentage of the 877 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Digital-to-Analog Converters with Eureka
This page is one run against one query. Ask Eureka your own question about digital-to-analog converters and every answer comes back with the patent numbers behind it.
Try EurekaThe citation backbone and a representative claim
US20040085234A1 — Integrated digital calibration circuit and digital to analog converter (DAC)
An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and/or analog signal chain.Filed by Analog Devices, this filing pairs on-chip calibration memory with an arithmetic logic unit to correct DAC transfer-function end points — a structure that recurs across the most-cited prior art in this dataset.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US6255906B1 | Power amplifier operated as an envelope digital to analog converter with digital pre-distortion | 253 |
| 2 | US4272760A | Self-calibrating digital to analog conversion system and method | 168 |
| 3 | US6081215A | High speed interlaced analog interface | 134 |
| 4 | US5305004A | Digital to analog converter for sigma delta modulator | 125 |
| 5 | US5625360A | Current source for reducing noise glitches generated in a digital to analog converter and method therefor | 124 |
| 6 | US6307490B1 | Digital to analog converter trim apparatus and method | 89 |
| 7 | US4222107A | Method and apparatus for automatically calibrating a digital to analog converter | 71 |
| 8 | US6166670A | Self calibrating current mirror and digital to analog converter | 69 |
| 9 | US20130088375A1 | Input-independent self-calibration method and apparatus for successive approximation analog-to-digital conver… | 68 |
| 10 | US6046719A | Column driver with switched-capacitor D/A converter | 67 |
Citation counts reflect influence inside this searched corpus and favour older filings; they are not a measure of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Three patterns in this dataset matter more than any single ranking: where citation weight sits, how concentrated ownership is, and how classification overlap maps to adjacent design disciplines.
Old envelope-tracking and calibration patents still anchor the field
The most-cited record in this dataset, US6255906B1 on envelope DAC pre-distortion, and several 1980s-1990s self-calibration patents, sit well ahead of anything filed in the last decade on citation count. That is expected in a searched corpus — older filings have had more time to accumulate citations — but it also signals that foundational calibration and current-source noise-reduction concepts remain the reference points examiners and applicants build against.
Leadership is real but not a lock
The leading assignee holds 76 records, well ahead of fifth place at 30, yet the top 5 combined only reach 23.1% of all 877 records in scope and the top 10 reach 34.2%. That leaves a substantial long tail of single- and few-filing entities, meaning dense filing near the top does not translate into a closed field overall.
Amplifier and pulse-logic overlap marks integration claims
Records classified in H03F (amplifiers) or H03K (pulse technique) alongside the dominant H03M class point to claims that integrate DAC blocks with output stages or logic timing rather than claiming the converter core in isolation. These cross-class filings are a smaller share of the dataset but indicate where system-level integration claims are being staked.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to digital-to-analog converters, with the prior art for and against each one.
Who holds the ground, and where filing has gone quiet
The ranking covers 100 companies returned by the data endpoint, counted in records — it is the full ranking available, not a curated top-50 or top-100 cut.
One assignee leads by a wide single-company margin
The top-ranked assignee holds 76 records against 30 at fifth place and 12 at tenth — a steep drop-off inside the top ten that flattens quickly once you move past the leading names into the long tail.
Momentum has gone flat across the leading names
Every one of the top assignees tracked for recent-year momentum shows zero filings in the latest year, with one recording a -100% year-on-year change. Given publication lag, this likely overstates the slowdown, but it is consistent with the broader plateau seen in the overall filing trend since 2022.
Co-filing is limited and concentrated within single firms
Only 10 co-assignee pairs appear in the dataset, and the strongest pairings link a single corporate assignee with named individual inventors rather than showing cross-company joint filing. This points to DAC IP being developed and held internally rather than through joint-venture or cross-licensing filing structures.
| Assignee | Recent year | YoY |
|---|---|---|
| Analog Devices, Inc. | 0 | — |
| Texas Instruments Inc. | 0 | — |
| Raytheon Company | 0 | — |
| Realtek Semiconductor Corp. | 0 | — |
| NXP B.V. | 0 | — |
| NXP USA, Inc. | 0 | -100% |
| Avago Technologies International Sales Pte. Ltd. | 0 | — |
| Broadcom Corporation | 0 | — |
Where to take this analysis
This landscape shows what has been filed and by whom. Turning that into a filing or freedom-to-operate decision means digging into specific claim sets.
Check freedom-to-operate against the most-cited prior art
The top-cited records in this dataset, particularly around calibration and current-source noise reduction, define claim boundaries that later filings have had to design around for two decades.
Explore prior art in EurekaMap the under-claimed sub-areas before drafting
Thin overlap with G09G, G05F and G01R suggests specific integration angles are still open relative to the dense H03M core.
Run a white space search in EurekaTrack assignees whose filing has gone quiet
Zero recent-year filings across leading assignees may reflect publication lag rather than an actual pullback — worth verifying against live filing data.
Monitor assignee activity in EurekaCommon questions about DAC patent activity
In this dataset the leading assignee holds 76 of the 877 records in scope, noticeably ahead of the fifth-ranked assignee at 30. However, the top 5 assignees combined only account for 23.1% of all records, and the top 10 reach 34.2%, so no single company controls the field outright. A long tail of smaller filers holds the remaining majority of records, which matters for freedom-to-operate work since relevant prior art is spread well beyond the largest names.
Filing activity rose from 32 records in 2017 to a peak of 46 in 2022, then flattened rather than continuing to climb. Because publication typically lags filing by about 18 months, the drop shown in 2025 and 2026 is partly an artefact of records not yet published rather than a genuine collapse in activity. Taken together, the pattern reads as a mature technology with steady rather than accelerating patenting.
The overwhelming majority of records, 96.2% of the 877 in scope, are classified under H03M, the coding and code-conversion subclass that covers core DAC and ADC architecture. Smaller overlaps appear with H03K (pulse technique and logic circuits) and H03F (amplifiers), each covering under 6% of records, which mark where DAC claims integrate with timing logic or output stages. Because a single record can carry multiple IPC classes, these percentages add up to more than 100% and should not be summed.
US20040085234A1, filed by Analog Devices, describes an integrated digital calibration circuit paired with a DAC, using stored end-point coefficients and an arithmetic logic unit to correct the converter's transfer function. It is a representative example of the calibration-focused claiming that recurs throughout the most-cited prior art in this dataset. Anyone designing calibration logic that adjusts DAC end points via stored coefficients and on-chip arithmetic should review this filing's claim scope closely before finalising an architecture.
The thinnest classification overlaps in this dataset sit around G09G (display control), G05F (electric/magnetic variable control) and G01R (electric and magnetic measurement), each under 2% of the 877 records despite clear technical relevance to DAC output stages. These low percentages indicate claim space that has not been heavily contested relative to the dense H03M core, particularly for DAC integration into display drivers, power-control feedback loops, and measurement instrumentation.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.