DRAM Technology Patents: Top Companies & Filing Trends 2026
- Filing has already peaked. Annual filings rose to 118 in 2021 and have declined since, with 96 recorded at the 2022 midpoint — this is a maturing claim space, not a growing one.
- The largest holders filed nothing in the latest year. Assignees including IBM, Micron, Samsung, Hitachi, Toshiba and Mitsubishi Electric each show zero filings in the most recent year, though publication lag means this understates true recent activity.
- Claim density concentrates in two IPC subclasses. H10B (memory device manufacture) and H01L (semiconductor devices) between them cover the large majority of the 9,492 families, while G01R-classed measurement approaches sit far behind at 140.
Filing growth compares 2021 (118 records) with 2024 (104) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 9,492 records in scope (CR5), not by the ranked leaders only.
What this patent set covers
This landscape tracks patent families that combine DRAM cell or dynamic random access memory terminology with specific structural and circuit terms — capacitor scaling, buried word line, sense amplifier, and high-k capacitor — restricted to the IPC classes covering memory-device manufacture and static/digital memory circuits. It captures the fabrication and circuit-design layer of DRAM rather than the broader memory-systems or packaging literature.
The corpus spans publications from 2015 through the 2026 data cut-off and totals 9,492 published patent families, giving a large enough base to separate durable filing patterns from single-year noise.
Filing trend and technology composition
Two views matter here: the trajectory of filings over time, and how those filings split across IPC subclasses. Both point to a technology area with an established, occupied core rather than an emerging one.
Filings rose, peaked, then eased back
Annual filings climbed from 66 in 2017 to a peak of 118 in 2021, then settled near 96 by 2022 — a flat-to-declining pattern through the visible window. Because publication typically lags filing by around 18 months, the final one or two years in the chart will always understate true activity and should not be read as a cliff.
H10B and H01L dominate the classification mix
H10B (memory device manufacture) appears in 7,241 records and H01L (semiconductor devices) in 6,390, with G11C (static and digital memories) a distant third at 3,620. Measurement-oriented filings under G01R sit at just 140, marking it as the thinnest-covered classification in the set rather than a growth frontier.
Shares are the percentage of the 9,492 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on DRAM Technology Landscape with Eureka
This page is one run against one query. Ask Eureka your own question about dram technology landscape and every answer comes back with the patent numbers behind it.
Try EurekaThe records this field is built on
Self-aligned capacitor-under-bit-line DRAM cell structure
The representative record describes a method for fabricating a DRAM cell structure by sequentially etching a hard mask layer and a capacitor plate layer to define a via over a bit-line source/drain region, then isotropically recessing the capacitor plate layer beneath the mask before filling the enlarged via with an inter-metal dielectric. The approach targets a self-aligned capacitor-under-bit-line (CUB) architecture.Filed by Taiwan Semiconductor Manufacturing Co., Ltd.; granted 2003-09-30.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US6472266B1 | Method to reduce bit line capacitance in cub drams | 618 |
| 2 | US5638317A | Hierarchical DRAM array with grouped I/O lines and high speed sensing circuit | 556 |
| 3 | US20130069052A1 | Memory cells, semiconductor devices, systems including such cells, and methods of fabrication | 541 |
| 4 | US5554557A | Method for fabricating a stacked capacitor with a self aligned node contact in a memory cell | 497 |
| 5 | US6166942A | Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines | 493 |
| 6 | US20080157157A1 | Semiconductor integrated circuit device | 488 |
| 7 | US5013680A | Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available p… | 479 |
| 8 | US6544837B1 | SOI stacked DRAM logic | 477 |
| 9 | US5367488A | DRAM having bidirectional global bit lines | 463 |
| 10 | US5698869A | Insulated-gate transistor having narrow-bandgap-source | 440 |
Ranked by citation count within this searched corpus; older filings accumulate citations simply by being available longer, so treat this as a map of influence, not of current relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
Put your own technology through the same analysis
Eureka on the web
When you want the answer in the next five minutes.
The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →MCP server & REST API
When it has to run inside your own pipeline.
Patent search, landscape analysis and assignee resolution as MCP tools. Drop them into any agent framework, or call REST directly.
Browse MCP servers →What the filing pattern tells a decision-maker
The numbers describe a field where the core architecture is settled and most remaining activity is refinement at the margins.
Growth has already crested
Filings peaked in 2021 and eased through 2022 rather than continuing to climb. Combined with the 18-month publication lag, this points to a technology whose core claim space was staked out earlier in the window and is now being consolidated rather than expanded.
Manufacturing claims dominate over circuit claims
H10B and H01L together cover the bulk of filings, meaning most protected ground concerns how the memory device is built rather than how it is operated. G11C circuit-level filings are present but secondary, and G01R measurement approaches are marginal at 140 records.
Established holders have gone quiet in the most recent year
IBM, Micron, Samsung, Hitachi, Toshiba and Mitsubishi Electric all show zero recorded filings in the latest year, with Micron down 100% year-on-year. Given the publication lag this likely reflects incomplete recent data rather than an actual halt, but it does mean recent-year rankings should not be taken at face value.
Co-filing is limited and concentrated
Only ten co-assignee pairs appear in the dataset, the strongest linking IBM with Infineon Technologies (North America) at 83 shared families, IBM with Siemens at 68, and Hitachi with its own Hitachi ULSI Systems affiliate at 57. Most filers in this space patent independently.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to dram technology landscape, with the prior art for and against each one.
Who holds the ground, and where it thins out
Filing activity concentrates among a small group of long-established semiconductor and memory manufacturers, with a long tail of smaller filers behind them.
A dense core of established manufacturers
The assignee ranking is built across the same 9,492 patent families as the overall corpus, with named holders including IBM, Micron, Samsung, Hitachi, Toshiba, Mitsubishi Electric, SK hynix, Infineon, NEC and Texas Instruments appearing across the dataset. This is a field shaped by incumbent memory and foundry players rather than new entrants.
Recent-year signals should be read cautiously
Several of the largest historical filers report zero filings in the most recent year. Because publications lag filings by roughly 18 months, this is more likely a data-cutoff artefact than a genuine pullback, but it means any latest-year leaderboard understates true current filing.
Cross-filing is the exception, not the rule
IBM's joint filings with Infineon Technologies (North America) and with Siemens are the strongest collaborative links in the dataset, alongside Hitachi's internal filings with its ULSI Systems affiliate. With only ten pairs identified across 9,492 families, most protection here is built by single assignees working alone.
| Assignee | Recent year | YoY |
|---|---|---|
| IBM (International Business Machines Corporation) | 0 | — |
| Micron Technology, Inc. | 0 | -100% |
| Samsung Electronics Co., Ltd. (South Korea) | 0 | — |
| Hitachi, Ltd. | 0 | — |
| Toshiba Corporation | 0 | — |
| Mitsubishi Electric Corporation | 0 | — |
| SK hynix Inc. | 0 | — |
| Siemens AG | 0 | — |
Where to take this analysis
The filing and classification patterns above raise questions that are best answered against the full document set rather than summary statistics.
Check freedom-to-operate against the densest claims
With H10B and H01L covering the majority of filings, any new capacitor-scaling or buried-word-line design should be checked directly against the most-cited records in those classes before development proceeds.
Explore the full claim set in EurekaTrack the latest-year data as it fills in
The apparent drop-off among major holders in the most recent year is likely a publication-lag effect. Re-running the trend in a few quarters will clarify whether filing has genuinely slowed.
Set up monitoring in EurekaProbe the under-claimed sub-areas directly
Sense amplifier offset compensation and measurement-oriented filings under G01R are thin relative to the core. A targeted search of that classification can confirm whether it is genuinely open or simply filed under different terms.
Run a targeted search in EurekaCommon questions about DRAM patent activity
The assignee ranking behind this landscape is led by established memory and semiconductor manufacturers, with IBM, Micron, Samsung, Hitachi, Toshiba, Mitsubishi Electric, SK hynix, Infineon, NEC and Texas Instruments all appearing among the named holders across the 9,492-family corpus. No single company holds a dominant share; filing is spread across a group of long-established incumbents rather than concentrated in one firm. Because recent-year filings lag publication by roughly 18 months, current-year leaderboards should be treated as provisional.
Not on the evidence here. Filings rose from 66 in 2017 to a peak of 118 in 2021, then eased to 96 by the 2022 midpoint, indicating a flat-to-declining trend rather than continued growth. This pattern is consistent with a technology whose core architecture — capacitor scaling, buried word line structures, sense amplifier design — has already been substantially claimed. Readers should not assume filing has stopped; the most recent one to two years in any trend chart are understated because of publication lag.
The dataset combines DRAM and dynamic-random-access-memory terminology with specific structural and circuit terms including capacitor scaling, buried word line, sense amplifier, and high-k capacitor, filtered to IPC classes covering memory-device manufacture (H10B), semiconductor devices (H01L) and static/digital memory circuits (G11C). It is focused on the fabrication and circuit-design layer of DRAM rather than broader memory-systems architecture or packaging. Measurement-oriented filings under G01R are present but represent a small fraction of the total.
The classification data shows G01R (electric and magnetic measurement), at 140 records, and G06F-adjacent digital-processing crossover filings, at 431 records, as the thinnest-covered classes relative to the H10B and H01L core. Sub-areas like sense amplifier offset-compensation circuits and buried-word-line contact isolation also appear less densely claimed than core capacitor and cell-structure fabrication. Confirming genuine white space requires a targeted search against the full claim text, since thin IPC coverage can also mean the work is filed under a different classification.
Citation counts accumulate over time, so records published years ago — such as the capacitor-under-bit-line and hierarchical sensing patents at the top of this corpus's citation table — have simply had more time to be cited than recent filings. A high citation count signals historical influence on how others drafted around a structure, not that the patent is currently the most commercially relevant. Recent, less-cited filings can still be significant; they just haven't accumulated citations yet.
Research DRAM Technology Landscape in depth with Eureka
Go past this page: query the whole dram technology landscape corpus yourself, in your own scope.
Every answer comes back with patent numbers you can open.
Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.