One assignee leads the ranking with 47 records, well clear of the fifth-ranked assignee at 15 and the tenth-ranked at 11. That gap indicates a genuine leader rather than a cluster of near-equal filers at the top. Beyond the top 10, which together hold 59.9% of the 359 records in scope, filing spreads across a long tail of universities, device makers and smaller entrants, so the field is concentrated but not closed to new filers.

Filings peaked in 2019 at 17 records and have since eased, with the last complete year, 2024, at 11 records against 16 in 2021 — a 31% decline over that span. However, publication typically lags filing by around 18 months, so the 2025 and 2026 figures in any dataset are understated by nature and should not be read as continued decline. The honest read is a cooling from a 2019 peak, not a collapsing field.

H01L, covering general semiconductor device structures, appears in 76.3% of the 359 records in scope, making it by far the densest class. C30B, crystal growth, follows at 31.8%, and H10D general semiconductor devices at 16.7%. Smaller classes such as G01N testing, B81C MEMS manufacturing, H10K organic semiconductors and C23C coating deposition each sit under 10%, marking them as comparatively lighter claim territory relative to core device-structure filings.

US20150115283A1 covers a SiC bipolar junction transistor design that places a defect termination layer between an off-axis substrate and the collector region, with a collector zone engineered to have shorter minority-carrier lifetime than the base region. It blocks that specific structural combination — substrate off-axis orientation, an interposed defect termination layer, and a differentiated-lifetime collector zone — filed by Semiconductor Components Industries in April 2015. Anyone using a materially different defect-termination approach or lifetime-control mechanism is likely working outside its claim scope, but a design using the same layered logic on a different device type warrants a closer claim-by-claim read.

The technology composition data shows device-structure claims (H01L) far outweighing crystal-growth process claims (C30B) and testing/monitoring classes (G01N, B81C), which sit under 10% of records each. That gap suggests the underlying epitaxial growth process, in-situ surface morphology monitoring, and coating-based defect control are comparatively under-claimed relative to the device structures they enable. A first claim aimed at a specific process control step — such as real-time wafer bow compensation during growth — is more likely to find open space than another device-architecture claim.