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EUV Lithography Mask Technology 2026 — PatSnap Eureka

EUV Lithography Mask Technology 2026 — PatSnap Eureka
Tools Explore in Eureka
Reading14 min
PublishedJun 10, 2025
Coverage2006–2026
Patent Landscape · 2026

EUV Lithography Mask Technology Landscape 2026

Extreme ultraviolet lithography mask technology sits at the critical junction between semiconductor scaling ambitions and physical manufacturing limits, enabling pattern transfer at 13.5 nm wavelength using reflective optical architectures. This report covers the patent and literature landscape across mask blank production, absorber engineering, phase-shift designs, and defect inspection.

Fig. 01 — Patent Records by Primary Assignee (2006–2026)
EUV Mask Patent Records by Assignee: TSMC 25+, Applied Materials ~15, AGC Inc. ~12, S&S Tech ~8, GlobalFoundries 2 Bar chart showing patent record counts by primary assignee in the EUV lithography mask technology dataset from 2006 to 2026, sourced from PatSnap Eureka.
Published by PatSnap Insights Team · · 14 min read Verified by PatSnap Eureka Data
Technology Overview

How EUV Masks Work: Reflective Architecture at 13.5 nm

EUV lithography masks operate on a reflection principle: EUV radiation at 13.5 nm wavelength is absorbed by virtually all materials, so the mask cannot transmit light as in conventional optical lithography. Instead, a multilayer (ML) stack — typically alternating molybdenum and silicon bilayers — is deposited on an ultra-low thermal expansion material (LTEM) substrate to form a Bragg reflector. An absorber layer patterned on top of the ML stack defines the circuit pattern by selectively blocking EUV reflectance.

A capping layer, commonly ruthenium, protects the ML stack from oxidation and cleaning damage. The core technical sub-domains covered in this landscape include mask blank production systems, absorber layer chemistry, phase-shifting mask architectures, reflective mask blank engineering, on-axis illumination patterning, and defect inspection and repair. For context on the broader semiconductor manufacturing ecosystem, see PatSnap IP Analytics.

EUV achieved high-volume manufacturing readiness in 2018 with greater than 250 W source power and greater than 140 wafers per hour throughput, as confirmed in literature. The technology was deployed for 7 nm node production in 2018 and is required for 5 nm and below. DRAM manufacturing at 16 nm half-pitch also uses EUV masks, with overlay requirements below 1.1 nm matched-machine overlay and CD uniformity below 0.5 nm full-wafer. For semiconductor manufacturing IP intelligence, PatSnap provides global patent coverage across 120+ countries.

This landscape is derived from a limited set of patent and literature records retrieved across targeted searches. It represents a snapshot of innovation signals within this dataset only and should not be interpreted as a comprehensive view of the full industry. The global standards body IEEE and the European Patent Office provide additional context on semiconductor IP filing norms.

PatSnap Eureka Publication dates in this dataset span 2006 to 2026, indicating a field that transitioned from early proof-of-concept research to high-volume production maturity. Explore the data ↗
13.5 nm
EUV operating wavelength
>250 W
Source power at HVM readiness (2018)
>140
Wafers per hour throughput at HVM
<0.5 nm
Full-wafer CD uniformity requirement
<1.1 nm
Matched-machine overlay for DRAM
2006–2026
Dataset publication date range
Innovation Timeline

From Proof-of-Concept to High-NA EUV: Filing Activity by Phase

Patent filing density in this dataset reveals four distinct innovation phases from 2006 to 2026, with the highest filing density falling between 2013 and 2017.

Filing Activity by Phase (2006–2026)

The 2013–2017 development phase shows peak filing density; the most recent phase (2023–2026) shows renewed activity for high-NA EUV.

EUV Mask Filing Phases: Foundational 2006–2012 (low), Development 2013–2017 (peak), HVM 2018–2022 (medium), Next-Gen 2023–2026 (rising) Area-style bar chart showing relative patent filing density across four innovation phases for EUV lithography mask technology, sourced from PatSnap Eureka dataset.

Jurisdiction Distribution of EUV Mask Patents

The US dominates with roughly 80% of retrievable records; EP, SG, WO, and MY account for the remainder.

EUV Mask Patent Jurisdiction Split: US ~80%, EP/SG/WO/MY ~20% Donut chart showing the geographic distribution of EUV lithography mask patent records by jurisdiction, with the US dominating at approximately 80%, sourced from PatSnap Eureka.
PatSnap Eureka Applied Materials and S&S Tech’s multi-jurisdictional filing strategies (US + EP + SG + MY) indicate mask blank manufacturing is expected to scale in Southeast Asia and Europe. Explore the data ↗
Key Technology Approaches

Four Technology Clusters Defining the EUV Mask Landscape

The patent dataset organises into four distinct clusters, each addressing a different layer of the EUV mask stack or its quality assurance infrastructure.

Cluster 01

Conventional Binary Absorber Mask Blanks

The dominant conventional architecture uses an LTEM substrate, a Mo/Si multilayer Bragg reflector, a ruthenium capping layer, and a tantalum-based absorber (TaN, TaON, or TaBN). Absorber thickness of less than 80 nm and reflectivity below 2% at 13.5 nm are key specifications. Applied Materials developed an integrated vacuum production system to deposit both the ML stack and absorber in a single handling pass, eliminating contamination risks. PatSnap IP Analytics maps the full competitive landscape for these production systems.

Absorber <80 nm · Reflectivity <2% at 13.5 nm
Cluster 02

Phase-Shifting Mask Designs

Phase-shift masks exploit the EUV phase relationship between adjacent pattern regions to achieve contrast enhancement. TSMC’s approach uses two-state masks with 180-degree phase difference combined with near-on-axis illumination (partial coherence σ < 0.3), selectively passing only ±1st diffraction orders. S&S Tech Co., Ltd. has developed blankmasks with dedicated phase-shift films using niobium–chromium (Nb/Cr) first layers and tantalum–silicon (Ta/Si) second layers, achieving higher NILS and lower dose-to-clear (DtC) metrics than binary masks.

Partial coherence σ < 0.3 · Higher NILS
Cluster 03

Novel Absorber Chemistries for 3D Effect Mitigation

The “mask 3D effect” — in which the finite absorber stack height causes shadowing and telecentricity errors under oblique EUV illumination — becomes increasingly problematic at tighter nodes. S&S Tech Co., Ltd. is the primary assignee pursuing non-tantalum absorber chemistries, specifically chromium–antimony (CrSb) films with compositions of Cr 30–60 at%, Sb 40–70 at%, N 0–20 at%. CrSb absorbers achieve the required optical properties at reduced film thickness, directly reducing the 3D effect and improving dose-to-space (DtS) and NILS metrics. For materials IP intelligence, see PatSnap for Chemicals.

CrSb: Cr 30–60 at%, Sb 40–70 at%
Cluster 04

Defect Inspection, Metrology, and Mask Repair

Defect-free masks remain a critical bottleneck. Inspection approaches include projection electron microscopy (PEM), coherent diffractive imaging (CDI/ptychography) at EUV wavelength (actinic inspection), and scatterometry combined with finite element analysis for absorber profile reconstruction. For repair, electron-beam-induced processing (FEBIP) is the state-of-the-art method, with sub-10 nm extrusion repair demonstrated using the next generation MeRiT LE tool. No mass-production actinic inspection tool is commercially established. The NIST and EPO provide supplementary metrology standards context.

Sub-10 nm FEBIP repair · Actinic CDI
PatSnap Eureka All four clusters are active in the 2023–2026 filing window, with CrSb absorber and phase-shift blankmask filings showing the steepest recent growth. Explore the clusters ↗
Assignee Landscape

Primary Patent Assignees and Filing Strategies

Five primary assignees account for nearly all filings in this dataset, with activity highly concentrated rather than distributed across the broader industry.

Assignee Records (approx.) Jurisdictions Focus Area Filing Period
TSMC 25+ records US (dominant) Process & mask design: near-on-axis illumination, phase-shifting, LEUVR mask pairs, shadow effect reduction 2013–2021
Applied Materials, Inc. ~15 records US, WO, EP, SG, MY EUV mask blank production systems; vacuum-integrated deposition platforms 2016–2023
AGC Inc. ~12 records US (dominant), SG Reflective mask blank material compositions: low-reflective layers, absorber layers, hard mask layers 2011–2025
🔒
Unlock S&S Tech, GlobalFoundries & CAS profiles
See full filing strategies, jurisdiction coverage, and competitive positioning for all six assignees in this dataset.
S&S Tech CrSb strategy GlobalFoundries Ru/Si CAS defect detection + jurisdiction maps
Access full assignee data →
PatSnap Eureka TSMC’s US-only filing strategy reflects IP protection in the largest litigation jurisdiction; Applied Materials’ multi-region coverage reflects global equipment commercialization intent. Analyse assignees in Eureka ↗
Emerging Directions

Five Technology Vectors Shaping High-NA EUV Mask Innovation

Based on the most recent filings in this dataset (2023–2026), five directions are clearly emerging for next-generation EUV mask technology.

CrSb-Based Thin Absorber Films

S&S Tech’s 2025 filings in US, EP, and SG for CrSb(N,O,C) absorbers represent a significant departure from the tantalum absorber paradigm. CrSb enables thinner absorber stacks, directly reducing the 3D mask effect that becomes critical for high-NA EUV (NA > 0.55). Compositions: Cr 30–60 at%, Sb 40–70 at%, N 0–20 at%.

Advanced Phase-Shift Blankmasks with Multi-Element Films

S&S Tech’s 2026 US filing with Ru-containing phase-shift films and Nb/Cr etch-stop layers, and companion filings with Nb/Cr + Ta/Si bilayer architecture, indicate a push toward multi-film phase-shift stacks tuned for high-NA EUV imaging metrics including NILS, DtC, and DtS.

Multilayer Absorber Stacks

Applied Materials’ 2023 US filing introduces a multilayer absorber concept — multiple absorber layer pairs replacing a single monolithic layer — potentially enabling composition grading and improved optical performance across the absorber stack depth.

Fully Reflective Absorber-Free Mask Architectures

TSMC’s 2021 US patent on a fully reflective phase-edge mask — using trenched patterned multilayers with no separate absorber layer — points toward a future where the absorber is eliminated entirely, removing 3D effects at their source.

🔒
Unlock AGC high-NA analysis & strategic implications
Access the full AGC continuation filing analysis and strategic IP implications for foundries and mask blank suppliers targeting high-NA EUV insertion.
AGC 2024–2025 filings High-NA ML stack FTO considerations + strategic IP map
Unlock full analysis →
PatSnap Eureka The five emerging directions above are derived from filings dated 2021–2026 in the dataset; actinic inspection remains a critical unresolved supply chain gap with no commercially established mass-production tool. Explore emerging directions ↗
Application Domains

Where EUV Mask Technology Is Applied Across the Semiconductor Value Chain

EUV mask technology serves four distinct application domains, from leading-edge logic to research infrastructure.

Logic & Foundry
Advanced Logic Manufacturing
EUV deployed for 7 nm production in 2018; required for 5 nm and below. TSMC’s 25+ US patents map directly to their role as the world’s largest advanced logic foundry.
5 nm & below node targets
ASML 2019 literature documents 5 nm logic and 16 nm DRAM production targets using EUV mask technology.
Memory
DRAM at 16 nm Half-Pitch
Strict overlay requirements below 1.1 nm matched-machine overlay and CD uniformity below 0.5 nm full-wafer reflect memory-specific demands for periodic pattern uniformity.
Applied Materials serves both
Mask blank production systems serve both logic and memory mask shops across jurisdictions including US, WO, EP, SG, and MY.
Research & Supply Chain
EUV Interference Lithography (EUV-IL)
Used at synchrotron beamlines for periodic nanostructure patterning and EUV resist characterisation using transmission diffraction mask-based schemes.
Mask Blank Supply Chain
Applied Materials and AGC Inc. patents define the equipment and materials sold to mask blank manufacturers such as Hoya and AGC who supply photomask shops.
PatSnap Eureka For life sciences semiconductor applications and advanced materials IP, see PatSnap Life Sciences and customer case studies. Explore applications ↗
Frequently asked questions

EUV Lithography Mask Technology — key questions answered

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