The dataset covers physical attacks that force a chip into an unintended state, including voltage glitching, clock glitching, laser fault injection and electromagnetic pulse injection, as captured by the search string used to build this landscape. Records are only included if they also reference a detection or countermeasure concept such as redundant computation, control-flow integrity, a photodiode sensor or a similar mechanism. This means the 244 records in scope represent the intersection of attack and defence disclosure, not every patent that merely mentions glitching in passing.

Filing is concentrated at the top: the leading assignee holds 29 of the 244 records, and the top 5 of 59 ranked assignees together account for 41.8% of all records in scope. The next tier drops off quickly, with fifth place at 11 records and tenth place at 8, meaning most of the ranked field holds only a handful of filings each. Named leaders in the underlying evidence include established secure-element and smart-card vendors alongside general semiconductor and cloud-hardware filers.

Filing peaked in 2022 at 42 records and eased to 21 by 2024, a -30% move from 2021’s 30 filings, but this should not be read as the field losing relevance. Publication lags filing by roughly 18 months, so 2025 and 2026 figures in the same dataset are understated by construction and cannot yet be compared fairly to earlier years. A more likely explanation for the 2022-2024 easing is that core voltage and clock glitch detection mechanisms are now well-claimed, pushing new filing activity toward adjacent techniques rather than away from the field entirely.