Ferroelectric Tunnel Junction Memory Technology 2026
Ferroelectric Tunnel Junction Memory Technology 2026
FTJ memory combines DRAM-like speed with Flash-like non-volatility via quantum-mechanical tunneling through ultrathin ferroelectric barriers. HZO-based CMOS-compatible stacks dominate the 2026 patent landscape across at least 65 retrieved records spanning 2007–2026.
FTJ Memory: From Perovskite Prototypes to HZO at Scale
Ferroelectric tunnel junction devices sandwich an ultrathin ferroelectric film (typically 2–10 nm) between two asymmetric electrodes. Reversing polarization modulates the tunneling barrier height and/or width, producing a tunneling electroresistance (TER) ratio between the high-resistance and low-resistance states. The two-terminal structure avoids the destructive read cycle of capacitor-based FeRAM.
Hafnium zirconium oxide (HZO, Hf₁₋ₓZrₓO₂) appears in at least 15 distinct records in this dataset, displacing classical perovskites such as BaTiO₃, BiFeO₃, and Pb(Zr,Ti)O₃ as the dominant ferroelectric material. HZO’s CMOS-process compatibility, scalability to sub-10 nm thickness, and robust remanent polarization make it the material of choice for industry-oriented work.
The dataset spans 2007 to early 2026 across three phases: a foundational era of perovskite-based prototypes, a CMOS integration era (2018–2022) defined by HZO and BEOL-compatible stacks, and a current scaling and application era (2023–2026) concentrating on catalytic crystallization, 3D integration, in-memory computing, and internal-bias retention engineering.
Within this dataset, TSMC is the single most prolific assignee with at least 10 distinct patent records in retrieved records spanning 2021–2026. Chinese academic and industrial assignees collectively represent the largest single-jurisdiction cohort in this dataset, covering every technical cluster from neuromorphic synapses to 3D columnar arrays.
Filing Trends and Technology Cluster Distribution
Analysis of the retrieved dataset reveals three distinct innovation eras and four dominant technology clusters. The 2023–2026 window shows the highest filing density in this dataset, concentrated in catalytic crystallization, 3D integration, and neuromorphic computing applications.
FTJ Patent Records by Technology Cluster (Dataset Snapshot)
HZO-based BEOL-compatible stacks form the largest single cluster in this dataset, followed by composite barrier/MFIS architectures, 3D/selector-integrated arrays, and novel material platforms including AlScN and graphene contacts.
↗ Click bars to exploreFTJ Patent Filing Activity by Era (Dataset Snapshot)
Filing activity in this dataset increased markedly across the three eras, with the 2023–2026 window showing the highest concentration of records, particularly from TSMC and Chinese academic assignees focused on sub-4 nm crystallization and 3D integration.
↗ Click bars to exploreKey FTJ Application Domains Across Memory, Computing, and Sensing
Retrieved records cover five distinct application domains: standalone and embedded non-volatile memory, neuromorphic and in-memory computing, content-addressable memory, power electronics and photovoltaics, and optical memory. Each domain is supported by named patent assignees and specific device architectures in the dataset.
Embedded Non-Volatile Memory Arrays
TSMC’s patent family covering MgO-dielectric FTJ arrays explicitly targets embedded memory integrated with access transistor arrays across US and CN filings from 2021–2026. A 2024 US active filing describes a full array architecture with bottom and top electrodes, ferroelectric and tunneling dielectric layers, and electrical connection to access transistors. Seagate’s 2021 US pending patent proposes 3D FTJ arrays as DRAM replacements and data cache devices using HfO₂-family ferroelectrics with Al₂O₃/MgO/SrTiO₃ tunnel barrier options.
Non-Volatile StorageNeuromorphic and In-Memory Computing
Fudan University’s 2021 CN patent exploits FTJ’s two-terminal analog resistance switching to emulate synaptic non-linear transmission for artificial neural networks using HfO₂-based stacks. Nanjing University’s 2025 CN active patent describes a stacked dual-ferroelectric-layer structure targeting logic-in-memory operations for deep learning acceleration, eliminating the von Neumann bottleneck. A 2023 literature review surveys FTJ use in both neuromorphic analog and logic-in-memory digital computing architectures based on HZO.
Neuromorphic ComputingTernary Content-Addressable Memory
Peking University’s 2024 CN active patent achieves full TCAM functionality in a single FeTFET cell by exploiting bipolar band-to-band tunneling current combined with ferroelectric polarization control, drastically reducing cell area versus SRAM-based CAMs. An earlier 2022 CN filing from Peking University covers the underlying FeTFET TCAM method. This approach targets hardware search-engine accelerators and routing tables in networking and AI inference hardware.
Content-Addressable MemoryPower Electronics and Photovoltaics
LONGi Green Energy Technology’s 2024 CN active patent introduces defect-assisted tunneling paths within the ferroelectric barrier layer to increase tunneling current density for high-current applications including power semiconductor devices and multi-junction photovoltaic series devices. This represents a distinctly non-memory application of FTJ physics, with a companion 2023 CN filing also assigned to LONGi. Xiangtan University’s 2020 CN active patent explores optically modulated carrier injection to erase and read FTJ states for miniaturized multi-modal memory and sensing modules.
Power & SensingKey Patent Assignees in FTJ Memory — Retrieved Records Snapshot
In this dataset, TSMC holds the highest filing concentration with at least 10 distinct records across US and CN jurisdictions from 2021–2026, covering MgO-dielectric stacks, sparse seed layers, catalytic crystallization, and thermal-mismatch ferroelectric response improvements. Chinese academic and industrial assignees collectively represent the largest single-jurisdiction cohort in retrieved records, spanning every technical cluster.
Top FTJ Patent Assignees by Filing Count in Retrieved Records (Dataset Snapshot)
↗ Click bars to exploreTaiwan Semiconductor Manufacturing Company
TSMC holds at least 10 distinct patent records in retrieved records spanning 2021–2026 across US and CN jurisdictions, covering MgO-dielectric FTJ arrays, sparse seed layer orthorhombic phase control, thermal expansion mismatch ferroelectric response improvement, and catalytic metal-layer crystallization for sub-4 nm HZO films at ≤400 °C. The most recent record (February 2026, US, active) describes a catalytic metal layer of W, Mo, Ta, or Hf at 0.5–10 Å thickness enabling metal-induced crystallization of HfO₂/HZO layers ≤4 nm thick. Multiple filings are listed as active in the US jurisdiction, indicating an actively enforced patent position.
Taiwan / United StatesSanDisk Technologies / Applied Materials
SanDisk Technologies holds two active US patents and one WO filing (all 2021) covering selector-integrated FTJ crosspoint arrays that combine an ovonic threshold switch (OTS) material portion with a ferroelectric tunneling dielectric in a single 1S1R-style crosspoint memory cell. Applied Materials holds two US records (2023 active and 2025 active) focused on internal-bias engineering for long retention, engineering electrode work functions to create a net internal electric field that opposes the depolarizing field in the ON state. Both assignees target the high-density storage and retention-reliability segments of the FTJ market in the US jurisdiction.
United StatesFive Forward-Looking Vectors in the 2024–2026 FTJ Patent Frontier
The most recent filings (2024–2026) in this dataset signal five forward-looking innovation vectors: catalytic metal-induced crystallization for sub-4 nm FTJ, internal-bias retention engineering, 3D vertical pillar integration, AlScN and non-HZO ferroelectrics, and sparse seed layer manufacturability.
Catalytic Metal-Induced Crystallization for Sub-4 nm FTJ
TSMC’s February 2026 US active filing and its November 2025 US pending divisional introduce a catalytic metal layer (W, Mo, Ta, or Hf, 0.5–10 Å thick) in direct contact with HfO₂/HZO layers ≤4 nm thick, enabling metal-induced crystallization at ≤400 °C. This simultaneously addresses the BEOL thermal budget constraint and the ultra-thin ferroelectric scalability bottleneck — two of the field’s most pressing manufacturing challenges. This is the most recent record in the dataset.
Internal-Bias Engineering for Long Retention
Applied Materials’ May 2025 US active patent engineers electrode work functions so that a net internal electric field opposes the depolarizing field when the FTJ device is in the ON state, directly addressing the fundamental retention versus TER tradeoff that limits MFIS structures. A companion 2023 US active filing from Applied Materials covers the same internal-bias approach, indicating a sustained R&D program. Peking University’s 2026 CN filing on rhombohedral-phase FTJ represents a second distinct architectural direction for solving the same retention degradation problem.
HZO MIM vs. Composite MFIS FTJ Architectures
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| Dimension | HZO MIM (Metal/Ferroelectric/Metal) | Composite MFIS (Metal/Ferroelectric/Insulator/Semiconductor) |
|---|---|---|
| Ferroelectric Layer | HZO (Hf₀.₅Zr₀.₅O₂), typically 2–10 nm, ALD-deposited | HZO or Si-doped HfO₂ plus Al₂O₃ or MgO insertion layer |
| TER Mechanism | Primarily barrier-height modulation under polarization switching | Both barrier-height and barrier-width modulation, maximizing TER |
| TER Magnitude | 2×–10× memory window demonstrated at ≤400 °C (Intermolecular, 2025) | Larger TER achievable via potential barrier modulation under varying voltage (2022 literature) |
| Retention Challenge | Depolarization fields degrade retention in symmetric structures | Asymmetric structure worsens depolarizing field; internal-bias engineering required (Applied Materials, 2023/2025) |
| BEOL Compatibility | ≤400 °C validated; W/HZO/Al₂O₃/TiN stack confirmed at 400 °C anneal (2021 literature) | Al₂O₃/HZO/Si structure validated; BEOL budget dependent on insulator deposition method |
| Scalability | Sub-4 nm HZO enabled by catalytic metal crystallization (TSMC, 2026) | HZO above 10 nm enables sizable TER with Al₂O₃ interfacial layer (2019 literature) |
| Key Assignees | TSMC, Intermolecular, SanDisk, Applied Materials, Shanghai ICMIC | TSMC (MgO dielectric), Nanjing University, academic literature groups |
| Application Focus | Embedded NVM, crosspoint arrays, 3D integration | Neuromorphic computing, high-TER analog memory, logic-in-memory |
Frequently Asked Questions: Ferroelectric Tunnel Junction Memory
Hafnium zirconium oxide (HZO, Hf₁₋ₓZrₓO₂) appears in at least 15 distinct records in this dataset, making it the dominant ferroelectric material. HZO’s CMOS-process compatibility, scalability to sub-10 nm thickness, and robust remanent polarization make it the material of choice for industry-oriented work. Classical perovskites (BaTiO₃, BiFeO₃, PZT) appear primarily in academic and foundational records.
Multiple independent actors — Intermolecular, Applied Materials, and TSMC — have converged on 400 °C as the ceiling for back-end-of-line thermal budget. Academic literature from 2021 confirmed that W/HZO/Al₂O₃/TiN stacks annealed at 400 °C achieve competitive performance. TSMC’s most recent 2026 filing addresses this constraint using catalytic metal layers (W, Mo, Ta, or Hf at 0.5–10 Å) that enable metal-induced crystallization of sub-4 nm HZO at ≤400 °C.
In this dataset, Taiwan Semiconductor Manufacturing Company (TSMC) is the single most prolific assignee with at least 10 distinct patent records across US and CN jurisdictions spanning 2021–2026. TSMC’s filings cover MgO-dielectric FTJ architecture, seed-layer engineering, improved ferroelectric response via thermal expansion mismatch, sparse seed structures, and catalytic metal-layer crystallization for sub-4 nm films.
SanDisk Technologies’ 2021 US active patent combines a ferroelectric tunneling dielectric portion with an ovonic threshold switch (OTS) material portion in a single crosspoint memory cell, enabling 1S1R-style array operation. The OTS selector suppresses sneak-path leakage currents that would otherwise compromise read accuracy and increase power consumption in high-density crosspoint arrays.
At least six records in this dataset explicitly target synaptic weight, logic-in-memory, or edge computing functions. Fudan University’s 2021 CN patent uses FTJ’s analog resistance switching to emulate synaptic non-linear transmission for artificial neural networks. Nanjing University’s 2025 CN active patent targets logic-in-memory operations for deep learning acceleration using a stacked dual-ferroelectric-layer structure. A 2021 literature record specifically maps HZO-based FTJ electrical characteristics to circuit design for edge inference workloads.
The Suzhou Institute of Nano-Tech (CAS) 2025 CN pending patent uses aluminum scandium nitride (AlScN) as the ferroelectric layer with asymmetric semiconductor electrodes, enabling FTJ integration with III-V and GaN process platforms. The University of Southern California’s 2024 US pending patent uses monolayer graphene as a top electrode, yielding ultrahigh TER ratios through giant barrier height modulation. Earlier records in the dataset also cover 2D ferroelectrics (ReS₂) and P(VDF-TrFE) polymer systems.
Data and insights on this page are based on a limited patent and literature dataset and are for reference only. Figures may not represent the complete technology landscape.