FinFET Nanowire & 2D-Material Channel Patent Landscape
This focused corpus is heavily concentrated, with Taiwan Semiconductor Manufacturing Co. (TSMC) commanding a dominant share among the top hundred filers and the United States serving as the primary filing jurisdiction. Activity has plateaued near its 2020 peak on a multi-year basis, marking a mature field where incremental device architecture innovations—particularly gate-all-around and multi-channel structures—define the competitive frontier.
TSMC leads a tightly concentrated field with clear tier separation
Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) ranks first among all applicants and holds a commanding lead over its nearest competitors, GlobalFoundries and Qualcomm, who are tied for second position.
The top five filers collectively account for 85% of the combined patent records of the hundred largest filers, signaling an unusually concentrated competitive structure. A sharp drop-off after the top tier leaves mid-tier players—IMEC, STMicroelectronics, and a handful of academic entrants—with minimal footprints.
| # | Applicant | Patent records | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) | 34 | |
| 2 | GlobalFoundries US Inc. | 7 | |
| 3 | Qualcomm Inc. | 7 | |
| 4 | Intel Corporation | 6 | |
| 5 | IBM (International Business Machines Corporation) | 4 | |
| 6 | IMEC (Interuniversitair Micro-Electronica Centrum) | 2 | |
| 7 | STMicroelectronics Inc. | 2 |
| # | Applicant | Patent records | Share |
|---|---|---|---|
| 8 | University of North Dakota | 1 | |
| 9 | Lovely Professional University | 1 | |
| 10 | SHANGHAI INTEGRATED CIRCUIT RESEARCH & DEVELOPMENT… | 1 | |
| 11 | SR University | 1 | |
| 12 | Applied Materials Inc. | 1 | |
| 13 | Atomera Inc. | 1 |
TSMC’s positional dominance, combined with the maturity of the field, implies that new entrants face high barriers in core device architectures and will need to target adjacent application or materials spaces to establish meaningful positions.
Filings from approximately the last 18–24 months are likely under-counted due to publication lag; apparent low activity in 2024–2026 should not be read as a structural decline. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Filing volume has plateaued since 2020; semiconductor device classes dominate
Annual filing activity peaked around 2020 and has since oscillated at a lower level, consistent with a maturing technology. The technology composition is overwhelmingly concentrated in semiconductor device classifications, though several adjacent branches remain comparatively sparse.
Annual filing trend
Annual filings rose to a peak in 2020, then eased and have oscillated between modest levels through 2023; 2024 and 2025–2026 data are likely incomplete due to publication lag and should not be interpreted as a sustained downturn. The multi-year window shows a 6% recent-period growth relative to the prior window, consistent with a plateau rather than a retreat.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) is the dominant classification, reflecting the core device-physics focus of the corpus. H10D (Semiconductor devices, general) and H10P are secondary branches. Peripheral classifications such as B82Y (Nanotechnology applications), C23C (Coating & surface deposition), and H10N (Other electric solid-state devices) each hold low shares, flagging them as under-served adjacent areas relative to the core.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Nanowire channel structures of continuously stacke…
Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices are disclosed. In one aspect, an exemplary CMOS device includes a nanowire channel structure that includes a plurality of continuously stacked nanowires. Vertically adjacent nanowires are connected at narrow top and bottom end portions of… (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | Multi-channel gate-all-around fet | 232 |
| 2 | FINFET including a superlattice | 148 |
| 3 | Integrating a gate-all-around (GAA) field-effect t… | 63 |
| 4 | Integrated circuits including a finfet and a nanos… | 61 |
| 5 | Finfet and nanowire semiconductor devices with sus… | 58 |
| 6 | Multi-channel gate-all-around fet | 55 |
| 7 | Multi-channel gate-all-around FET | 46 |
| 8 | Multi-channel gate-all-around FET | 28 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the competitive structure means for R&D investment decisions
The combination of high concentration, a plateau in annual filings, and a U. S.-centric filing footprint shapes where new investment can realistically create differentiation. The cards below translate each structural dimension into a concrete implication.
Field is mature; annual volume has eased from its 2020 peak
The lifecycle stage is classified as Maturity, with annual filings having plateaued near the 2020 peak. The multi-year window still shows positive recent-period growth of 6%, indicating the field has not entered decline, but the rate of new structural invention in core FinFET nanowire architectures is slowing. R&D investment should focus on differentiated extensions—novel channel materials, integration schemes—rather than re-plowing the primary device-structure ground already covered by leading filers.
Lifecycle: MaturityTop-5 filers hold 85% share among the hundred largest filers
The top five applicants—TSMC, GlobalFoundries, Qualcomm, Intel, and IBM—account for 85% of the patent records among the hundred largest filers, a concentration level that leaves limited room for challengers in mainstream device architectures. Late-stage entrants such as Intel and Atomera Inc. have entered recently as new entrants per momentum data, suggesting niche or materials-level differentiation strategies rather than broad architectural claims. Any new entrant should expect to compete on specific process steps or novel channel materials rather than top-level device structure.
High concentrationIBM–GlobalFoundries–STMicroelectronics form the core co-filing cluster
The most active co-filing pairs are GlobalFoundries and IBM (4 joint records), GlobalFoundries and STMicroelectronics (4 joint records), and IBM and STMicroelectronics (4 joint records), with GlobalFoundries and IMEC sharing 2 joint records. This tight cluster reflects the legacy research alliance among these parties. Organizations outside this cluster—including academic entrants such as the University of North Dakota and Lovely Professional University—file independently and without evident industry co-development, limiting their translation pathway.
Alliance clusterU.S. is the dominant filing jurisdiction; global coverage is thin
The United States leads all jurisdictions by a wide margin. WIPO PCT filings are present but limited; India and China each hold minimal representation, and Europe (EPO) has just one record. This U.S. concentration means that freedom-to-operate in non-U.S. markets may be easier to achieve, but it also signals that most enforceable rights are concentrated in a single jurisdiction where TSMC and the collaboration cluster dominate. Organizations targeting Asian or European fabs should monitor whether these positions expand via PCT prosecution.
U.S.-centricGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| GlobalFoundries Inc. | IBM (International Business Machines Corporation) | 4 |
| GlobalFoundries Inc. | STMicroelectronics Inc. | 4 |
| IBM (International Business Machines Corporation) | STMicroelectronics Inc. | 4 |
| GlobalFoundries Inc. | IMEC (Interuniversitair Micro-Electronica Centrum) | 2 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC leads decisively; Intel and Atomera are new entrants to watch
The applicant ranking reveals a single dominant player followed by a second tier of diversified semiconductor firms. Momentum data highlights several recent new entrants whose trajectories may signal emerging focus areas.
Taiwan Semiconductor Manufacturing Co. Ltd.
TSMC holds 34 patent records, more than four times the nearest competitor, with technology emphasis concentrated in H01L 21, H01L 29, and H01L 27 semiconductor device classifications—covering process integration, individual device structures, and integrated circuit arrangements respectively. Recent momentum shows a 8% decline from the prior period, suggesting the pace of new filings has moderated from an earlier peak rather than accelerating further. The breadth and depth of their H01L coverage make adjacent process steps and materials the primary differentiation surface for competitors.
patent records: 34Intel Corporation
Intel holds 6 patent records, all concentrated in H01L 29 (individual semiconductor device structures), and its momentum is classified as a new entrant in the recent filing window—indicating activity that emerged from a near-zero prior base. This pattern is consistent with Intel’s publicly known pivot toward gate-all-around nanosheet transistors for its advanced process nodes. Its focused H01L 29 positioning, combined with new-entrant momentum, makes Intel a challenger worth tracking despite its currently modest record count relative to TSMC.
patent records: 6| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) | 11 | ▼ -8% |
| Intel Corporation | 2 | ▲ new entrant |
| Atomera Inc. | 3 | ▲ new entrant |
| Applied Materials Inc. | 1 | ▲ new entrant |
| Lovely Professional University | 1 | ▲ new entrant |
Under-served branches adjacent to the dominant semiconductor device core
Several IPC branches appear at low share relative to the dominant H01L core, representing areas where the existing patent landscape is sparse. These observations are not validated commercial opportunities on their own, but they flag spaces where technical entry costs may be lower and freedom-to-operate broader.
B82Y · Nanotechnology applications
B82Y holds a low share of patent records in this corpus, despite being the classification most directly aligned with the nanoscale material and structural innovations underpinning 2D-material channels and nanowire devices. The sparsity likely reflects filers’ preference for H01L device-level claims over nanoscience-level classifications. For organizations focused on 2D materials such as MoS₂ or WS₂ channel integration, filing under B82Y alongside H01L could establish broader claim coverage in a less-contested branch. Entry path: combine materials-science process claims with device integration claims across both classifications.
Search this in Eureka →C23C · Coating & surface deposition
C23C (coating and surface deposition) appears at low share, even though atomic-layer deposition and chemical vapor deposition of high-k dielectrics and channel materials are central process steps in FinFET nanowire and 2D-material device fabrication. The gap suggests that process-chemistry innovation—particularly novel precursors or deposition sequences for 2D-material channels—is under-patented in this corpus relative to the device-structure claims in H01L. Organizations with process-equipment or specialty-chemicals capabilities could use C23C filings to build positions in the upstream supply chain for next-generation channel materials. Entry path: target ALD/CVD process sequences specific to MoS₂, hBN, or other 2D-material deposition on sub-5 nm nodes.
Search this in Eureka →Frequently asked questions
The corpus covers 47 patent families in the FinFET nanowire and 2D-material channel space. The United States is the primary filing jurisdiction, accounting for the majority of patent records.
Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) is the dominant applicant with 34 patent records, more than four times the count of the next-ranked filers, GlobalFoundries and Qualcomm, who each hold 7 patent records.
The field is classified as Maturity. Annual filings have plateaued near the 2020 peak, and while the recent multi-year window shows 6% growth relative to the prior window, the rate of new structural invention has slowed significantly from its peak pace.
The most active co-filing pairs are GlobalFoundries and IBM (4 joint records), GlobalFoundries and STMicroelectronics (4 joint records), and IBM and STMicroelectronics (4 joint records). GlobalFoundries and IMEC share 2 joint records. This cluster reflects a legacy research alliance among these firms.
The most-cited invention titles relate to multi-channel gate-all-around (GAA) FET architectures, FinFET structures incorporating superlattices, integration of GAA field-effect transistors, and combined FinFET-nanosheet device structures. Multi-channel GAA FET appears as the single most-cited topic with 232 citations.
The sparsest adjacent branches relative to the dominant H01L core are B82Y (Nanotechnology applications), C23C (Coating & surface deposition), H10N (Other electric solid-state devices), and G01N (Material analysis & testing). These branches hold low share of patent records, suggesting comparatively lower filing density for organizations targeting process-chemistry or nanoscience-level claims.
Built on Patsnap Open Platform
This report’s underlying patent dataset — filings, assignees, technology clusters — is open for developers via MCP and REST API. Free to start, 10,000 credits, no credit card required.
Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.