GAA Device Scaling & CFET Patent Landscape 2026
The GAA device scaling and CFET patent field is highly concentrated, with TSMC, IBM, and Tokyo Electron together accounting for the majority of filings across 246 patent families. Annual volume plateaued near its 2023 peak, though several new entrants — including Qualcomm and Intel — have entered recently, signaling continued strategic interest.
TSMC and IBM dominate a tightly concentrated field
Taiwan Semiconductor Manufacturing Co. (TSMC) holds the largest position with 63 patent families, followed by IBM with 47 and Tokyo Electron with 26, making the top three a formidable bloc in this space.
The top five filers — TSMC, IBM, Tokyo Electron, Applied Materials, and Qualcomm — collectively represent 69% of the combined output of the hundred largest filers, indicating a strongly consolidated competitive structure with limited room for mid-tier challengers to close the gap organically.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co. (TSMC) | 63 | |
| 2 | IBM Corporation | 47 | |
| 3 | Tokyo Electron Ltd. | 26 | |
| 4 | Applied Materials Inc. | 24 | |
| 5 | Qualcomm Incorporated | 19 | |
| 6 | Intel Corporation | 16 | |
| 7 | Institute of Microelectronics, Chinese Academy of Sciences | 9 | |
| 8 | GlobalFoundries US Inc. | 9 | |
| 9 | IMEC (Interuniversitair Micro-Electronics Centrum) | 9 | |
| 10 | Huawei Technologies Co., Ltd. | 9 |
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 11 | Samsung Electronics Co., Ltd. | 8 | |
| 12 | Parabellum Strategic Opportunities Fund LLC | 7 | |
| 13 | Tokyo Electron US Holdings Inc. | 4 | |
| 14 | Advanced Micro Devices Inc. (AMD) | 2 | |
| 15 | IBM United Kingdom Ltd. | 2 | |
| 16 | LaVision GmbH | 2 | |
| 17 | SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CH… | 1 | |
| 18 | NXP Semiconductors USA Inc. | 1 | |
| 19 | Adeia Semiconductor Solutions LLC | 1 | |
| 20 | Bhuwalka Krishna Kumar | 1 |
TSMC’s lead, built predominantly on semiconductor device process and integration filings, reflects its role as both a technology developer and volume manufacturer; IBM’s close second signals continued research-intensive investment, consistent with its history in front-end process research.
Filings from approximately the last 18–24 months are likely under-counted due to standard patent publication lag and should not be interpreted as a real slowdown beyond what the lifecycle analysis already captures. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Filing volume plateaued at peak; semiconductor device classes dominate the mix
The annual trend reveals a field that grew rapidly from 2017 through 2023 and has since plateaued, while the technology composition shows overwhelming concentration in core semiconductor device classes with smaller adjacent branches remaining sparse.
Annual filing trend
Filings grew from 6 in 2017 to a peak of 45 in 2023, then show apparent softening in 2024; the 2024 figure and especially 2025–2026 are subject to publication lag and should be treated as provisional. The multi-year window still shows positive growth overall.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) and H10D (Semiconductor devices, general) account for the overwhelming majority of classified records, confirming that core transistor architecture and integration dominate the field. H10B (Memory device manufacture), H10P, B82Y (Nanotechnology), and H10W are present at much lower levels, representing adjacent branches rather than core focus areas.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Method for controlling transistor delay of nanowir…
A method of manufacturing a semiconductor device includes: providing a substrate including a first stacked fin structure for forming a channel of a first gate-all-around (GAA) transistor, the first stacked fin structure including an initial volume of first channel material, and a second stacked fin structure for forming a channel of a second GAA transistor… (excerpt from the patent abstract)
| # | Patent | Citations |
|---|---|---|
| 1 | Gate-all-around field-effect transistor devices ha… | 134 |
| 2 | Multi-threshold voltage gate-all-around field-effe… | 97 |
| 3 | Method for incorporating multiple channel material… | 90 |
| 4 | I/O device scheme for gate-all-around transistors | 90 |
| 5 | Self-aligned wrap-around contacts for nanosheet de… | 80 |
| 6 | Method for threshold voltage tuning through select… | 76 |
| 7 | Stacked Nanosheet CFET with Gate All Around Struct… | 72 |
| 8 | Multi-threshold voltage gate-all-around transistors | 72 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the patent structure means for R&D investment decisions
The competitive structure of this field — concentrated ownership, a maturing filing curve, and a small number of highly cited foundational patents — shapes where new entrants can realistically compete and where incumbent positions are entrenched.
Field at peak plateau — core architecture largely claimed
The lifecycle stage is Maturity: annual filings have plateaued near the 2023 peak, with multi-year growth still nominally positive at 6%. This means foundational GAA and CFET device architecture IP is largely staked out by incumbents. New filings are more likely to address integration, process recipes, and system-level applications rather than novel device topologies.
Lifecycle: MaturityTop five hold 69% share among the hundred largest filers
The top five filers hold 69% of the combined output of the hundred largest filers, a level of concentration that makes broad freedom-to-operate difficult without licensing engagement with TSMC, IBM, Tokyo Electron, Applied Materials, or Qualcomm. Challengers outside this tier — such as GlobalFoundries, IMEC, and Huawei, each with 9 families — face a substantial portfolio gap to close.
High concentrationIMEC–Huawei co-filing is the most active partnership
The most active co-filing pair is IMEC (Interuniversitair Micro-Electronics Centrum) and Huawei Technologies, with 6 jointly filed families — a notable pairing of a leading research institute with a major fabless design house. Tokyo Electron and Tokyo Electron US Holdings have co-filed 4 families, reflecting intra-group coordination. IBM and IBM United Kingdom have co-filed 2 families. Broader multi-party consortia are not evident in the evidence.
Research–Industry pairsUS leads decisively; PCT and China are secondary channels
The United States is the dominant filing jurisdiction with 188 patent records, far ahead of WIPO PCT at 19 and China at 17. Europe (EPO) accounts for 12 records and Taiwan for 4. The strong US lead reflects both the location of key R&D centers and the strategic importance of US market protection for these process-intensive technologies. Non-US protection remains relatively sparse.
US-centricGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| IMEC (Interuniversitair Micro-Electronics Centrum) | Huawei Technologies Co., Ltd. | 6 |
| Tokyo Electron Ltd. | Tokyo Electron US Holdings Inc. | 4 |
| IBM Corporation | IBM United Kingdom Ltd. | 2 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC leads on volume; Applied Materials accelerating while IBM pulls back
The two dominant players — TSMC and IBM — differ markedly in recent trajectory: TSMC remains the largest holder but has moderated its recent filing pace, while IBM shows a sharp pullback. Meanwhile, equipment and EDA-adjacent players such as Applied Materials are accelerating.
Taiwan Semiconductor Manufacturing Co.
TSMC holds 63 patent families — the largest position in the landscape — with technology emphasis spread across H01L 21, H01L 29, and H01L 27, covering process integration, discrete transistor structures, and integrated circuits. Recent momentum shows a 14% decline versus the prior three-year period, suggesting the foundational portfolio build-out has matured rather than collapsed, consistent with the field’s broader plateau.
families: 63Applied Materials Inc.
Applied Materials holds 24 patent families with a technology focus on H01L 29, H01L 21, and H01L 27 — device structure, process, and integration — and shows a recent filing trend of +40% versus its prior three-year period, making it the most visibly accelerating established player. Its position as a leading deposition and etch equipment supplier gives its GAA-related IP strategic process-enablement value distinct from that of device designers or foundries.
families: 24| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co. (TSMC) | 32 | ▼ -14% |
| IBM Corporation | 9 | ▼ -73% |
| Tokyo Electron Ltd. | 6 | ▼ -50% |
| Applied Materials Inc. | 14 | ▲ +40% |
| Qualcomm Incorporated | 17 | ▲ new entrant |
| Intel Corporation | 14 | ▲ new entrant |
| IMEC (Interuniversitair Micro-Electronics Centrum) | 5 | ▲ new entrant |
| Huawei Technologies Co., Ltd. | 5 | ▲ new entrant |
Memory integration and nanotechnology branches remain under-served
Several IPC branches adjacent to the dominant H01L and H10D classes show notably low filing counts relative to the core, representing areas where the GAA/CFET architecture has not yet been extensively claimed and where technical value could justify targeted exploration.
H10B · Memory Device Manufacture
With 26 records — roughly 6% of classified records — memory-specific applications of GAA and CFET architectures are sparse relative to the logic-focused core. The technical case is credible: CFET stacking concepts are directly relevant to 3D DRAM and next-generation embedded memory cells. Entry could be pursued by memory specialists or foundries extending their GAA logic IP into memory integration contexts, though incumbent logic players have not yet staked broad claims here.
Search this in Eureka →B82Y · Nanotechnology Applications
Only 9 records fall under B82Y (Nanotechnology applications), representing approximately 2% of classified records. This branch captures nanomaterial-level characterization and novel quantum-scale phenomena in GAA-class devices — areas of potential relevance as gate lengths continue to shrink toward sub-1nm nodes. The low filing count suggests most applicants are not yet formally classifying their work at the nanotechnology level, which could represent a framing gap rather than a true absence of technical activity.
Search this in Eureka →How leaders differ by technology route emphasis
Route coverage across the main technology branches in the current evidence set.
| Player | H01L 29 · Semiconductor devices | H01L 21 · Semiconductor devices | H01L 27 · Semiconductor devices | H10D 62 · Semiconductor devices (general) | H10D 64 · Semiconductor devices (general) |
|---|---|---|---|---|---|
| Taiwan Semiconductor Manufacturing Co. (TSMC) | Strong · 56 | Strong · 60 | Strong · 48 | Strong · 36 | Strong · 36 |
| IBM Corporation | Strong · 46 | Strong · 37 | Strong · 24 | Strong · 36 | Strong · 25 |
| Tokyo Electron Ltd. | Strong · 24 | Strong · 24 | Strong · 25 | Moderate · 8 | Moderate · 8 |
| Qualcomm Incorporated | Strong · 19 | Strong · 15 | Strong · 17 | Strong · 10 | Strong · 10 |
| Applied Materials Inc. | Strong · 24 | Strong · 16 | Moderate · 11 | Moderate · 9 | Moderate · 9 |
| Intel Corporation | Strong · 15 | Strong · 12 | Strong · 15 | Moderate · 6 | Moderate · 6 |
| GlobalFoundries Inc. | Strong · 8 | Strong · 8 | Strong · 7 | Strong · 7 | Moderate · 3 |
Frequently asked questions
The evidence covers 246 patent families in this landscape, representing global filings across the GAA device scaling and CFET domain.
Taiwan Semiconductor Manufacturing Co. (TSMC) is the largest holder with 63 patent families, followed by IBM with 47, Tokyo Electron with 26, Applied Materials with 24, and Qualcomm with 19.
The field reached a filing peak in 2023 and has since plateaued. Multi-year growth remains nominally positive at 6%, but annual volume has eased from its peak. The most recent filing years (2024–2026) are subject to publication lag and should be treated as provisional figures.
The United States is the dominant jurisdiction with 188 patent records. WIPO (PCT) follows with 19 records, China with 17, and Europe (EPO) with 12. Taiwan accounts for 4 records.
The most active co-filing pair is IMEC (Interuniversitair Micro-Electronics Centrum) and Huawei Technologies, with 6 jointly filed families. Tokyo Electron and Tokyo Electron US Holdings co-filed 4 families, and IBM and IBM United Kingdom co-filed 2 families.
The H10B (Memory device manufacture) branch has 26 records — about 6% of classified records — making it the largest adjacent under-served area. B82Y (Nanotechnology applications) has only 9 records, and H10W has 6 records, each representing a small share of the total classified activity.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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