GAA Etching & Nanosheet Release Patent Landscape
The GAA etching and nanosheet release space is highly concentrated, with TSMC and IBM together holding the majority of patent families among the top filers; annual filing volume peaked around 2018 and has eased substantially since, signaling a field moving through a mature, post-peak phase rather than an expanding frontier.
TSMC and IBM dominate a tightly consolidated field
Taiwan Semiconductor Manufacturing Co. Ltd. leads the ranking with 27 patent families, followed closely by International Business Machines Corporation at 21 patent families — the two together account for the majority share among the largest filers in this space.
The top five filers — TSMC, IBM, Applied Materials, Tokyo Electron, and Adeia Semiconductor Solutions — collectively hold 81% of the combined total across the hundred largest filers, indicating an exceptionally tight concentration with a steep drop-off to the next tier.
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 1 | Taiwan Semiconductor Manufacturing Co. Ltd. | 27 | |
| 2 | International Business Machines Corporation | 21 | |
| 3 | Applied Materials Inc. | 10 | |
| 4 | Tokyo Electron Ltd. | 8 | |
| 5 | Adeia Semiconductor Solutions LLC | 7 | |
| 6 | GlobalFoundries US Inc. | 4 | |
| 7 | Lam Research Corporation | 4 |
| # | Applicant | Patent families | Share |
|---|---|---|---|
| 8 | Tessera LLC | 2 | |
| 9 | SMIC Manufacturing International (Beijing) Corp. | 2 | |
| 10 | SMIC Manufacturing International (Shanghai) Corp. | 2 | |
| 11 | SanDisk Technologies LLC | 1 | |
| 12 | GlobalFoundries Inc. | 1 | |
| 13 | French Alternative Energies and Atomic Energy Commission (CEA) | 1 |
Such concentration at the top implies that any new entrant or second-tier player faces strong prior-art density in core process and device architectures; differentiation will most plausibly come through adjacent process steps, equipment configurations, or non-standard channel materials rather than head-on competition in mainstream nanosheet release chemistry.
The most recent filing years are subject to publication lag and likely under-represent actual activity; conclusions about current competitive intensity should be read with that caveat. Longer-window growth, applicant concentration, and technology-route coverage are therefore more reliable signals than the latest-year bar alone.
Filing activity peaked in 2018 and the technology mix is overwhelmingly semiconductor-device focused
The annual filing trend reveals a clear lifecycle arc, while the IPC composition confirms that the corpus is anchored in semiconductor device fabrication with only marginal coverage of adjacent disciplines.
Annual filing trend
Filings peaked at 14 patent families in 2018, declined through the early 2020s, and showed a partial uptick to 9 in 2024 before the most recent years taper off — the 2025 and 2026 data should be treated as incomplete due to publication lag, so the post-2023 trajectory is not yet determinative.
↗ Hover for values · click a bar to ask EurekaTechnology composition
H01L (Semiconductor devices) and H10D (Semiconductor devices, general) together dominate the IPC mix, confirming that filings are concentrated in core transistor fabrication; B82Y (Nanotechnology applications), H01J (Electron and discharge tubes), H10B (Memory device manufacture), and H10P each represent only single-digit shares, marking them as adjacent and relatively sparse branches.
↗ Hover for values · click a bar to ask EurekaHighly cited patent families surfaced by the query
Citation-heavy patent families returned by the query. Use this section as citation context, not as a curated list of the most topic-specific patents.
Method for controlling transistor delay of nanowir…
A method of manufacturing a semiconductor device includes: providing a substrate including a first stacked fin structure for forming a channel of a first gate-all-around (GAA) transistor, the first stacked fin structure including an initial volume of first channel material, and a second stacked fin structure for forming a channel of a second GAA transistor… (excerpt from the patent abstract)


| # | Patent | Citations |
|---|---|---|
| 1 | Method for fabricating nanowires for horizontal ga… | 151 |
| 2 | Nanosheet transistor with improved inner spacer | 102 |
| 3 | Hybrid gate-all-around (GAA) field effect transist… | 92 |
| 4 | Method for incorporating multiple channel material… | 90 |
| 5 | Gate-All-Around (GAA) Method and Devices | 82 |
| 6 | Stacked Nanosheet CFET with Gate All Around Struct… | 72 |
| 7 | Multi-threshold voltage gate-all-around transistors | 72 |
| 8 | Method of forming integrated circuit with gate-all… | 56 |
Ranked by total forward citations. Citation counts favour older and broadly cited patent families, and broad or adjacent patents may appear when they match the search scope. Treat this section as citation context, not as a curated list of the most topic-specific patents. Some patent titles may be shown in their original, non-English language where an accurate translation could not be guaranteed.
What the structural data means for R&D investment decisions
Four dimensions — maturity, concentration, collaboration, and geography — together define the strategic constraints and openings for teams evaluating entry or expansion in GAA etching and nanosheet release.
Post-peak: core process IP is largely established
The lifecycle stage is Decline, with annual filings having eased back from the 2018 peak and a recent-window growth rate of –54%. The foundational process and device claims filed by the leading players are now well into prosecution or grant, meaning the freedom-to-operate landscape for latecomers is increasingly constrained in mainstream nanosheet release approaches. R&D investment is most defensible in differentiated sub-processes not yet densely claimed.
Lifecycle: DeclineTop five hold 81% of the largest-filer pool
TSMC and IBM occupy the first two positions by a wide margin, with Applied Materials, Tokyo Electron, and Adeia Semiconductor Solutions forming a distant second tier. The sharp tier gap between the top two and the rest means that competitive parity through volume filing is not a realistic short-term strategy for new entrants. Targeted prosecution in under-claimed branches offers a more achievable differentiation path.
High concentrationLimited co-filing activity; SMIC entities and IBM-CEA are the only visible pairs
The collaboration evidence shows two co-filing relationships: SMIC Manufacturing International (Beijing) and SMIC Manufacturing International (Shanghai) filed jointly on 2 patent families, and IBM co-filed once with the French Alternative Energies and Atomic Energy Commission (CEA). The overall volume of collaborative filings is low relative to the corpus size, suggesting this space has developed primarily through internal R&D programs rather than industry consortia or academic partnerships.
Sparse collaborationUnited States is the near-exclusive filing jurisdiction
The United States accounts for 87 patent records, with Taiwan and WIPO (PCT) each registering only 1 record. This heavy US concentration means the existing prior-art landscape is predominantly shaped by USPTO prosecution history and claim practice. Teams planning international commercialization should assess whether key process claims have been nationalized in other major semiconductor jurisdictions, as the evidence suggests limited direct protection in those markets from this corpus.
US-centricGo beyond the landscape: Eureka’s TRIZ Solution agent breaks down an R&D problem and returns patented concept solutions, each with a technical approach and cited patent & literature evidence.
| Applicant | Collaborator | Co-filings |
|---|---|---|
| SMIC Manufacturing International (Beijing) Corp. | SMIC Manufacturing International (Shanghai) Corp. | 2 |
| International Business Machines Corporation | French Alternative Energies and Atomic Energy Commission (CEA) | 1 |
Co-filing pairs, ranked by the number of jointly-filed patent families.
TSMC leads on volume; IBM matches on device architecture depth; equipment makers occupy a distinct tier
The top two players share a near-identical IPC focus but differ in trajectory, while Applied Materials and Tokyo Electron represent a separate equipment-process cluster below them.
Taiwan Semiconductor Manufacturing Co. Ltd.
TSMC leads with 27 patent families concentrated in H01L 21 (semiconductor device manufacturing processes), H01L 29 (semiconductor device structures), and H10D 64 (general semiconductor devices). Recent filing momentum shows a modest decline of 7% versus the prior period, consistent with the field’s overall post-peak trajectory rather than any loss of strategic interest — TSMC’s position as the leading logic foundry makes sustained prosecution in this space commercially necessary.
families: 27International Business Machines Corporation
IBM holds 21 patent families with an IPC focus virtually identical to TSMC — H01L 21, H01L 29, and H10D 62 — reflecting deep engagement across both process and device structure dimensions. IBM’s co-filing with CEA on one family signals selective academic partnership activity. No momentum trend is separately evidenced for IBM in the applicant momentum data, but its volume and citation footprint (including the most-cited work on nanowire fabrication methods) position it as the strongest research-origin challenger to TSMC’s foundry-driven leadership.
families: 21| Applicant | Recent (3 yrs) | Trend |
|---|---|---|
| Taiwan Semiconductor Manufacturing Co. Ltd. | 13 | ▼ -7% |
| Applied Materials Inc. | 2 | ▲ new entrant |
Under-served branches adjacent to the dominant semiconductor device core
Several IPC branches appear in the corpus at low counts and low share, indicating areas where patent density is sparse relative to the core H01L and H10D domains; these are observations of relative sparsity and should be evaluated on their own technical and commercial merits before being treated as entry opportunities.
H10B · Memory device manufacture
H10B covers memory device fabrication and appears in only 6 patent records at a 3% share — notably sparse given that GAA and nanosheet architectures are actively being explored for SRAM and emerging memory applications at advanced nodes. The technical relevance is plausible: nanosheet release processes developed for logic transistors are transferable to memory cell integration, and the low claim density suggests this intersection has not been systematically prosecuted. Teams with both logic-process and memory-integration expertise could find defensible ground here.
Search this in Eureka →C23C · Coating & surface deposition
C23C (coating and surface deposition) appears in only 2 patent records at a 1% share, making it the sparsest adjacent branch in the corpus. Selective etch and release processes for nanosheets depend critically on surface passivation, atomic-layer deposition, and controlled deposition chemistries — all of which fall within C23C scope. The near-absence of filings here may reflect a tendency to classify this work under H01L rather than C23C, but it also leaves potential room for applicants whose core competency is deposition-side process chemistry rather than device architecture.
Search this in Eureka →How leading applicants differ across technology routes
Route coverage across the main technology branches in the current evidence set.
| Player | H01L 21 · Semiconductor devices | H01L 29 · Semiconductor devices | H10D 62 · Semiconductor devices (general) | H10D 64 · Semiconductor devices (general) | H10D 30 · Semiconductor devices (general) |
|---|---|---|---|---|---|
| Taiwan Semiconductor Manufacturing Co. Ltd. | Strong · 27 | Strong · 26 | Strong · 21 | Strong · 23 | Strong · 18 |
| International Business Machines Corporation | Strong · 24 | Strong · 24 | Strong · 16 | Strong · 16 | Strong · 14 |
| Applied Materials Inc. | Strong · 10 | Moderate · 4 | Moderate · 4 | Emerging · 1 | Moderate · 4 |
| GlobalFoundries Inc. | Strong · 5 | Strong · 5 | Strong · 4 | Strong · 4 | Moderate · 2 |
| Tessera LLC | Strong · 4 | Strong · 4 | Strong · 4 | Strong · 4 | Strong · 4 |
| Tokyo Electron Ltd. | Strong · 8 | Strong · 6 | Absent | Absent | Absent |
| Lam Research Corporation | Strong · 4 | Strong · 4 | Absent | Absent | Absent |
Frequently asked questions
The corpus contains 81 patent families in scope for this topic.
Taiwan Semiconductor Manufacturing Co. Ltd. leads with 27 patent families, followed by International Business Machines Corporation with 21 patent families.
The lifecycle stage is Decline. Annual filings peaked at 14 patent families in 2018 and have eased substantially since, with a recent-window growth rate of -54%. The 2025 and 2026 data points are likely under-counted due to publication lag and should not be read as a further acceleration of decline.
The United States dominates with 87 patent records. Taiwan and WIPO (PCT) each show only 1 record, meaning the prior-art landscape for this corpus is almost entirely defined by USPTO prosecution.
Collaboration is limited. SMIC Manufacturing International (Beijing) and SMIC Manufacturing International (Shanghai) co-filed on 2 patent families, and IBM co-filed once with the French Alternative Energies and Atomic Energy Commission (CEA). No broader consortium activity is evident in the corpus.
C23C (Coating and surface deposition) is the sparsest adjacent branch at 2 patent records and a 1% share, followed by H10B (Memory device manufacture) and H01J (Electron and discharge tubes) at 6 records each. These observations reflect relative sparsity relative to the H01L core and should be validated against commercial relevance before committing R&D resources.
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Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
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