Gate Driver Patents: Leaders, Trends & White Space 2026
- Filing peaked in 2023 at 62 families and has declined every year since, with the 2022 midpoint of 45 marking the last stretch of sustained growth.
- H03K pulse-technique claims dominate appearing in 430 of 575 families, well ahead of H02M power conversion at 352 — the fight is over switching logic, not just the power stage.
- Momentum has stalled across the named leaders with recent-year filings at zero or down sharply for the assignees that built the largest portfolios, including drops of -50% and -100% year-on-year.
Filing growth compares 2021 (33 records) with 2024 (37) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 575 records in scope (CR5), not by the ranked leaders only.
What this patent set covers
Gate driver circuits sit between a control signal and a power switch, shaping turn-on and turn-off behaviour while protecting the switch from short-circuit and overcurrent conditions. This landscape covers isolated gate drivers, dead-time and slew-rate control, and desaturation and short-circuit withstand protection, filtered against IPC classes for pulse-technique circuits, power conversion, and logic circuits. The corpus spans 575 patent families published between 2015 and mid-2026.
Because publication lags filing by roughly eighteen months, the 2025-2026 counts in the trend chart understate real filing activity for those years. Read the decline from the 2023 peak as directionally real, but treat the final one or two years as provisional rather than final.
Filing trends and technology composition
The dataset tracks 575 patent families across receiving offices dominated by the United States, with meaningful volume from Europe, China, WIPO's PCT route, Japan and India.
A decade of filing, now past its peak
Annual filings rose from 34 in 2017 to a peak of 62 in 2023, then fell in each subsequent year. That pattern is more consistent with a maturing claim space than with an emerging one — the core circuit topologies for isolated gate drive and desaturation protection have largely been staked out, and new filings increasingly compete for narrower variations.
Pulse-technique claims outweigh power-conversion claims
H03K (pulse technique and logic circuits) appears in 430 of 575 families, ahead of H02M (power conversion) at 352. Smaller but non-trivial claim density sits in H02P (motor control, 46), G05F (variable control, 26), H01L and H10D (semiconductor devices, 26 and 24), and H02H/H02J (protection and supply systems, 24 each) — evidence that gate-drive innovation is being claimed as much through switching-logic and timing circuits as through the power stage itself.
Shares are the percentage of the 575 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on Gate Driver Circuits and Protection with Eureka
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Try EurekaThe most-cited prior art in this space
Isolated gate driver and a power device driving system including the same
The filing describes an isolated gate driver split into a low-voltage part that receives a PWM signal and control signal from a microcontroller, an insulation part that boosts both signals to high-voltage equivalents, and a high-voltage part isolated from the low-voltage side by that insulation stage. The high-voltage side carries its own logic block downstream of the boosted signals.Filed by Hyundai Mobis, published 2018-02-01.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US5900683A | Isolated gate driver for power switching device and method for carrying out same | 266 |
| 2 | US6911848B2 | Low-loss transformer-coupled gate driver | 138 |
| 3 | US6650169B2 | Gate driver apparatus having an energy recovering circuit | 117 |
| 4 | US6002213A | MOS gate driver circuit with analog input and variable dead time band | 110 |
| 5 | US20090066402A1 | Gate drive circuit | 107 |
| 6 | US20040120090A1 | Half-bridge high voltage gate driver providing protectin of a transistor | 106 |
| 7 | US20130265029A1 | Semiconductor driver circuit and power conversion device | 81 |
| 8 | US4937470A | Driver circuit for power transistors | 70 |
| 9 | US20090273957A1 | System and Method for Providing Adaptive Dead Times | 63 |
| 10 | US20120307540A1 | Power conversion device | 62 |
Citation counts inside a searched corpus favour older filings that have had more years to accumulate references — treat this table as a map of foundational art, not of current commercial importance.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for filing strategy
Three patterns stand out once the raw counts are read against filing dates and IPC codes: a maturing core, a logic-heavy claim style, and a pipeline that has gone quiet at the top.
The growth phase has ended
Filings climbed steadily from 34 in 2017 through a 2022 midpoint of 45 to a 2023 peak of 62, then declined. A flat-to-declining trend after a clear peak usually means the dominant circuit topologies are already covered by existing claims, pushing new applicants toward narrower or adjacent variations rather than foundational architecture.
Logic and timing claims lead the power stage
H03K pulse-technique claims outnumber H02M power-conversion claims by a wide margin. For a design team, this means freedom-to-operate risk concentrates as much in switching-logic and dead-time control circuitry as in the power transistor drive stage itself.
The largest portfolio holders have gone quiet
Every named assignee with meaningful portfolio depth shows zero or near-zero filings in the most recent year, with year-on-year drops as steep as -100%. That is consistent with the sector-wide peak-and-decline pattern rather than any single company's retreat, though the partial final year should be read cautiously given publication lag.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to gate driver circuits and protection, with the prior art for and against each one.
Who holds the claims, and where the gaps sit
Assignee activity in this dataset is led by established power semiconductor and automotive-electronics firms, with citation weight concentrated in a small set of foundational isolated-driver patents and co-filing largely absent outside a few closely related corporate entities.
Concentration without heavy cross-filing
The corpus shows only three identified co-assignee pairs, and the strongest of those links related entities within the same corporate group. Gate driver IP in this set is largely built by single assignees filing independently rather than through joint development arrangements.
Foundational art is decades-old
The most-cited record in the set, an isolated gate driver patent, carries 266 citations — far ahead of the next tier. High citation counts here reflect years of accumulated reference rather than current filing activity, since older patents simply have had longer to be cited.
US-centric filing with a real China and EPO presence
The United States receives more than half of tracked filings, with Europe and China as the next largest offices and a meaningful WIPO/PCT route alongside smaller Japan and India volumes. Any freedom-to-operate review needs to weight US prior art most heavily but cannot skip EPO and China filings.
| Assignee | Recent year | YoY |
|---|---|---|
| ROHM Co., Ltd. | 1 | -50% |
| Infineon Technologies Austria AG | 0 | -100% |
| Texas Instruments Incorporated | 0 | — |
| Mitsubishi Electric Corporation | 0 | — |
| International Rectifier Corporation | 0 | — |
| Infineon Technologies AG | 0 | — |
| Kyosan Electric Manufacturing Co., Ltd. | 0 | — |
| Ford Global Technologies, LLC | 0 | — |
Where to take this analysis
The data points to a maturing core claim space with momentum cooling across the leading portfolio holders. The practical next step is turning that into a filing or freedom-to-operate decision.
Map claim scope against the top-cited prior art
Before drafting new claims in isolated gate drive or desaturation protection, run the leading cited patents through a claim chart to see exactly what is already blocked and what language remains open.
Explore prior art in EurekaTrack the assignees whose filing has gone to zero
A drop to zero recent filings can mean a portfolio is complete, deprioritised, or being refiled through a different subsidiary. Watching continuation and family activity clarifies which it is.
Monitor assignees in EurekaTest white-space claim language before filing
The under-claimed branches identified here are starting points, not guarantees of allowability. Drafting a first claim and searching it against the full corpus is the fastest way to confirm the gap is real.
Draft and search claims in EurekaCommon questions about gate driver patents
This landscape covers patents and patent families that claim gate driver circuits, isolated gate drive architectures, dead-time control, slew-rate control, common-mode transient immunity, desaturation protection, or short-circuit withstand behaviour, filtered against IPC classes for pulse technique circuits (H03K), power conversion (H02M) and related logic circuits (H03K19). It excludes patents that only mention gate driving in passing without claiming these specific circuit functions. The 575 families in the set were published between 2015 and mid-2026.
Filings rose steadily from 34 in 2017 to a peak of 62 in 2023 before declining, a pattern typical of a technology area where the core architectures have already been claimed by early entrants. Once foundational isolated-driver and desaturation-protection topologies are covered, later filers tend to shift toward narrower variations, which slows the pace of new distinct filings even if overall R&D activity continues. The most recent one to two years are also understated because publication typically lags filing by around eighteen months.
The dataset's assignee ranking is dominated by established power semiconductor and automotive-electronics firms with long-running portfolios in gate drive and protection circuitry, though nearly all of the largest holders show zero or sharply reduced filings in the most recent year. Rather than naming a fixed top list here, the ranking table on this page reflects the current family counts directly from the data, since relative positions can shift as more recent filings publish.
Desaturation protection detects when a power switch, typically an IGBT or MOSFET, moves out of its saturated conducting state during a fault such as a short circuit, and triggers a controlled shutdown before the device is damaged. It shows up heavily in this corpus because it sits at the intersection of the H03K pulse-technique claims and H02H protective-circuit claims that make up a large share of the dataset, and because reliable fault detection is a persistent design challenge as switching speeds increase with SiC and GaN devices.
Based on the IPC composition and citation pattern in this dataset, thinner claim density shows up around adaptive slew-rate control that adjusts for thermal drift, common-mode transient immunity hardening specifically for GaN and SiC bridge topologies, multi-level desaturation fault discrimination, and dead-time auto-calibration across varying load conditions. These are adjacent to the heavily claimed core rather than entirely new territory, so any filing there should be checked closely against the most-cited existing patents before drafting.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.