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The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →Filing growth compares 2021 (19 records) with 2024 (15) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 562 records in scope (CR5), not by the ranked leaders only.
Global shutter pixel architectures solve a specific problem: capturing an entire image sensor array at one instant instead of scanning it row by row, which removes the motion artifacts that rolling shutter designs introduce on fast-moving subjects. The patent activity in this space concentrates on the on-pixel storage node — the structure that holds captured charge or voltage between exposure and readout — and on shielding it from stray light so that parasitic light sensitivity does not corrupt the stored signal before it is read out.
This dataset covers 562 published records from 2015 through the 2026 cut-off, drawn from filings that combine storage-node or charge-domain shutter language with terms describing shutter efficiency, motion artifact suppression, or noise contribution. The mix skews heavily toward semiconductor device claims and pictorial-communication claims, with smaller pockets touching positioning and photovoltaic-adjacent structures.
Pick a task. Every answer cites the patents behind it.
The 562 records in scope span 2015 through the 2026 cut-off, with publication lag meaning the most recent two years understate actual filing activity.
Annual filings peaked at 67 in 2018. From 2021 (19) to 2024 (the most recent complete year, 15), filings fell 21% — a real pullback in a maturing claim space, not a data artefact, since 2025 and 2026 are still filling in under the usual 18-month publication lag.
H04N (pictorial communication) and H01L (semiconductor devices) appear in 69.4% and 58.2% of the 562 records respectively — the two subclasses most global-shutter pixel filings have to clear. Smaller subclasses such as G01S (6.4%) and H10F (3.6%) show far less density, which is where claim space is comparatively open.
Shares are the percentage of the 562 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
This page is one run against one query. Ask Eureka your own question about global shutter pixel architectures and every answer comes back with the patent numbers behind it.
Try EurekaA global shutter pixel cell includes a serially connected anti-blooming, storage-gate and transfer transistor chain coupled between a voltage supply and a floating diffusion region, with a photodiode terminal between the anti-blooming and storage-gate transistors and a storage-node diode terminal between the storage-gate and transfer transistors. Part of the photodiode region extends beneath the storage-node region so the photodiode shields the storage node from stray photons, with a metallic layer above extending the shielding further.Filed by Aptina Imaging Corporation, published 2012-11-01.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US8695880B2 | Imaging devices and methods for inhibiting or removing captured aiming pattern | 841 |
| 2 | US8773562B1 | Vertically stacked image sensor | 355 |
| 3 | US20120001615A1 | Array column integrator | 217 |
| 4 | US5900623A | Active pixel sensor using CMOS technology with reverse biased photodiodes | 212 |
| 5 | US20120001056A1 | CCD-based multi-transistor active pixel sensor array | 197 |
| 6 | US20190056498A1 | Gated imaging apparatus, system and method | 175 |
| 7 | US8217433B1 | One-transistor pixel array | 173 |
| 8 | US20120001236A1 | One-transistor pixel array with cascoded column circuit | 167 |
| 9 | US20120001237A1 | Two-transistor pixel array | 167 |
| 10 | US20120056248A1 | One-transistor pixel array | 164 |
Citation counts favour older filings within this searched corpus; treat them as a measure of influence on later filings rather than current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
When you want the answer in the next five minutes.
The agent works the prompt against patents and technical literature, citing every source.
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Browse MCP servers →Concentration at the top, a post-2018 pullback, and uneven density across IPC subclasses together describe a field where the foundational shielding architecture is settled and the remaining activity is in narrower variants.
The leading assignee alone accounts for 71 records, and the top five combined reach 46.1% of the full 562-record set. That level of concentration means the foundational storage-node shielding geometry is already staked out by a handful of filers.
Annual filings peaked at 67 in 2018 and the most recent complete window shows a 21% decline, from 19 filings in 2021 to 15 in 2024. Later years in the trend are understated by the roughly 18-month gap between filing and publication.
H04N and H01L together anchor the field, appearing in 69.4% and 58.2% of the 562 records respectively. Smaller subclasses like H10B (11.0%) and G01S (6.4%) show meaningfully less density, marking where claim space is comparatively open.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to global shutter pixel architectures, with the prior art for and against each one.
The 76-company ranking shows real concentration at the top alongside a long tail of single- or few-filing entrants, with recent-year momentum data suggesting even the largest historical filers have slowed their latest recorded output.
The leading assignee's 71 records place it well ahead of the fifth-ranked company at 30, meaning the foundational shielded storage-node claims are concentrated rather than distributed evenly across the field.
With the top five at 46.1% and the top ten at 63.7% of all 562 records, most of the remaining 66 ranked companies hold comparatively small filing counts, forming a long tail below the concentrated core.
Several of the largest historical assignees show zero filings in the most recent tracked year, including a recorded -100% year-on-year change for one major filer. Given the roughly 18-month publication lag, this reflects incomplete data more than an actual halt in R&D.
| Assignee | Recent year | YoY |
|---|---|---|
| Life Technologies Corporation | 0 | — |
| Brillnics Japan Inc. | 0 | — |
| Semiconductor Components Industries, LLC | 0 | — |
| Apple Inc. | 0 | -100% |
| BRILLNICS INC(GB) | 0 | — |
| Magic Leap, Inc. | 0 | — |
| CMOSIS | 0 | — |
| Taiwan Semiconductor Manufacturing Co., Ltd. | 0 | -100% |
The patterns above point to specific next questions for R&D and IP teams working in this space.
With 63.7% of the 562 records held by ten assignees, any new storage-node shielding design should be checked against those specific families before development goes further.
Run a claim comparison in EurekaH10F and G01S show low record density and low assignee concentration, making them worth a closer look for a differentiated first filing rather than a crowded design-around.
Explore white space in EurekaA global shutter pixel captures every row of an image sensor at the same instant, rather than scanning row by row as rolling shutter designs do, which eliminates motion artefacts on fast-moving subjects. The storage node is the on-pixel element that holds the collected charge or voltage between exposure and readout, and its design determines how much stray light leaks into it during that hold period. Most of the patent activity in this dataset — reflected in the 58.2% of the 562 records tagged under H01L — centres on shielding that storage node so parasitic light sensitivity does not corrupt the held signal.
The assignee ranking in this dataset covers 76 companies, with the leader holding 71 of the 562 records and the field showing real concentration at the top: the top five assignees combined account for 46.1% of all records, and the top ten for 63.7%. That leaves a long tail of companies with only a handful of filings each. Recent-year momentum data shows several of the largest historical filers, including major imaging and semiconductor names, recording zero filings in the latest tracked year, consistent with the broader 18-month publication lag rather than necessarily a slowdown in R&D.
Filings peaked at 67 in 2018 and the 2021-to-2024 window shows a further 21% decline (19 down to 15), which is the most recent period that can be read as a complete trend given publication lag. This pattern typically reflects a claim space where the core shielding and storage-node architectures were staked out early, pushing later filers toward narrower, more specific variations rather than foundational claims. It does not necessarily mean R&D activity itself has slowed, since design work on emerging variants can continue without generating comparably high filing volumes.
The thinnest subclasses in this dataset are H10F (photovoltaic and light-sensitive devices, 3.6% of the 562 records) and G01S (radar, sonar and positioning, 6.4%), both far below the 58.2% and 69.4% seen in the core H01L and H04N subclasses. These branches show little concentration at the top of the assignee ranking, meaning storage-node designs aimed at ranging or time-of-flight applications, or built around non-standard light-sensitive device structures, remain comparatively under-claimed. That combination of low density and low concentration is the practical signature of open claim space.
US20120273854A1, assigned to Aptina Imaging Corporation and published in 2012, claims a specific series-connected transistor chain (anti-blooming, storage-gate, transfer) paired with a storage-node diode shielded by an extended photodiode region and an overlying metallic layer. Any new design using that exact shielding geometry and transistor sequence sits inside the claim scope and needs a design-around. Alternatives that use a different shielding mechanism or transistor ordering are the usual route taken to avoid direct overlap, and a formal claim chart is the only reliable way to confirm freedom to operate for a specific design.
Go past this page: query the whole global shutter pixel architectures corpus yourself, in your own scope.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.
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