GPU Architecture Patents: Who Leads, Where the Gaps Are 2026
- Filing peaked in 2018 at 101 records and has declined since, with 2026 tracking at just 4 (partial year) — a maturing rather than expanding filing base.
- Nvidia's latest-year filings are down 67% year-over-year, and most other tracked assignees show flat or -100% momentum, signalling a slowdown in fresh architecture claims from incumbents.
- G06T image-processing claims appear in 600 of 688 records, far outweighing G06N (AI models) at 150 — architecture patents are still framed as graphics processing first, AI compute second.
Filing growth compares 2021 (67 records) with 2024 (62) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 688 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
This dataset tracks 688 patent families published between 2015 and mid-2026 that combine GPU architecture language — “streaming multiprocessor”, “tensor core”, “memory hierarchy”, “parallel architecture” — with core IPC classifications for graphics data processing and general-purpose computing hardware. The search deliberately pairs title/abstract terminology with claim-level IPC codes so that the corpus captures architectural claims rather than every filing that merely mentions a GPU in passing.
Filing activity is concentrated in the United States, which receives more than two-thirds of the tracked records, with the EPO, China, WIPO/PCT, India and Poland accounting for the remainder. Because publication typically lags filing by around 18 months, the 2025 and 2026 figures in any trend line understate real filing activity for those years.
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Filing trends and technology composition
Two views of the same 688-family corpus: how filing volume has moved year over year, and which IPC subclasses carry the claim weight.
A peak-and-decline filing curve
Filings rose to a peak of 101 in 2018, sat near the midpoint of 45 by 2022, and have continued to soften since — consistent with a technology area where the foundational architecture claims were staked out early and later filings are incremental rather than expansive.
Graphics processing dominates the IPC mix
G06T (image data processing) appears in 600 of 688 records and G06F (electric digital data processing) in 515, making these the two backbone classifications. G06N (AI-model computing) trails at 150, and display, transmission, coding and semiconductor-device classes each account for a much smaller slice — evidence that GPU architecture patents are still primarily framed as graphics/compute hardware claims that happen to touch AI workloads, not AI-first filings.
Shares are the percentage of the 688 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on GPU Architecture Advanced Architecture with Eureka
This page is one run against one query. Ask Eureka your own question about gpu architecture advanced architecture and every answer comes back with the patent numbers behind it.
Try EurekaThe most-cited records in this corpus
Multi-tile graphics processing unit (US20250200700A1, Intel Corporation)
The filing describes a multi-tile GPU apparatus built from three semiconductor dies in a 2.5-dimensional arrangement: two dies each carrying a high-bandwidth memory device, and a third carrying the graphics processing resource and a cache that serves that resource. The claims center on the physical die-partitioning and memory-coupling scheme rather than on any specific compute-unit microarchitecture.Filed by Intel Corporation, published 2025-06-19.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US10885698B2 | Method for programmable timeouts of tree traversal mechanisms in hardware | 758 |
| 2 | US20190205746A1 | Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitec… | 159 |
| 3 | US20150268963A1 | Execution of data-parallel programs on coarse-grained reconfigurable architecture hardware | 154 |
| 4 | US7219085B2 | System and method for accelerating and optimizing the processing of machine learning techniques using a graph… | 147 |
| 5 | US20180322607A1 | Dynamic precision management for integer deep learning primitives | 132 |
| 6 | US20180315399A1 | Instructions and logic to perform floating-point and integer operations for machine learning | 111 |
| 7 | US10325343B1 | Topology aware grouping and provisioning of GPU resources in GPU-as-a-Service platform | 107 |
| 8 | US20180315159A1 | Compute optimizations for low precision machine learning operations | 104 |
| 9 | US20140146062A1 | System, method, and computer program product for debugging graphics programs locally utilizing a system with … | 90 |
| 10 | US20180315157A1 | Compute optimizations for low precision machine learning operations | 82 |
Citation counts reflect influence within the searched corpus and skew toward older filings; a low count on a recent family does not mean it is unimportant.
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Read together, the filing curve, IPC mix and citation pattern point to a field where the earliest architectural ground has been claimed and current activity is narrower and more defensive.
The core architecture is largely staked out
A peak of 101 filings in 2018 followed by a steady decline to single digits by 2026 suggests the foundational streaming-multiprocessor and memory-hierarchy claims were filed early. New entrants now face denser prior art on the basic architecture and have to differentiate on narrower implementation details.
AI framing is still secondary to graphics framing
Four times as many records sit in the image-data-processing class as in the AI-model class. Filers positioning a GPU architecture invention primarily as an AI accelerator, rather than as a graphics processor, may be filing into comparatively less-occupied IPC territory.
Even the most active filer is pulling back
Nvidia's single latest-year filing represents a 67% drop from the prior year, and most other tracked assignees show flat or fully negative year-over-year momentum. That is consistent with a filing base that has matured rather than one still in a land-grab phase.
Filing strategy is heavily US-centric
The United States receives more than 70% of tracked filings, with Europe, China, WIPO/PCT, India and Poland trailing well behind. Portfolios built primarily for US enforcement may have real exposure gaps in China and India, where filing volume is comparatively thin.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to gpu architecture advanced architecture, with the prior art for and against each one.
Who is filing, and who has stopped
A small set of established semiconductor and platform companies account for most of the tracked filing activity, but recent-year momentum is weak across nearly all of them — a signal that the competitive center of gravity may be shifting to companies not yet visible in this corpus.
Several established filers went to zero
Intel, Imagination Technologies and Shandong Inspur Institute of Science and Research each show a full year-over-year drop to zero filings in the latest tracked year, alongside AMD's flat zero. That does not necessarily mean these organisations have stopped innovating in GPU architecture — publication lag means recent filings may simply not have surfaced yet.
Co-assignment is rare and mostly intra-group
The strongest co-assignee pair links two STMicroelectronics entities (Italy and Israel) across 6 records, and a second pair links AMD with ATI Technologies across 2 — both intra-corporate rather than cross-company collaborations. True inter-company joint filing is minimal in this dataset.
A long tail of newer, smaller Chinese filers
Alongside the large incumbents, the corpus includes a number of smaller, more recently formed Chinese entities filing in narrower niches. Their volume is low individually, but collectively they represent where new architectural claim activity is originating while incumbent filing slows.
| Assignee | Recent year | YoY |
|---|---|---|
| Nvidia Corporation | 1 | -67% |
| Qualcomm Incorporated | 1 | 0% |
| Intel Corporation | 0 | -100% |
| Advanced Micro Devices, Inc. (AMD) | 0 | — |
| Imagination Technologies Limited | 0 | -100% |
| Shandong Inspur Institute of Science and Research Co., Ltd. | 0 | -100% |
| International Business Machines Corporation (IBM) | 0 | — |
| Samsung Electronics Co., Ltd. (Korea) | 0 | — |
Where to take this analysis
The trend and assignee data point to specific next steps depending on whether the goal is freedom-to-operate, portfolio strategy or competitive tracking.
Check freedom-to-operate against the most-cited records
The highest-citation patents in this corpus, including the tree-traversal and sparse-computation filings, sit on foundational claim territory that newer filings are likely to run into. A claim chart against these before drafting can save a rejection cycle.
Run a claim comparison in EurekaTrack incumbent momentum before it reverses
Several major assignees show sharp year-over-year drops that may reflect publication lag rather than an actual pullback. Monitoring newly published filings from these organisations over the next 12-18 months will clarify whether the slowdown is real.
Set up assignee monitoring in EurekaExplore the under-claimed sub-areas directly
Branches like cross-die cache coherence and sparse-tensor scheduling show thinner claim density than the core architecture classes. A focused prior-art search on these before drafting can confirm how much room actually remains.
Search white space in EurekaCommon questions about GPU architecture patents
Within this 688-family corpus, filing activity is concentrated among a small group of established semiconductor and platform companies including Nvidia, Intel, AMD, Qualcomm and Imagination Technologies, alongside a long tail of smaller entrants, many based in China. Ranking by raw count favours organisations with the longest filing history, so a company's position here reflects cumulative activity since 2015 rather than current-year output. Recent-year momentum data shows most of these same companies filing at reduced or zero volume in the latest tracked year, which is a separate and arguably more decision-relevant signal than the cumulative ranking.
No — filing peaked at 101 records in 2018 and has declined since, sitting at 45 by the 2022 midpoint and down to single digits by 2026. That pattern is consistent with a technology area where the core architectural claims, such as streaming-multiprocessor design and memory-hierarchy structures, were staked out in the early-to-mid 2010s. It does not mean innovation has stopped; it means the claim space around the foundational architecture is now denser, pushing new filings toward narrower implementation details.
US20250200700A1, filed by Intel and published in mid-2025, describes a multi-tile GPU built from three semiconductor dies arranged in a 2.5-dimensional configuration, with two dies carrying high-bandwidth memory and a third carrying the graphics processing resource and its cache. Its claims are specific to that physical die-partitioning and memory-coupling scheme, so it is most relevant to anyone building a chiplet-style GPU with a similar HBM-plus-compute-die split. It does not cover single-die GPU architectures or different multi-die topologies, so designs using alternative die arrangements or interconnect schemes are unlikely to fall within its claims.
The IPC composition shows heavy density in image-data-processing (G06T, 600 of 688 records) and general digital-processing (G06F, 515) classifications, with comparatively thinner coverage in AI-model computing (G06N, 150) and even less in display control, coding/conversion and semiconductor-device classes. Sub-areas such as cross-die cache coherence for 2.5D packaging, sparse-tensor scheduling logic and coarse-grained reconfigurable dataflow mapping show lighter claim density relative to the core architecture classes. These are reasonable starting points for a freedom-to-operate check before drafting, though a full clearance search is still necessary since IPC density is only a proxy for actual claim coverage.
The United States dominates this corpus with 489 of 688 records, followed at much lower volume by the EPO (69), China (44), WIPO/PCT (27), India (12) and Poland (11). A portfolio strategy built solely around US filing leaves comparatively little coverage in China and India, two of the largest markets for GPU manufacturing and deployment. Companies with global enforcement or licensing ambitions in this space should weigh whether the thin filing volume in those jurisdictions reflects genuine white space or simply under-filing by the organisations already active in the US.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.