In this dataset, a hardware security patent is one whose claims tie a security mechanism to physical circuit behaviour — power consumption, electromagnetic emission, timing, or physical device variation — rather than to software logic alone. Examples include masking countermeasures against power analysis, fault injection detection circuits, and physically unclonable functions used for key generation. General cybersecurity patents covering software encryption, network protocols or access control without a hardware-level mechanism typically fall outside this specific search string, even though they may cite similar cryptographic primitives.

The corpus shows filings falling from a peak of 55 in 2018 to 11 in the latest tracked year, with 38 at the 2022 midpoint. This pattern is consistent with a field where the foundational countermeasure techniques — basic masking schemes, standard fault-injection detection, first-generation PUF designs — were claimed in the mid-to-late 2010s, leaving less open ground for broad new claims. It does not necessarily mean the field is shrinking in commercial importance; publication lag also means the last one to two years will look thinner than they eventually turn out to be once later filings publish.

H04L (digital information transmission) and G06F (electric digital data processing) carry the bulk of the corpus at 384 and 351 records respectively, making them the classes to search first for side-channel and countermeasure prior art. G09C (ciphering and secret communication) is a smaller but relevant secondary class at 35 records. If a design touches automotive systems or AI accelerators, B60R and G06N are worth checking too, even though their record counts are much lower.

The overall filing trend is flat to declining, but PUF-adjacent applications in newer domains show comparatively few records — for instance, the AI-adjacent G06N class sits at only 20 records and automotive B60R at 10, both far below the H04L and G06F core. A recent filing in this corpus, WO2025207683A1, applies a photonic PUF approach to random number generation and biometric identification, which suggests photonic and biometric-linked PUF applications remain less crowded than conventional silicon PUF designs. Anyone drafting in this space should still run a targeted prior-art check, since low counts can also reflect narrow indexing rather than genuine openness.

Filing activity concentrates among a small set of semiconductor, secure-element and platform assignees, with a long tail of entities holding only one or a few families each. Co-filing is rare — only 10 co-assignee pairs appear across the entire 540-family corpus, and one pairing is notably stronger than the rest, suggesting a specific joint arrangement rather than a broader industry pattern. Several named leaders show zero filings in the most recent tracked year, so current activity should be checked against the latest data rather than assumed from historical rankings alone.