IC Substrate Buildup Layers Patents: Who Leads, Where Gaps Are 2026
- 62.8% concentration. The five leading assignees together hold 1,124 of the 1,789 records in scope — a small group controls most of the documented claim space.
- Filings past peak, not past relevance. The field peaked at 157 filings in 2022; filings fell from 143 in 2021 to 81 in 2024, a 43% drop, though publication lag means the last two years are still filling in.
- H01L dominates, H10P stays thin. 76.0% of records touch H01L semiconductor-device classifications, while H10P sits at just 7.8% — a visible gap next to the crowded core.
Filing growth compares 2021 (143 records) with 2024 (81) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 1,789 records in scope (CR5), not by the ranked leaders only.
What this landscape covers
IC substrate buildup layers sit at the intersection of package substrate design and semiconductor back-end processing: laser via drilling, desmear treatment, line width control, substrate warpage management, layer count optimisation and registration accuracy all show up as claim elements across this corpus. The dataset spans 1,789 published records filed or published between 2015 and mid-2026, drawn from filings that combine package substrate, buildup layer or flip chip substrate terminology with at least one of these process-control concepts. Patent families, not raw document counts, are the fairer comparison unit here because they neutralise repeat continuation filings and multi-jurisdiction duplicates from the same underlying invention.
The receiving-office mix leans heavily toward the United States, with the EPO, WIPO/PCT and a smaller but consistent set of filings into India, Germany and the UK. That spread points to a field where protection is sought broadly once a design is validated, rather than confined to a single jurisdiction.
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Filing trend and technology composition
Two views of the same 1,789-record corpus: activity over time, and where records sit across IPC subclasses. Because a single record can carry several IPC classes, the technology shares below add up to more than 100% of the record total.
Filings by year
Filings ran from 133 in 2017 to a peak of 157 in 2022, then declined to 81 by 2024 — a 43% drop from the 2021 level of 143. The 2025 and 2026 figures are understated by publication lag of roughly 18 months and should not be read as a continuing decline.
IPC subclass distribution
H01L (semiconductor devices) appears in 76.0% of the 1,789 records, making it the dominant classification by a wide margin. H10W follows at 38.7% and H05K (printed circuits and assemblies) at 24.0%, while H10P, G06F, G02B, H01Q and H10D each sit in single-digit-to-low-teens territory, marking the field's narrower branches.
Shares are the percentage of the 1,789 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
Go deeper on IC Substrate Buildup Layers with Eureka
This page is one run against one query. Ask Eureka your own question about ic substrate buildup layers and every answer comes back with the patent numbers behind it.
Try EurekaRepresentative filing and most-cited prior art
Structure and method for fine pitch flip chip substrate (US20040012097A1)
The filing describes a fine-pitch flip chip substrate that replaces conventional solder resist with a black oxide dam formed on the metal circuit between bump pads, so bump pads are not buried in resist. Small vias are laser-drilled and copper-plated to connect circuits, improving routing density and flexibility, with a mesh pattern added in limited space to increase substrate stiffness.Filed by Kinsus Interconnect Technology Corp., published 2004-01-22 — an early example of laser-via and dam-structure claiming that predates much of this corpus.
| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US20200091608A1 | Wireless communication technology, apparatuses, and methods | 597 |
| 2 | US5468999A | Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding | 363 |
| 3 | WO2018119153A2 | Wireless communication technology, apparatuses, and methods | 237 |
| 4 | US20090008765A1 | Chip embedded substrate and method of producing the same | 232 |
| 5 | US20150325925A1 | Embedded millimeter-wave phased array module | 215 |
| 6 | US6828510B1 | Multilayer printed wiring board and method of manufacturing multilayer printed wiring board | 181 |
| 7 | US20110215464A1 | Semiconductor package with embedded die and its methods of fabrication | 169 |
| 8 | US10892246B2 | Structures and methods for low temperature bonding using nanoparticles | 163 |
| 9 | US20130249106A1 | Semiconductor Device and Method of Forming a Robust Fan-Out Package including Vertical Interconnects and Mech… | 163 |
| 10 | US20120161331A1 | Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming th… | 161 |
Citation counts reflect influence within this searched corpus and skew toward older filings — a high count signals foundational status, not current filing activity.
Each row carries its publication number; clicking a row searches Eureka by that number.
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Browse MCP servers →What the numbers mean for a filing decision
Three patterns stand out once the corpus is broken down by concentration, technology class and citation weight.
Claim space is controlled by a small group
The five leading assignees together account for 1,124 of the 1,789 records in scope, and the top ten extend that to 71.4%. A new entrant filing into core buildup-layer process claims is filing directly against this concentration, not into open ground.
The core is crowded, the edges are not
H01L claims dominate the corpus while H10P, G02B, H01Q and H10D each cover under 8% of records. That gap is either a sign of limited technical relevance or of under-exploited claim territory, and the two should be distinguished before drafting.
Influence skews toward older filings
The most-cited records in this corpus, including a 1994 fine-pitch wire-bonding package and a 2007 chip-embedded substrate filing, accumulated citations over a long window. Recent filings have not had time to reach comparable counts, so citation rank should not be read as a measure of current importance.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to ic substrate buildup layers, with the prior art for and against each one.
| Assignee | Co-assignee | Shared families |
|---|---|---|
| Intel Corporation | GONZALEZ JAVIER SOTO | 4 |
| Intel Corporation | AYGUN KEMAL | 3 |
| Intel Corporation | Intel IP Corporation | 2 |
| Intel Corporation | ZARBOCK EDWARD | 2 |
| Intel Corporation | YEPES ANA M | 2 |
| Intel Corporation | YAMADA SHUHEI | 2 |
| Intel Corporation | WEISMAN NIR | 2 |
| Intel Corporation | WATTS NICHOLAS R | 2 |
Only 10 co-assignee pairs appear in the corpus, and the strongest pairing recurs just 4 times — most protection here is filed by a single assignee rather than through joint development arrangements.
Who is filing, and where momentum is shifting
The ranked list covers 100 companies scored by family count within this corpus. It is not a top-50 or top-100 industry list — it is the full ranking the dataset returns for this search.
One filer sits well ahead of the field
The leading assignee's record count is more than eleven times the fifth-place filer's 68, an unusually steep drop-off that marks this as a leader-and-long-tail structure rather than a competitive cluster.
The mid-field thins out quickly
Fifth place holds 68 records and tenth place 28 — roughly half again by the tenth position. Below the top ten, filing counts drop into single-digit territory across the remaining ranked companies.
Recent-year activity is down across the leaders
Every tracked assignee in the momentum data shows flat or declining latest-year filings, from -63% down to -100% year-on-year. Given the roughly 18-month publication lag, this understates true recent filing activity rather than confirming a real slowdown.
| Assignee | Recent year | YoY |
|---|---|---|
| Intel Corporation | 3 | -63% |
| Qualcomm Incorporated | 3 | -77% |
| SILVEBROOK KIA | 0 | -100% |
| Taiwan Semiconductor Manufacturing Co., Ltd. | 0 | -100% |
| Ibiden Co., Ltd. | 0 | — |
| STATS ChipPAC Pte. Ltd. | 0 | -100% |
| Samsung Electro-Mechanics Co., Ltd. | 0 | — |
| Advanced Micro Devices, Inc. (AMD) | 0 | — |
Where to take this analysis
The landscape points to specific next steps depending on whether the goal is freedom-to-operate, white-space identification, or tracking a specific competitor.
Run a freedom-to-operate check on under-claimed branches
The gap between H01L's 76.0% share and H10P's 7.8% is worth verifying claim-by-claim before treating it as open ground — low IPC share can mean low relevance or an unexploited filing opportunity.
Check claim scope in Eureka →Track the leading assignee's recent filing behaviour
With the top filer holding 774 records but recent-year momentum down double digits across leaders, a closer read of what is still being filed versus abandoned clarifies whether the slowdown is strategic or an artefact of publication lag.
Monitor assignee activity in Eureka →Common questions about IC substrate buildup layer patents
The corpus shows a steep leader-and-long-tail structure: the leading assignee holds 774 of the 1,789 records in scope, more than eleven times the fifth-ranked filer's 68. The top five assignees combined account for 62.8% of all records, and the top ten reach 71.4%. This level of concentration means most freedom-to-operate work should start with the leading filers' portfolios rather than scanning the full ranked list of 100 companies evenly.
Filings ran from 133 in 2017 to a peak of 157 in 2022, then dropped to 81 by 2024, a 43% decline from the 2021 level of 143. However, publication typically lags filing by around 18 months, so the 2025 and 2026 figures in the underlying data are still incomplete and should not be read as confirmation of a continuing slowdown. A clearer read on 2023-2024 trend direction will only be possible once later filings finish publishing.
H01L (semiconductor devices) appears in 76.0% of the 1,789 records, by far the largest single classification, with H10W at 38.7% and H05K (printed circuits and assemblies) at 24.0%. Narrower classes including H10P, G06F, G02B, H01Q and H10D each cover under 8% of records. Because a record can carry multiple IPC codes, these shares overlap rather than summing to 100%, and the narrower classes are worth checking individually for under-claimed technical routes.
US20040012097A1, filed by Kinsus Interconnect Technology Corp. and published in 2004, describes a fine-pitch flip chip substrate using a black oxide dam between bump pads in place of conventional solder resist, connected through laser-drilled and copper-plated vias, with an added mesh pattern for stiffness. It is an early example of combining laser-via formation with a non-resist dam structure in this corpus. Anyone drafting claims around laser-drilled via connections to bump pads on a flip chip substrate should review this filing's specific claim language before assuming the approach is unclaimed.
The clearest gaps sit in classes with low IPC share relative to the dominant H01L core, including H10P at 7.8% and G02B at 4.0% of the 1,789 records. These lower shares can reflect either limited technical relevance to buildup-layer processes or genuinely under-exploited claim territory, and the two need to be distinguished with a targeted prior-art search rather than assumed from the share alone. Co-filing is also limited across the corpus, with only 10 co-assignee pairs recorded, suggesting joint-development filing strategies remain underused as a route to differentiated claims.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company’s registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.