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The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →Filing growth compares 2021 (580 records) with 2024 (396) — a three-year span. 2024 is the most recent year we treat as complete: publication lags filing by roughly 18 months, so 2025 onwards are still filling in and any growth rate that ends there would understate the field. Top-5 share is the combined record count of the five largest assignees divided by all 3,721 records in scope (CR5), not by the ranked leaders only.
In-memory computing moves computation into or next to memory arrays to cut the data-movement cost that dominates conventional von Neumann architectures. This landscape draws on 3,721 published records matched against in-memory and compute-in-memory terminology paired with system-level concerns such as cache coherence, memory access and interconnect fabric — filings that treat the memory-compute boundary as an engineering problem, not just a memory-cell chemistry claim. Publication lags filing by roughly 18 months, so the most recent one to two years in any trend understate real activity.
The scope spans processor and memory vendors, systems integrators and research consortia, filing across US, European, PCT, German and Chinese offices. Family counts, rather than raw document counts, are used for the assignee ranking so that multi-jurisdiction and continuation filing does not distort who actually holds the largest claim positions.
Two views of the same 3,721-record set: filings by year, and the IPC subclasses those records carry.
Annual filings climbed from 76 in 2017 to a peak of 633 in 2022. The most recent complete comparison — 2021's 580 against 2024's 396 — shows a 32% pullback; 2025 and 2026 figures are still incomplete due to publication lag and should not be read as a continued decline.
G06F (electric digital data processing) appears on 81.8% of records, confirming that most filings frame in-memory computing as a data-processing architecture problem. H04L (digital transmission, 18.5%), G06N (AI-model computing, 11.4%) and G11C (static and digital memories, 10.2%) are the next-largest classes, each describing a different angle on the same underlying memory-compute boundary. Because records carry multiple classes, these shares are read against the full 3,721-record total, not against each other.
Shares are the percentage of the 3,721 records in scope. A patent can carry several IPC classes, so the shares add up to more than 100%.
This page is one run against one query. Ask Eureka your own question about in-memory computing patent landscape and every answer comes back with the patent numbers behind it.
Try EurekaThe filing discloses an SRAM-based in-memory computing processor using two macro types distinguished by whether the data-write direction matches the multiply-accumulate operation direction, with a shift accumulator combining their outputs for feature-map and weight computation.Assignee and filing date are rendered separately from this abstract summary.


| # | Publication no. | Patent title | Citations |
|---|---|---|---|
| 1 | US6807614B2 | Method and apparatus for using smart memories in computing | 510 |
| 2 | US7546438B2 | Algorithm mapping, specialized instructions and architecture features for smart memory computing | 432 |
| 3 | US4403283A | Extended memory system and method | 219 |
| 4 | US20250259085A1 | Convergent Intelligence Fabric for Multi-Domain Orchestration of Distributed Agents with Hierarchical Memory … | 209 |
| 5 | US5255211A | Methods and apparatus for generating and processing synthetic and absolute real time environments | 206 |
| 6 | US20220027051A1 | Data Path Virtualization | 186 |
| 7 | US5759044A | Methods and apparatus for generating and processing synthetic and absolute real time environments | 182 |
| 8 | US20030014200A1 | Revenue meter with power quality features | 170 |
| 9 | US20190042518A1 | Platform interface layer and protocol for accelerators | 160 |
| 10 | US20190356736A1 | Network authentication for a multi-node array | 159 |
Citation counts favour older filings that have had more time to accumulate references — treat them as a signal of influence within this corpus, not of current commercial relevance.
Each row carries its publication number; clicking a row searches Eureka by that number.
When you want the answer in the next five minutes.
The agent works the prompt against patents and technical literature, citing every source.
Run your analysis now →When it has to run inside your own pipeline.
Patent search, landscape analysis and assignee resolution as MCP tools. Drop them into any agent framework, or call REST directly.
Browse MCP servers →Three read-throughs from the concentration, class and citation data above.
The five leading assignees combine for 64.6% of all 3,721 records in scope, and the top ten reach 73.0%. New entrants are filing into a field where core architecture claims are already occupied by a handful of large processor and memory vendors.
Filings hit 633 in 2022 before easing to 396 by 2024, a 32% drop from the 2021 level. Several of the largest assignees show sharp year-over-year declines in the latest tracked year, though publication lag makes the newest years an unreliable read on direction.
G06F class coverage at 81.8% signals that most filings are architectural or system-level rather than device-physics claims on the memory cell itself; G11C, the classic memory-device class, appears on only 10.2% of records.
The most-cited record in scope, on using smart memories in computing, carries 510 citations — well ahead of the next tier. Later system-level filings citing it show the field building outward from a small set of foundational architecture patents rather than replacing them.
Eureka can read the same corpus for gaps instead of for coverage: under-claimed branches adjacent to in-memory computing patent landscape, with the prior art for and against each one.
The ranked leaders span storage, semiconductor and systems vendors; a long tail of single- or few-filing entrants sits below them.
The top-ranked assignee holds 1,510 records, far outdistancing fifth place at 116 and tenth place at 51 — the drop-off from first to fifth is steep even within the concentrated top group.
Multiple leading assignees show large year-over-year declines in the most recent tracked year, some approaching zero new filings. Given publication lag, this looks more like a reporting gap than a genuine exit from the field.
Only ten co-assignee pairs appear across the dataset, with the strongest pairing linking a major Chinese technology vendor and a leading Chinese university. Most filers in this field patent independently rather than through joint ventures.
| Assignee | Recent year | YoY |
|---|---|---|
| Pure Storage, Inc. | 21 | -84% |
| McAfee LLC | 1 | -80% |
| Samsung Electronics Co., Ltd. | 1 | -94% |
| QUADRIC IO INC | 1 | -67% |
| Intel Corporation | 0 | -100% |
| International Business Machines Corporation | 0 | — |
| Ultrata LLC | 0 | — |
| Micron Technology, Inc. | 0 | -100% |
The dataset points to a field with an occupied core and thinner edges — the next steps depend on where a given team sits relative to that line.
With one assignee holding 1,510 records, a targeted novelty check against that portfolio before drafting saves rework later.
Run a claim comparison in EurekaH03K, H03M and H01L each sit under 2% of records — worth monitoring for filing activity as the core architecture classes fill up.
Set up class-level monitoring in EurekaBecause publication lag understates the newest years, re-check the trend once 2025 filings fully post before concluding the field is shrinking.
Build a filing-trend alert in EurekaOne assignee leads the ranked field with 1,510 records, well ahead of the rest of the top group — fifth place holds 116 and tenth place holds 51. The top five assignees combined account for 64.6% of all 3,721 records in scope, and the top ten reach 73.0%. That means most of the architectural claim space sits with a small number of storage, semiconductor and systems vendors, and any new filer should expect to design around at least one of them.
Filings grew strongly from 76 in 2017 to a peak of 633 in 2022, then eased to 396 by 2024 — a 32% decline over the 2021-2024 window. That is the most recent period that can be read reliably, because publication lags filing by roughly 18 months and 2025-2026 figures are still incomplete. Read the recent slowdown as a cooling from an unusually high 2022 peak rather than a definitive end to growth.
G06F (electric digital data processing) covers 81.8% of the 3,721 records in scope, making it the dominant class by a wide margin. H04L (digital transmission, 18.5%), G06N (AI-model computing, 11.4%) and G11C (static and digital memories, 10.2%) follow. Because a single record can carry several IPC classes, these percentages overlap rather than sum to 100%, and each should be read against the full record total, not against one another.
The classes with the lowest record shares — H03K (pulse technique and logic circuits), H03M (coding and code conversion), H04W (wireless networks) and H01L (semiconductor devices), each under 2% of records — mark branches that are comparatively thin relative to the core G06F architecture claims. That does not guarantee an easy filing, but it does mean the claim density there is lower, which is where a freedom-to-operate search is more likely to surface open space rather than blocking prior art.
The most-cited record in this corpus is US6807614B2, covering the use of smart memories in computing, with 510 citations, followed by US7546438B2 on algorithm mapping and specialized instructions for smart memory computing at 432 citations. High citation counts inside a searched corpus tend to favour older filings that have simply had more time to accumulate references, so these figures signal foundational influence rather than current commercial weight.
Go past this page: query the whole in-memory computing patent landscape corpus yourself, in your own scope.
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Disclaimer. This page is generated from Patsnap Eureka data drawn from a limited snapshot of global patent and scientific-literature records, and is provided for general information and reference only.
Patent data carries inherent limitations: recent filings (typically the most recent 18–24 months) are under-counted due to standard publication lag; counts may be reported at either a patent-family or a patent-record basis and are not always directly comparable; classification, applicant-name, and citation data may contain errors, duplicates, or omissions; and the underlying search query defines and constrains the scope shown. As a result, the analysis may be incomplete or inaccurate and may not reflect the full technology landscape.
Nothing on this page constitutes an exhaustive prior-art, novelty, freedom-to-operate, or validity search, nor does it constitute legal, financial, investment, or professional advice, and it should not be relied upon as such. Any patent, commercial, or strategic decision should be verified independently and reviewed with qualified patent, legal, and domain professionals. Patsnap makes no warranties, express or implied, as to the accuracy, completeness, or fitness for any particular purpose of the information presented.
Machine translation. Assignee and organisation names originally recorded in Chinese, Japanese or Korean have been rendered into English by an AI translation step so that the tables stay readable. These renderings are best-effort and may not match a company's registered English name; the original name is what the underlying patent record carries, and it is what any Eureka query launched from this page uses.